INDIRECT BAND GAP LIGHT EMITTING DEVICE

Abstract

An indirect band gap light emitting device comprises a first body of non-monocrystalline indirect band gap semiconductor material. In this first body, two regions are formed: a first region with a first doping kind and a first doping concentration and a second region with a second doping kind and a second doping concentration. A junction is formed between the first region and the second region with a terminal arrangement connected to the first body and arranged to reverse bias the junction so as to emit light. The first body is formed from a deposited layer of semiconductor to form an integral part of a substrate. An integrated circuit can include the light emitting device and a second body of monocrystalline indirect band gap semiconductor material. A third body may separate and galvanically isolate the first and second bodies from each other.

Claims

1-46. (canceled)

47. An indirect band gap light emitting device comprising: a first body of non-monocrystalline indirect band gap semiconductor material; a first region of the first body with a first doping kind and a first doping concentration; a second region of the first body with a second doping kind and a second doping concentration; at least one junction formed between the first region and the second region; a terminal arrangement connected to the first body and arranged to reverse bias the junction so as to emit light; and a substrate, whereby the first body is formed integrally as part of the substrate and whereby the first body is formed from a deposited layer of semiconductor to form an integral part of the substrate.

48. The light emitting device of claim 47, in which the substrate is a plural material substrate.

49. The light emitting device of claim 47, in which the substrate is a single material substrate.

50. The light emitting device of claim 47, in which a crystal structure of the first body has characteristics within the continuum that spans from amorphous through polycrystalline up to, but not including, monocrystalline characteristics.

51. The light emitting device of claim 50, in which the crystal structure of the first body is polycrystalline or amorphous.

52. The light emitting device of claim 47, in which the first body is deposited on the substrate as part of the fabrication process used to produce integrated circuits.

53. The light emitting device of claim 47, in which the non-monocrystalline indirect band gap semiconductor material is a silicon material.

54. An integrated circuit which includes: the light emitting device of claim 47; and a second body of monocrystalline indirect band gap semiconductor material.

55. The integrated circuit of claim 54, in which the first and second bodies are separated by a third body which is configured to galvanically isolate the first and second bodies from each other.

56. The integrated circuit of claim 55, in which the first body is a polysilicon layer.

57. The integrated circuit of claim 55, in which the second and third bodies form part of the substrate.

58. The integrated circuit of claim 55, in which there are plural instances of the first body, formed from the non-monocrystalline material, distributed transversally over the monocrystalline second body.

59. The integrated circuit of claim 55, in which there are plural layers of the non-monocrystalline material which are vertically distributed and which form plural instances of the first body.

60. The integrated circuit of claim 59, in which the plural layers are deposited during fabrication of the integrated circuit, each of the plural layers separated by the third body which is an electrically non-conductive insulating layer.

61. The integrated circuit of claim 60, in which are least one of the plural layers is used to create passive circuit elements.

62. The integrated circuit of claim 55, in which the third body includes a plurality of layers comprised of a group of, but not limited to, inter-metal isolating layers, metal layers or other semiconducting materials.

63. The integrated circuit of claim 55, in which the third body includes at least one layer with an electrically non-conductive, or insulating, region between the first and second bodies.

64. The integrated circuit of claim 63, in which the third body comprises at least one of thermally grown SiO2, deposited SiO2, Si3N4, gas, vacuum or polymer layers.

65. The integrated circuit of claim 55, in which a photosensitive region is formed in the second body.

66. The integrated circuit of claim 65, in which the photosensitive region is configured to operate as a light detecting element positioned to capture light generated in the first body and traversing through the third body.

67. The integrated circuit of claim 55, which includes an auxiliary body, or plural auxiliary bodies, of a non-monocrystalline indirect band gap semiconductor material that is distinct from the first and second bodies.

68. The integrated circuit of claim 67, in which the auxiliary body is separated from the first and second bodies by the third body and in which the auxiliary body is deposited to form an integral part of the substrate.

69. The integrated circuit of claim 68, in which a photosensitive region is formed in the auxiliary body.

70. The integrated circuit of claim 55, in which the first body, excluding the terminal arrangement, is encapsulated by the third body.

71. The integrated circuit of claim 55, in which the first body is formed on top of the third body without being fully enclosed, thereby resulting in a partial bordering by the first body of the third body.

72. The integrated circuit of claim 65, which includes metal layers and in which the metal layers and the terminal arrangement are configured to reflect and direct the light generated in the first body towards the photosensitive region on the second body, or a photosensitive region on any other body, and to reduce optical propagation of light in a direction opposite the second, or additional, bodies comprising photosensitive regions.

73. The integrated circuit of claim 55, in which the first body is doped either using the same masks used to dope the underlying device layer, or a different set of masks targeting junction and feature formation specifically to address the configuration of a floating layer.

74. The integrated circuit of claim 55, in which the first body is electrically accessed using the same metal and by means of interconnect layers already available on chip as part of a fabrication process.

75. The integrated circuit of claim 74, in which the interconnect layers and corresponding interlayer dielectric are configured to control the propagation of light emitted from the light emitting device in order to make more efficient use of the emitted light.

76. The integrated circuit of claim 75, in which a reflective metal layer is provided underneath the light emitting device in order to reflect light towards the chip surface, thereby enabling more light to exit the chip surface.

77. An integrated circuit assembly comprising at least two integrated circuits of claim 65, which are co-located in a single package.

78. The integrated circuit assembly of claim 77, in which the integrated circuits are optical isolators.

79. The integrated circuit assembly as claimed in claim 78, in which a first integrated circuit containing a light emitting structure and a corresponding photosensitive detection region configured for optical communication between this region and the light source are positioned in proximity to a second integrated circuit.

80. The integrated circuit assembly of claim 78, in which the second integrated circuit provides a signal to control the light emitted from the light emitting structure on the first integrated circuit.

81. An integrated display including a plurality of light emitting devices of claim 47.

82. The integrated display of claim 81, in which the light emitting devices are arranged in an array or matrix where the light emitting structures can be individually addressed.

83. The integrated display of claim 82, in which an intensity of each individually addressable light emitting structure can be modulated.

84. A method of manufacturing an indirect band gap light emitting device, the method comprising: depositing a layer of non-monocrystalline indirect band gap semiconductor material on a substrate to form an integral part of the substrate, the deposited layer forming a first body; doping a first region of the first body with a first doping kind and a first doping concentration; doping a second region of the first body with a second doping kind and a second doping concentration; forming at least one junction between the first region and the second region; and connecting a terminal arrangement to the first body, the terminal arrangement being arranged to reverse bias the junction so as to emit light.

85. A method of manufacturing an integrated circuit comprising the light emitting device manufactured by the method of claim 84, the method comprising providing a second body of monocrystalline indirect band gap semiconductor material and a third body of a non-conductive material, the third body galvanically isolating the first and second bodies from each other.

86. The method of claim 85, which includes forming a photosensitive region within the second body in order to optically couple and communicate between the first body and the second body through the third body.

87. A method of manufacturing an integrated circuit assembly comprising the integrated circuit manufactured by the method of claim 86, the method comprising co-locating at least two of the integrated circuits in a single package.

88. The method of claim 87, in which the integrated circuits are optical isolators and in which the method includes positioning a first integrated circuit containing a light emitting structure and a corresponding photosensitive detection region for optical communication between this region and the light emitting structure in proximity to a second integrated circuit.

89. The method of claim 88, in which the integrated circuits are bi-directional optical isolators.

90. The method of claim 88, which includes providing a signal by the second integrated circuit to control the light emitted from the light emitting structure on the first integrated circuit.

91. A method of communicating between the first and second integrated circuits of the integrated circuit assembly of claim 78, the method comprising: emitting light by the light emitting structure of the first integrated circuit; and receiving the emitted light by a photosensitive detection region of the second integrated circuit.

92. The method of claim 91, which includes providing a signal by the second integrated circuit to control the light emitted from the light emitting structure on the first integrated circuit.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0046] The disclosure will now be further described, by way of example, with reference to the accompanying diagrammatic drawings.

[0047] In the drawings:

[0048] FIG. 1 is a cross-sectional view of a first embodiment of the light emitting device fabricated in a non-monocrystalline indirect band gap semiconductor material;

[0049] FIG. 2 is a section on line II in FIG. 1;

[0050] FIG. 3 is a section on line III in FIG. 1;

[0051] FIG. 4 is a cross section of a second embodiment of the present disclosure, with a partially encapsulated body of non-monocrystalline semiconductor material;

[0052] FIG. 5 is a schematic view of a third embodiment of the disclosure and shows a circuit level representation of the light emitting device interacting with a photosensitive region, such as a detector, situated in close proximity on and formed as integral part of the same integrated circuit die substrate.

[0053] FIG. 6 is a cross section of a fourth embodiment where a light detecting element is configured in the second body of monocrystalline material, spatially configured to capture the light emanating from the first body of non-monocrystalline material;

[0054] FIG. 7 shows a cross section of the fifth embodiment where a light detecting element is configured in at least one additional layer of non-monocrystalline material, spatially configured to capture light emanating from the first body of non-monocrystalline material; and

[0055] FIG. 8 shows a cross section of a sixth embodiment where a light emitting element is spatially configured in relation to a metal layer, in order to guide and reflect the light emitted from the light emitter towards the upper surface of the single substrate.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENT

[0056] The following description of the disclosure is provided as an enabling teaching of the disclosure. Those skilled in the relevant art will recognize that many changes can be made to the embodiment described, while still attaining the beneficial results of the present disclosure. It will also be apparent that some of the desired benefits of the present disclosure can be attained by selecting some of the features of the present disclosure without utilizing other features. Accordingly, those skilled in the art will recognize that modifications and adaptations to the present disclosure are possible and can even be desirable in certain circumstances, and are a part of the present disclosure. Thus, the following description is provided as illustrative of the principles of the present disclosure and not a limitation thereof.

[0057] A light emitting device, in accordance with the disclosure, is fabricated from an indirect band gap material and is generally designated by reference numeral 10 in FIGS. 1-3. For context, the light emitting device 10 is illustrated in relation to a PRIOR ART PMOS transistor 40, and a PRIOR ART NMOS transistor 42, as implemented in a standard CMOS process. The PRIOR ART transistors 40, 42 are implemented in the bulk body monocrystalline material 24. The light emitting device 10 comprises a first body (collectively referred to by numeral 12 and comprising regions 12.1-12.3) of an indirect band gap semiconductor material having a non-monocrystalline crystal arrangement.

[0058] The first body 12 is illustrated in FIGS. 1-3 as rectangular; however, it will be appreciated that it may be any practicable shape in a transverse direction, such as circular or square. In the embodiments illustrated in FIGS. 1-3, the first body 12 is rectangular in shape and shown to have a thickness d and width w with a top wall 14, bottom wall 16, and sidewalls 18 (as shown in FIG. 2). The light emitting device 10 comprises a second body of monocrystalline semiconductor material 24. A body analogous to the second body 24 is typically used as the electrically active material when implementing PRIOR ART transistors 40 and 42.

[0059] In the present disclosure, the first body 12 and the second body 24 are electrically insulated from each other by a third body 22 comprising an isolation material. The bottom wall 16 of the first body 12 and an interface 26 formed between the second and third bodies 24, 22 are separated with an isolation distance, t. FIGS. 1-3 show that the first body 12 may be fully encapsulated by the third body 22 except for terminal contacts 20.1, 20.2.

[0060] The first body 12 comprises a first region 12.1 of first doping kind and first doping concentration. It further comprises a second region 12.2 of second doping kind and second doping concentration. A junction 13 is formed between first and second regions 12.1, 12.2. The first body 12 may further comprise a third region 12.3 of second doping kind and third doping concentration. The third region 12.3 is positioned such that the second region 12.2 is sandwiched between first region 12.1 and the third region 12.3 with a spacing, s.

[0061] The first doping kind may be n-type while the second and third doping kinds may then be of opposite p-type. The first and third doping concentrations may be higher than the second doping concentration. In other embodiments, reversed doping kinds may be used.

[0062] The junction 13 can be reverse biased by means of a terminal arrangement, generally designated reference numeral 20. Suitable electrical contacts 20.1, 20.2 of the terminal arrangement 20 are connected to the first region 12.1 and third region 12.3 respectively. When in use, the junction 13 is reverse biased to emit light. Light is emitted, exiting the device mainly through the walls 14, 16, 18 of the first body 12.

[0063] In a second embodiment of the present disclosure, as shown in FIG. 4, the first body 12 may only be partially surrounded by the third body 22. In this embodiment, the first body 12 is formed on top of the third body 22 in contrast with the first embodiment where the first body 12 is formed inside the third body 22. In this embodiment, the third body 22 provides a galvanic isolation distance, denoted t, between the bottom wall of the first body 16, or the bottom wall of the terminal arrangement 128, and the interface 26 between the second and third bodies 24, 22, whichever is the least. To this end, the third body 22 providing the isolation may consist of a plurality of layers of which at least one layer should consist of an isolating material. The effective isolation distance t will then be determined by the lowest electrically conducting layer.

[0064] In a third embodiment of the disclosure (FIG. 5), a photosensitive region 29 is located in proximity to the first body 12 containing the at least one junction 13 while being isolated by the isolation material and third body 22. The non-monocrystalline first body 12 emits light to be detected by the photosensitive region 29 acting as a photodetector. Supporting circuitry 33 is located in proximity and electrically connected to the photosensitive region 29 while remaining galvanically isolated from the first body 12 by the third body 22. This circuitry may include, but is not limited to, amplifiers, analogue to digital converters, digital circuits, and the like.

[0065] Both the light emitting first body 12 and the photosensitive region 29 are integrally part of the same semiconductor die substrate 35. Input connections 34 provide the physical and electrical connection to the first light emitting body 12. Output connections 36 provide physical and electrical connection to the photosensitive region 29 and supporting circuitry 33.

[0066] In a fourth embodiment of the present disclosure (FIG. 6), the light emitting device 200 comprises a photosensitive region that is usually doped, formed in the second body 24, and configured as a light detecting element 29 (electrical contacts not shown). The light detecting element 29 is configured and positioned in close proximity to the first body to capture the light emanating from the first body, 12. The third body 22 maintains electrical isolation between the first body 12 and the light detecting element 29 configured in the second body 24. Additionally, metal layers 30 present in standard processes as well as the provided terminal arrangement 20 may be configured to reflect and guide the generated light downward to be detected by the light detecting element 29 thereby increasing the amount of light reaching the detecting element 29. Metal layers configured on the same substrate are typically separated via inter-metal dielectric layers, or connected using inter-metal connection structures (commonly referred to as vias). The metals used as inter-metal connection structures or simply vias may also be utilized to guide and reflect the light in the appropriate direction, similar to metal layer 30.

[0067] In a fifth embodiment of the present disclosure (FIG. 7), the light emitting device 300 comprises a photosensitive region 31 formed in at least one auxiliary or additional body 32 of non-monocrystalline semiconductor material that is distinct from other semiconductor bodies, configured in proximity of the first body 12 and separated from the first and second bodies 12, 24 by the third body 22. The photosensitive region 31 is formed in the deposited and doped auxiliary body 32 to form an integral part of the same substrate, and configured to operate as a light detecting element (electrical contacts not shown). Metal layers, integrally part of the same substrate 30, as well as the terminal arrangement 20 may be configured to guide and direct light towards the photosensitive region 31. Metal layers configured on the same substrate are typically separated via inter-metal dielectric layers, or connected using inter-metal connection structures or vias. The metals used as inter-metal connection structures or simply vias may also be utilized to guide and reflect the light in the appropriate direction, similar to metal layer 30.

[0068] In a sixth embodiment of the present disclosure (FIG. 8), the light emitting device 400 comprises a metal layer 37 formed underneath the non-monocrystalline body 12 containing the light emitting junction 13 formed at the interface of the first region 12.1 and the second region 12.2. The metal layer 37 is used to direct and reflect light emitted through the bottom surface 16 of the first body 12 towards the top surface 11 of the substrate. The terminal arrangement used to connect to the first body 12 is not shown.

[0069] Additionally, an NMOS transistor 442 with doped regions 442.1, a non-monocrystalline gate material 442.2, and a metal transistor terminal arrangement 442.3 may be formed underneath metal layer, 37, and underneath the first body, 12. In the absence of the metal layer 37, the metal transistor terminal arrangement 442.3 may also perform the function of light guiding and reflecting layer for directing the light towards the top surface 11 of the substrate. The transistor may instead be a PMOS transistor 40 (FIG. 1) with similar well defined entities.