Electronic converter and related method of operating an electronic converter

Abstract

An asymmetric electronic half-bridge converter includes a positive input terminal and a negative input terminal for receiving a DC voltage, and two output terminals for providing a regulated output voltage or a regulated output current. The electronic converter moreover includes a half-bridge, a transformer and a rectification and filter circuit. The half-bridge includes a first and second electronic switch, connected in series between the two input terminals, wherein a respective capacitance and a respective diode are associated with the first and second electronic switch. A first terminal of the primary winding is connected to the intermediate point between the first and second electronic switch, and a second terminal of the primary winding is connected via a first capacitor to the positive or negative input terminal. The rectification and filter circuit is connected between the secondary winding and the output terminals.

Claims

1. An asymmetric electronic half-bridge converter comprising: a positive input terminal and a negative input terminal for receiving a DC voltage; two output terminals for providing a regulated output voltage or a regulated output current; a half-bridge comprising a first and a second electronic switch connected in series between the two input terminals, wherein a respective capacitance and a respective diode are associated with the first and the second electronic switch; a first capacitor; a transformer comprising a primary winding and a secondary winding, wherein a first terminal of the primary winding is connected to the intermediate point between the first and the second electronic switch, and a second terminal of the primary winding is connected via the first capacitor to the positive input terminal or the negative input terminal; a rectification and filter circuit connected between the secondary winding and the output terminals; and a control unit configured to drive the first and the second electronic switch; wherein the electronic converter comprises a snubber circuit comprising a second capacitor, an inductor and a first and a second diode, wherein the first terminal of the second capacitor is connected to the first terminal of the primary winding, the second terminal of the second capacitor is connected to the cathode of the first diode and the anode of the first diode is connected to the negative input terminal, wherein the inductor and the second diode are connected in series between the cathode of the first diode and the second terminal of the primary winding, wherein the cathode of the second diode is directed towards the second terminal of the primary winding, or the first terminal of the second capacitor is connected to the first terminal of the primary winding, the second terminal of the second capacitor is connected to the anode of the first diode and the cathode of the first diode is connected to the positive input terminal, wherein the inductor and the second diode are connected in series between the anode of the first diode and the second terminal of the primary winding, wherein the anode of the second diode is directed towards the second terminal of the primary winding.

2. The electronic converter according to claim 1, wherein the capacitance of the second capacitor is from 1 pF to 10 nF.

3. The electronic converter according to claim 1, wherein the inductance of the inductor is from 200 uH to 10 mH.

4. The electronic converter according claim 1, wherein the inductance of the inductor is at least the double of the magnetization inductance of the transformer.

5. The electronic converter according to claim 1, wherein the rectification and filter circuit comprises: a diode, a third capacitor, wherein the third capacitor and the secondary winding are connected in series between the cathode and the anode of the diode; and an inductor, wherein the inductor and the two output terminals are connected in series between the cathode and the anode of the diode.

6. The electronic converter according to claim 5, wherein the rectification and filter circuit comprises a capacitor connected between the two output terminals.

7. The electronic converter according to claim 1, wherein the control unit is configured to drive the first and the second electronic switch with the following time intervals which are repeated periodically: a first time interval, wherein the first switch is closed and the second switch is opened, a following second time interval, wherein the first switch is opened and the second switch is opened, a following third time interval, wherein the first switch is opened and the second switch is closed, and a following fourth time interval, wherein the first switch is opened and the second switch is opened.

8. The electronic converter according to claim 1, wherein the control unit is configured to: detect the current provided via the two output terminals; and drive the first and/or the second electronic switch as a function of the detected current.

9. The electronic converter according to claim 1, wherein the first and the second electronic switch are field effect transistors.

10. The electronic converter according to claim 1, wherein at least one LED is connected between the two output terminals.

11. A method of operating an asymmetric electronic half-bridge converter, the asymmetric electronic half-bridge converter comprising: a positive input terminal and a negative input terminal for receiving a DC voltage; two output terminals for providing a regulated output voltage or a regulated output current; a half-bridge comprising a first and a second electronic switch connected in series between the two input terminals, wherein a respective capacitance and a respective diode are associated with the first and the second electronic switch; a first capacitor; a transformer comprising a primary winding and a secondary winding, wherein a first terminal of the primary winding is connected to the intermediate point between the first and the second electronic switch, and a second terminal of the primary winding is connected via the first capacitor to the positive input terminal or the negative input terminal; a rectification and filter circuit connected between the secondary winding and the output terminals; and a control unit configured to drive the first and the second electronic switch; wherein the electronic converter comprises a snubber circuit comprising a second capacitor, an inductor and a first and a second diode, wherein: the first terminal of the second capacitor is connected to the first terminal of the primary winding, the second terminal of the second capacitor is connected to the cathode of the first diode and the anode of the first diode is connected to the negative input terminal, wherein the inductor and the second diode are connected in series between the cathode of the first diode and the second terminal of the primary winding, wherein the cathode of the second diode is directed towards the second terminal of the primary winding, or the first terminal of the second capacitor is connected to the first terminal of the primary winding, the second terminal of the second capacitor is connected to the anode of the first diode and the cathode of the first diode is connected to the positive input terminal, wherein the inductor and the second diode are connected in series between the anode of the first diode and the second terminal of the primary winding, wherein the anode of the second diode is directed towards the second terminal of the primary winding; the method comprising driving the first and the second electronic switch with the following time intervals which are repeated periodically: a first time interval, wherein the first switch is closed and the second switch is opened, a following second time interval, wherein the first switch is opened and the second switch is opened, a following third time interval, wherein the first switch is opened and the second switch is closed, and a following fourth time interval, wherein the first switch is opened and the second switch is opened.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the invention. In the following description, various aspects are described with reference to the following drawings, in which:

(2) FIG. 1 shows and embodiment of a lighting system;

(3) FIG. 2 shows a circuit diagram of an asymmetric electronic half-bridge converter;

(4) FIG. 3A shows the voltage at the intermediate point between switches;

(5) FIG. 3B shows the discharging of capacitance;

(6) FIGS. 3C-3D shows driver signals for the gate terminals of switches;

(7) FIG. 4 shows a first embodiment of an electronic converter in accordance with the present description;

(8) FIG. 5 show a second embodiment of an electronic converter;

(9) FIG. 6 shows a simplified circuit diagram of an electronic converter;

(10) FIG. 7A shows an operation state of FIG. 6 where a portion of the current I.sub.P charges a capacitance connected in parallel with a switch;

(11) FIG. 7B shows an operation state of FIG. 6 with the switch closed;

(12) FIG. 7C shows an operation state of FIG. 6 where the intermediate point between a capacitor and inductor are connected to ground;

(13) FIG. 7D shows an operation state of FIG. 6 where an inductor is coupled to a ground and to a capacitor by means of parasitic capacitances of diodes;

(14) FIG. 7E shows an operation state of FIG. 6 where a diode is closed, connecting a capacitor in parallel with a capacitance;

(15) FIG. 8A shows the voltage between the drain and source terminals of transistor S.sub.2;

(16) FIG. 8B shows the current flowing through the primary winding of the transformer;

(17) FIG. 8C shows the current flowing through a capacitor;

(18) FIG. 8D shows the voltage across a diode;

(19) FIG. 8E shows the current which flows through an inductor;

(20) FIG. 8F shows the voltage between the gate and source terminals of a transistor;

(21) FIG. 8G shows the voltage between the gate and source terminals of a transistor; and

(22) FIG. 9 shows a third embodiment of an electronic converter in accordance with the present description.

DETAILED DESCRIPTION OF EMBODIMENTS

(23) In the following description, various specific details are given to provide a thorough understanding of the embodiments. The embodiments may be practiced without one or several specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials or operations are not shown or described in detail in order to avoid obscuring various aspects of the embodiments.

(24) Reference throughout this description to one embodiment or an embodiment means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the possible appearances of phrases such as in one embodiment or in an embodiment in various places throughout this description are not necessarily all referring to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

(25) The headings provided herein are for convenience only, and therefore do not interpret the extent of protection or scope of the embodiments.

(26) In the following FIGS. 4 to 9, the parts, the elements or the components which have already been described with reference to FIGS. 1 to 3 are denoted with the same references which have previously been used in the Figures; the description of the previously described elements will not be repeated in the following, in order not to overburden the present detailed description.

(27) As mentioned in the foregoing, the present description concerns an electronic converter 10a which overcomes the drawbacks of the electronic converters 10 known in the art, as described with reference to FIGS. 1 to 3, i.e. asymmetric electronic half-bridge converters.

(28) Specifically, the inventors have observed that it would be convenient for the capacitance between the intermediate point of the half-bridge (including switches S.sub.1 and S.sub.2) and ground GND.sub.1 to vary in time. Specifically, the capacitance should be small during the time interval t4 so that, at the beginning of time interval t4, a (negative) current I.sub.P having small amplitude may suffice to charge the capacitance, while enabling a ZVS switching of switch S.sub.1. On the other hand, the capacitance should be high during the time interval t2, so that, during time interval t2, the discharging time of the capacitance is prolonged, thus reducing electromagnetic interference.

(29) FIG. 4 shows a first embodiment of an electronic converter 10a according to the present non-limiting description, which is based substantially on the circuit diagram shown in FIG. 2. For simplicity, FIG. 4 only shows a capacitor C.sub.RP directly connected in series with the primary winding T1 of transformer T, between the intermediate point of the half-bridge S.sub.1/S.sub.2 and ground GND.sub.1. Moreover, the Figure only shows the magnetization inductance L.sub.M of transformer T.

(30) Therefore, also in this case, the electronic converter 10a receives at input, via two input terminals 102a and 102b (GND.sub.1), a voltage V.sub.in, and provides at output, via two output terminals 104a and 104b, a regulated voltage V.sub.out or preferably a regulated current i.sub.out. For example, a lighting module 20 may be connected to the terminals 104a and 104b (see FIG. 1).

(31) The converter 10a moreover includes a half-bridge, i.e. two electronic switches S.sub.1 and S.sub.2 which are connected in series between the two input terminals 102a and 102b/GND.sub.1, wherein the switching of the electronic switches S.sub.1 and S.sub.2 is driven by means of a control unit 112. For example, the control unit 112 may be an analog and/or digital circuit, such as e.g. a microprocessor which is programmed via software code. For example, in various non-limiting embodiments, the control unit 112 is configured to drive the switches as a function of the output current i.sub.out, for example in order to regulate the output current i.sub.out to a desired (average) value.

(32) In various non-limiting embodiments, the electronic switches S.sub.1 and S.sub.2 are N-MOS transistors, i.e. n-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Such switches S.sub.1 e S.sub.2 may have, connected in parallel thereto, respective capacitances C.sub.A1, C.sub.A2 and respective diodes D.sub.A1, D.sub.A2. For example, the capacitances C.sub.A1 and C.sub.A2 may represent the parasitic capacitance of a MOSFET, and/or may be implemented by means of additional capacitors which are connected in parallel to the switches S.sub.1 and S.sub.2. On the other hand, diodes D.sub.A1 and D.sub.A2 may represent the body diodes of a MOSFET, and/or they may be implemented by means of additional diodes.

(33) In the presently considered embodiment, the converter 10a also includes a transformer T, including a primary winding T1 and a secondary winding T2. Generally speaking, the electronic converter 10 may also include further inductors, which are connected in series and/or in parallel with the primary T1 and/or secondary winding T2 of transformer T.

(34) In the presently considered embodiment, the first terminal of the primary winding T1 of transformer T is connected (e.g. directly) to the intermediate point between the two electronic switches S.sub.1 and S.sub.2. On the other hand, the second terminal of the primary winding T1 of transformer T is connected, via a capacitor C.sub.RP, to the second input terminal 102b, i.e. to ground GND.sub.1.

(35) Therefore, the switches S.sub.1 and S.sub.2 may be used to selectively connect the first terminal of the primary winding T1 of transformer T to voltage V.sub.in or to ground GND.sub.1.

(36) In the presently considered non-limiting embodiment, the electronic converter 10a includes, on the secondary side, three branches which are (preferably directly) connected in parallel, wherein: a) the first branch includes a first capacitor C.sub.RS connected in series to the secondary winding T2 of transformer T, b) a second branch including a diode D, and c) a third branch including an inductor L.sub.o connected in series with output 104a/104b.

(37) In various non-limiting embodiments, a second capacitor C.sub.o may be connected in parallel with output 104a/104b. The capacitor is optional and it is used, e.g. in the case of a resistive load, for keeping the output voltage constant; however, in the case of a LED load, the voltage of the load may be constrained by the voltage of the LEDs itself, and therefore capacitor C.sub.o may also be omitted.

(38) Specifically, in the presently considered example, a first terminal of the secondary winding T2 is connected (e.g. directly) to the cathode of diode D, and the second terminal of the secondary winding T2 is connected (e.g. directly) through capacitor C.sub.RS to the anode of diode D. Moreover, a first terminal of inductor L.sub.o is connected (e.g. directly) to the cathode of diode D, and the second terminal of inductor L.sub.o is connected (e.g. directly) to the positive terminal of the output, and the negative terminal of the output may be connected (e.g. directly) to the anode of diode D.

(39) As explained in the foregoing, the converter is typically sized so to have a desired efficiency at the high output voltages, thus ensuring the ZVS condition for S.sub.1/S.sub.2.

(40) Moreover, as stated in the foregoing, it would be advantageous for the capacitance between the intermediate point of the half-bridge (including switches S.sub.1 and S.sub.2) and ground GND.sub.1 to be adapted to vary in time. Specifically, the capacitance should be small during time interval t4, so that, at the beginning of time interval t4, a (negative) current I.sub.P having reduced amplitude may suffice to charge the capacitance, while enabling a ZVS switching of switch S.sub.1. Conversely, the capacitance should be higher during time interval t2, so that, during time interval t2, the discharging time of the capacitance is prolonged, thereby reducing the electromagnetic interference.

(41) In the presently considered non-limiting embodiment, the variability of the capacitance is achieved by means of a snubber circuit 30, connected between the intermediate point of the half-bridge and ground GND.sub.1.

(42) Specifically, in the presently considered non-limiting embodiment, the snubber circuit includes a capacitor C.sub.S and a diode D.sub.S which are connected in series, and a resistor R.sub.S connected in parallel with diode D.sub.S.

(43) Therefore, when the current I.sub.P is negative during time interval t4 (the switches S.sub.1 and S.sub.2 being open), the capacitor C.sub.S is connected in parallel with capacitance C.sub.A2 and in series with the resistor, thus reducing the actual value of the capacitance. Conversely, when the current I.sub.P is positive and has a higher value, during time interval t2, the capacitor C.sub.S is connected in series with the diode D.sub.S, i.e. the influence of the capacitor C.sub.S is higher, which is the effect sought after in order to reduce the dV/dt.

(44) However, this embodiment has the drawback that the current required for charging capacitor C.sub.S also flows through resistor R.sub.S, which reduces the efficiency of the electronic converter 10.

(45) FIG. 5 shows an embodiment which overcomes the drawback.

(46) Specifically, in the presently considered embodiment, the snubber circuit 30 again includes a capacitor C.sub.S and a diode D.sub.1 connected in series. In detail, in the presently considered embodiment, a first terminal of capacitor C.sub.S is connected (e.g. directly) to the intermediate point of half-bridge S.sub.1/S.sub.2, i.e. the source terminal of transistor S.sub.1 and the drain terminal of transistor S.sub.2, which are also connected to the first terminal of primary winding T1. The second terminal of capacitor C.sub.S is connected (e.g. directly) to the cathode of diode D.sub.1, and the anode of diode D.sub.1 is connected (e.g. directly) to ground GND.sub.1, i.e. terminal 102b.

(47) Moreover, an inductor L.sub.S and a second diode D.sub.2 are connected (e.g. directly) between the cathode of diode D.sub.1 and the second terminal of primary winding T.sub.1, which in turn is connected, via capacitor C.sub.RP, to ground GND.sub.1. Specifically, the anode of diode D.sub.2 is directed towards the cathode of diode D.sub.1, and the cathode of diode D.sub.2 is directed towards the second terminal of primary winding T1. For example, in the presently considered embodiment, a first terminal of inductor L.sub.S is connected (e.g. directly) to the cathode of diode D.sub.1, a second terminal of inductor L.sub.S is connected (e.g. directly) to the anode of diode D.sub.2 and the cathode of diode D.sub.2 is connected (e.g. directly) to the second terminal of primary winding T1.

(48) The operation of the circuit will now be described with reference to FIG. 6, which shows a simplified circuit diagram of the electronic converter 10a.

(49) In this regard, FIGS. 7A to 7E show different operation states of the circuit in FIG. 6, and FIGS. 8A to 8G show some waveforms, specifically: FIG. 8A shows the voltage V.sub.ds2 between the drain and source terminals of transistor S.sub.2; FIG. 8B shows the current I.sub.P flowing through the primary winding T1 of the transformer; FIG. 8C shows the current I.sub.CS flowing through capacitor C.sub.S; FIG. 8D shows the voltage V.sub.D1 across diode D.sub.1; FIG. 8E shows the current I.sub.LS which flows through inductor L.sub.S; FIG. 8F shows the voltage V.sub.gs1 between the gate and source terminals of transistor S.sub.1, i.e. the driver signal for transistor S.sub.1, and FIG. 8G shows the voltage V.sub.gs2 between the gate and source terminals of transistor S.sub.2, i.e. the driver signal for transistor S.sub.2.

(50) Specifically, at a time t.sub.0 the switch S.sub.2 is opened. As stated in the foregoing, at time t.sub.0, the current I.sub.P is negative and the voltage V.sub.ds2 is zero.

(51) As shown in FIG. 7A, a portion of the current I.sub.P charges capacitance C.sub.A2 connected in parallel with switch S.sub.2, and the voltage V.sub.ds2 increases.

(52) Moreover, as diode D.sub.1 is open and diode D.sub.2 is closed, a portion of the current I.sub.P charges the resonant circuit including the capacitor C.sub.S and the inductor L.sub.S (see FIG. 8C, which shows the current I.sub.CS which flows through capacitor C.sub.S).

(53) Specifically, if the inductance of inductor L.sub.S is higher than the magnetization inductance L.sub.M of transformer T, e.g. at least twice as high, the current I.sub.CS is low and consequently the voltage V.sub.D1 at the diode D.sub.1 substantially corresponds to the voltage V.sub.ds2, while the voltage at capacitor V.sub.CS remains approximately zero. For example, in various non-limiting embodiments, the capacitance of capacitor C.sub.S may be in the range of 1 pF-10 nF, and the inductance of inductor L.sub.S may be in the range from 200 uH-10 mH.

(54) Therefore, the main portion of current I.sub.P charges, during this operation step, capacitance C.sub.A2 until voltage V.sub.ds2 equals voltage V.sub.in. As a matter of fact, as the inductance L.sub.S has a high value, the current through capacitance C.sub.S will be small. At this stage diode D.sub.A1 may start operation, thereby keeping voltage V.sub.ds2 equal to voltage V.sub.in.

(55) At a time t.sub.1, the control unit 112 then closes switch S.sub.1 (see FIG. 7B). Specifically, the switching may take place at zero voltage, because the voltage V.sub.ds2 is equal to voltage V.sub.in.

(56) Therefore, the current I.sub.P increases in a substantially linear manner. However, a portion of the current is also provided to capacitor C.sub.S and to inductor L.sub.S. Specifically, the capacitor C.sub.S and the inductor L.sub.S are in resonance. As a consequence, the voltage V.sub.CS increases and the voltage V.sub.D1 to diode D.sub.1 decreases (see FIG. 8D).

(57) Specifically, ad a time t.sub.2, the voltage V.sub.CS to capacitor C.sub.S reaches a maximum value (substantially voltage V.sub.in) and the voltage V.sub.D1 to diode D.sub.1 becomes zero. However, the current I.sub.LS keeps on flowing through inductor L.sub.S, and therefore the diode D.sub.1 is closed.

(58) Consequently, from time t.sub.2, the intermediate point between capacitor C.sub.S and inductor L.sub.S is connected to ground GND.sub.1 (as shown in FIG. 7C). Therefore, capacitor C.sub.S keeps its voltage, and the current I.sub.LS (see FIG. 8E) flowing through inductor L.sub.S decreases in a substantially linear fashion, until current I.sub.LS becomes zero at a time t.sub.3.

(59) Therefore, at time t.sub.3 the diodes D.sub.1 and D.sub.2 are opened, i.e. the inductor L.sub.S is coupled to ground GND.sub.1 and to capacitor C.sub.RP only by means of the parasitic capacitances of the diodes D.sub.1 and D.sub.2 (see FIG. 7D).

(60) Therefore, from time t.sub.3, the electronic converter 10a behaves as a traditional electronic half-bridge converter, and the control unit 112 may open the switch S.sub.1 at a time t.sub.4. Therefore, switch S.sub.1 is closed for a time interval t1 (between times t.sub.1 and t.sub.4) and the control unit 112 may vary the duration in such a way as to regulate the output voltage V.sub.out or the output current i.sub.out to a desired value.

(61) Therefore, at time t4, the current I.sub.P is positive (and substantially exhibits the maximum amplitude). As a consequence, diode D.sub.1 is closed, thus connecting the capacitor C.sub.S in parallel with capacitance C.sub.A2 (see FIG. 7E), i.e. capacitor C.sub.S and capacitance C.sub.A2 are discharged, thus reducing voltage V.sub.ds2 (see FIGS. 8a and 8c).

(62) Specifically, at a time t.sub.5, the voltage V.sub.ds2 becomes zero, and consequently diode D.sub.1 is opened and diode D.sub.A2 is closed, i.e. capacitance C.sub.A2 and capacitor C.sub.S remain discharged.

(63) Therefore, from time t.sub.5, the control unit 112 may close switch S.sub.2 at zero voltage. For example, in FIG. 8G, the control unit 112 closes switch S.sub.2 at a time t.sub.6, wherein the duration of interval t4 (between times t.sub.4 and t.sub.6) is constant. However, the control unit may also monitor the voltage V.sub.ds2.

(64) Finally, the control unit 112 may open switch S.sub.2 at a time t.sub.0, and a new switching cycle begins. For the operation of the converter between the times t.sub.6 and t.sub.0 reference may be made to document PCT/IB2014/064657.

(65) Therefore, thanks to the use of inductor L.sub.S and of diode D.sub.2, the capacitor C.sub.S is minimally charged in the intervals between times t.sub.0 and t.sub.1. As a consequence, it is sufficient for the resonant components, e.g. the magnetization inductance L.sub.M of transformer T, to be adapted to supply a small (negative) current at the beginning of time t.sub.0. On the other hand, capacitor C.sub.S is mainly charged when switch S.sub.1 is closed and the diodes D.sub.1 and D.sub.2 allow the inductor L.sub.S to be completely discharged.

(66) On the other hand, in the interval between times t.sub.4 and t.sub.5 capacitor C.sub.S is connected, through diode D.sub.1, in parallel with capacitance C.sub.A2, thereby reducing the dV/dt ratio. As a consequence, the discharging time is increased and the electromagnetic interference is improved.

(67) In the previously discussed embodiments, a capacitor C.sub.RP is directly connected in series with the primary winding T1 of transformer T between the intermediate point of the half-bridge S.sub.1/S.sub.2 and ground GND.sub.1. Generally speaking, as stated in the foregoing, in addition or as an alternative the second terminal of the primary winding T1 or transformer T might be connected via a capacitor C.sub.RP also to the first input terminal 102a. As a matter of fact, generally speaking, the primary winding T1 of transformer T and a capacitor C.sub.RP are connected in series between the intermediate point between the two electronic switches S.sub.1/S.sub.2 and the first input terminal 102 (positive terminal) or the second input terminal 102b (negative terminal).

(68) Moreover, as shown in FIG. 9, also the snubber circuit 20 may be connected to the first input terminal 102a (positive terminal) and not to the second input terminal 102b (negative terminal). However, in such a case some modifications are required. Specifically, it would be necessary to reverse also the direction of transformer T (symbolized in the drawing as a small circle) and the operation of switches S.sub.1 and S.sub.2 would have to be inverted. Therefore, in the presently considered embodiment, switch S.sub.2 is connected to the first input terminal 102a (positive terminal) and switch S.sub.1 is connected to the second input terminal 102b (negative terminal).

(69) Finally, also the direction of diodes D.sub.1 and D.sub.2 is reversed. Therefore, in the presently considered embodiment, the snubber circuit 30 again includes a capacitor C.sub.S and a diode D.sub.1 connected in series. Specifically, in the presently considered embodiment, a first terminal of capacitor C.sub.S is connected (e.g. directly) to the intermediate point of the half-bridge S.sub.1/S.sub.2, i.e. the source terminal of transistor S.sub.2 and the drain terminal of transistor S.sub.1, which are also connected to the first terminal of primary winding T1. The second terminal of capacitor C.sub.S is connected (e.g. directly) to the cathode of diode D.sub.1, and the anode of diode D.sub.1 is connected (e.g. directly) to terminal 102a. Moreover, an inductor L.sub.S and a second diode D.sub.2 are connected (e.g. directly) between the anode of diode D.sub.1 (i.e. the second terminal of capacitor C.sub.S) and the second terminal of primary winding T1, which in turn is connected (as was previously the case) via one or more capacitors C.sub.RP to the first input terminal 102a and/or to the second input terminal 102b. Specifically, the cathode of diode D.sub.2 is directed towards the anode of diode D.sub.1 (i.e. the second terminal of capacitor C.sub.S) and the anode of diode D.sub.2 is directed towards the second terminal of primary winding T1. For example, in the presently considered embodiment, a first terminal of inductor L.sub.S is connected (e.g. directly) to the anode of diode D.sub.1 (i.e. the second terminal of capacitor C.sub.S), a second terminal of inductor L.sub.S is connected (e.g. directly) to the cathode of diode D.sub.2 and the anode of diode D.sub.2 is connected (e.g. directly) to the second terminal of primary winding T1.

(70) Of course, without prejudice to the principle of the invention, the implementation details and the embodiments may vary, even appreciably, with respect to what has been described herein by way of non-limiting example only, without departing from the scope of the invention as defined by the annexed claims. For example, the snubber circuit 30 described in the foregoing may also be used in other asymmetric electronic half-bridge converters, which make use of the magnetizing current in order to create the ZVS condition.

(71) While specific aspects have been described, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the aspects of this disclosure as defined by the appended claims. The scope is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.

(72) TABLE-US-00001 LIST OF REFERENCE SIGNS Electronic converter 10 Input terminal 102 Output terminal 104 Control circuit 112 Lighting module 20 Input terminal 200 Snubber circuit 30 Capacitor C.sub.o Parasitic capacitance C.sub.A1 Parasitic capacitance C.sub.A2 Capacitor C.sub.RP Capacitor C.sub.RS Capacitor C.sub.S Diode D Diode D.sub.1 Diode D.sub.2 Body diode D.sub.A1 Body diode D.sub.A2 Diode D.sub.S Ground GND.sub.1 Ground GND.sub.2 Current flowing through capacitor C.sub.S I.sub.CS Current flowing through inductor L.sub.S I.sub.LS Output current i.sub.out Current flowing through primary winding T1 I.sub.P Magnetization inductance of transformer T L.sub.M Inductor L.sub.o Leakage inductance of transformer T L.sub.R Resistor R.sub.S Transistor S.sub.1 Transistor S.sub.2 Transformer T Primary winding T1 Secondary winding T2 Voltage across diode D.sub.1 V.sub.D1 Drain-source voltage of transistor S.sub.2 V.sub.ds2 Gate-source voltage of transistor S.sub.1 V.sub.gs1 Gate-source voltage of transistor S.sub.2 V.sub.gs2 Input voltage V.sub.in Output voltage V.sub.out