Microfluidic MEMS printing device with piezoelectric actuation

Abstract

A microfluidic device, having a containment body accommodating a plurality of ejecting elements arranged adjacent to each other. Each ejecting element has a liquid inlet, a containment chamber, a piezoelectric actuator and an ejection nozzle. The piezoelectric actuators of each ejecting element are connected to a control unit configured to generate actuation signals and to be integrated in the containment body.

Claims

1. A microfluidic device, comprising: a containment body; a plurality of ejecting elements arranged adjacent to each other and accommodated in the containment body, each ejecting element including a liquid inlet, a containment chamber, a piezoelectric actuator, an actuation membrane portion, and an ejection nozzle; and a control circuit configured to generate actuation signals that actuate the piezoelectric actuators, wherein the control circuit is integrated in the containment body, wherein each actuation membrane portion is a part of an actuation membrane layer that carries the piezoelectric actuators, the control circuit being integrated into the actuation membrane layer.

2. The microfluidic device according to claim 1, wherein the containment body comprises a distribution region, an actuation region and a nozzle region, wherein the distribution region accommodates the liquid inlets, the actuation region includes the actuation membrane layer that carries the piezoelectric actuators, and the nozzle region forms the ejection nozzles of the ejecting elements.

3. The microfluidic device according to claim 2, wherein the distribution region, the actuation region and the nozzle region include separate, mutually bonded plates.

4. The microfluidic device according to claim 2, wherein the actuation region has a first width and at least one of the distribution region and the nozzle region has a second width smaller than the first width.

5. The microfluidic device according to claim 4, wherein the actuation region has an accessible surface portion, the microfluidic device including contact pads formed on the accessible surface portion and electrically connected to the control unit.

6. The microfluidic device according to claim 5, wherein the accessible surface portion is a peripheral portion.

7. The microfluidic device according to claim 1, wherein the control unit comprises a decoding stage and a driving stage.

8. The microfluidic device according to claim 7, wherein the decoding stage has a serial input.

9. The microfluidic device according to claim 8, wherein the decoding stage comprises shift registers and memory elements.

10. The microfluidic device according to claim 7, wherein the driving stage comprises a plurality of switches coupled to the piezoelectric actuators, respectively, each switch having a control input coupled to the decoding stage.

11. The microfluidic device according to claim 10, wherein the switches comprise LDMOS transistors.

12. The microfluidic device according to claim 11, wherein the driving stage further comprises a plurality of logic gates, each logic gate having inputs connected to the decoding stage and an output connected to a gate terminal of a respective one of the LDMOS transistors.

13. The microfluidic device according to claim 1, wherein each piezoelectric actuator of a respective ejecting element of the plurality of ejecting elements being configured to deflect the actuation membrane portion of the respective ejecting element to cause fluid in the containment chamber of the respective ejecting element to be force through the ejection nozzle of the respective ejecting element.

14. A microfluidic device, comprising: a nozzle plate including a plurality of ejection nozzles of a plurality of ejecting elements, respectively, arranged adjacent to each other; an actuator plate coupled to the nozzle plate and including a plurality of containment chambers of the plurality of ejecting elements, respectively, a plurality of actuation membrane portions of the plurality of ejecting elements, respectively, and a plurality of piezoelectric actuators of the plurality of ejecting elements, respectively, the actuator plate including an actuation membrane layer that includes the actuation membrane portions; a distribution plate coupled to the actuator plate and including a plurality of fluid inlets of the plurality of ejecting elements, respectively, and a control unit configured to generate actuation signals that actuate the piezoelectric actuators, wherein the control unit is integrated into the actuation membrane layer.

15. The microfluidic device according to claim 14, wherein each piezoelectric actuator of a respective ejecting element of the plurality of ejecting elements being configured to deflect the actuation membrane portion of the respective ejecting element to cause fluid in the containment chamber of the respective ejecting element to be force through the ejection nozzle of the respective ejecting element.

16. The microfluidic device according to claim 14, wherein the actuator plate has an accessible surface portion, the microfluidic device including contact pads formed on the accessible surface portion and electrically connected to the control unit.

17. The microfluidic device according to claim 14, wherein the control unit comprises: a driving stage configured to individually drive the piezoelectric actuators; and a decoding stage configured to receive addressing signals for the ejecting elements and cause the driving stage to drive the piezoelectric actuators based on the addressing signals.

18. The microfluidic device according to claim 17, wherein the driving stage comprises a plurality of switches coupled to the piezoelectric actuators, respectively, each switch having a control input coupled to the decoding stage.

19. An ink injection device, comprising: a plurality of ejecting elements arranged adjacent to each other, each ejecting element including an ink inlet, an ink containment chamber, a piezoelectric actuator, an actuation membrane portion, and an ink ejection nozzle, each piezoelectric actuator of a respective ejecting element of the plurality of ejecting elements being configured to deflect the actuation membrane portion of the ejecting element to cause ink in the containment chamber of the ejecting element to be force through the ink ejection nozzle of the ejecting element; and a control circuit configured to generate actuation signals that actuate the piezoelectric actuators, wherein each actuation membrane portion is a part of an actuation membrane layer that carries the piezoelectric actuators, the control circuit being integrated into the actuation membrane layer.

20. The ink injection device according to claim 19, wherein the control unit comprises: a driving stage configured to individually drive the piezoelectric actuators; and a decoding stage configured to receive addressing signals for the ejecting elements and cause the driving stage to drive the piezoelectric actuators based on the addressing signals.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

(1) For a better understanding of the present disclosure, preferred embodiments thereof are now described, purely by way of non-limiting example, with reference to the attached drawings, wherein:

(2) FIG. 1 is a cross-section of an ejecting element of a known microfluidic device of piezoelectric type;

(3) FIG. 2 is a simplified top view showing the arrangement of a plurality of ejecting elements in a microfluidic device;

(4) FIG. 3 is a cross-section of an ejecting element of the present microfluidic device;

(5) FIG. 4 is a perspective exploded view of the device of FIG. 3;

(6) FIGS. 5 and 6 are simplified circuit diagrams of different embodiments of the present device;

(7) FIG. 7 shows the behavior of electrical signals of the circuit diagram of FIG. 6; and

(8) FIGS. 8-10 show simplified circuit diagrams of other embodiments of the present device.

DETAILED DESCRIPTION

(9) FIGS. 3 and 4 show a microfluidic device 50 accommodating a plurality of ejecting elements 51, only one whereof is shown in detail in FIG. 3.

(10) The microfluidic device 50 comprises a containment body 50A formed by a nozzle plate 52, an actuator plate 53 and a distribution plate 54, mutually superposed and bonded together.

(11) The nozzle plate 52 is for example of semiconductor material, and forms a plurality of nozzles 58. In particular, the nozzle plate 52 may be formed by a first and a second nozzle layer 55, 56, of silicon, mutually bonded by means of a nozzle bonding layer 57, of silicon oxide. The nozzle plate 52 may have a thickness of about 100 m.

(12) The actuator plate 53 here comprises a structural layer 59, for example of semiconductor material with a thickness for example of 70 m, and a membrane layer 60, of material and thickness so as to be able to bend, for example silicon with a thickness between 1 and 4 m, for example 2.5 m, covered at be top and at the bottom by silicon oxide layers, not shown. The structural layer 59 forms a plurality of fluid containment chambers 61, one for each ejecting element 51, and it is fixed to the nozzle plate 52 by an intermediate bonding layer 65, for example of silicon oxide. The fluid containment chambers 61 extend through the structural layer 59 and are closed, towards the distribution plate 54, by the membrane layer 60. Each fluid containment chamber 61 is in fluid connection with a respective nozzle 58.

(13) The region of the membrane layer 60 on top of the fluid containment chamber 61 forms a membrane 79.

(14) The membrane layer 60 carries a plurality of actuators 66; each actuator 66 is arranged above a respective membrane 79, is aligned with a respective fluid containment chamber 61 and comprises a first electrode 67, a piezoelectric layer 68, for example of PZT (PbZrTiO.sub.3), and a second electrode 69. The first and the second electrode 67, 68 are electrically connected to respective first and second electrical contact lines 70, 71; insulating regions 72, for example of silicon oxide, extend on the top of the electrodes 67, 69 to electrically insulate the various conductive structures.

(15) The distribution plate 54, having a thickness for example of 400 m, is for example of semiconductor material, such as silicon, is bonded to an upper surface 53a of the membrane layer 60 through a membrane bonding layer 74, for example silicon oxide, and forms a plurality of actuator chambers 75, one for each ejecting element 51, each superposed on a respective fluid containment chamber 61 (FIG. 3). In particular, each actuator chamber 75 has a thickness for example of 100 m, surrounds a respective actuator 66 and allows its movement during the operation of the microfluidic device 50.

(16) The distribution plate 54 has a plurality of through channels 76, one for each ejecting element 51, in communication with a respective fluid containment chamber 61 via corresponding openings 77 in the membrane layer 60 and in the membrane bonding layer 74.

(17) Each through channel 76 and the associated opening 77 form a fluid inlet for the ejecting element 51.

(18) Laterally to the area of the membranes 79, the membrane layer 60 accommodates a control circuit 80, shown only schematically in FIGS. 3 and 4. In particular, as can be seen in FIG. 4, the control circuit 80 may be arranged in one or more peripheral areas of the actuator plate 53. For example, in FIG. 4, in which the microfluidic device 50, in a plan view, has a rectangular shape having long sides, the control circuit 80 is arranged in proximity to both the long sides of the microfluidic device 50.

(19) The control circuit 80 is connected to the actuators 66 through the electrical contact lines 70, 71, as shown schematically in FIG. 3.

(20) In the embodiment shown, the distribution plate 54 has a shorter width (in a direction parallel to the short sides of the microfluidic device 50) than the actuator plate 53 so that a part of the upper surface 53a of the actuator plate 53 is accessible from the outside. A plurality of contact pads 81 is formed on the accessible part of the upper surface 53a in order to allow electrical connection of the microfluidic device 50 with the outside.

(21) The control circuit 80 may be formed in various ways.

(22) For example, FIG. 5 shows an equivalent electrical diagram of an embodiment of a microfluidic device, indicated with 150, and highlights the general structure of the control circuit, here indicated with 180, the connections between the actuators 66 and the control circuit 180.

(23) The control circuit 180 in FIG. 5 comprises a decoding unit 181 and a driving stage 182.

(24) The decoding unit 181 is connected to a first group of pads (addressing pads 81A), designed to receive, in use, addressing signals for the individual ejecting elements 51 (and thus for the respective actuators 66). A further contact pad (ground pad 81B) is grounded; two activation or fire pads 81C are designed to receive a fire signal F and a power supply pad 81D receives a power supply voltage V.sub.CC. The decoding unit 181 has a plurality of outputs O1, O2, . . . , Oi, . . . , ON, in number equal to the number of individual actuators 66, and connected to the driving stage 182.

(25) The driving stage 182 comprises a plurality of switches 86, each having a control terminal connected to a respective output O1, O2, . . . , Oi, . . . , ON of the decoding unit 181. Each switch 86 is further connected to the ground pad 81B and has an output connected to a respective actuator 66 through a connection line 87. The assembly of the actuators 66 is here indicated as actuator unit 183.

(26) The switches 86 may be made by drive transistors, for example of laterally diffused metal oxide semiconductor (LDMOS) type, as shown in the enlarged detail. In this case, the gate terminal of each drive transistor is connected to a respective output O1, O2, . . . , Oi, . . . , ON of the decoding unit 181, the source terminal of each drive transistor is connected to the ground pad 81B and the drain terminal of each drive transistor is connected to a respective first connection line 87.

(27) Each first connection line 87 is connected to one of the electrodes of an actuator 66 of a respective actuator 66, for example to the second electrode 69 (FIG. 3), and thus forms one of the second electrical contact lines 71 of FIG. 3. As shown in FIG. 5, each actuator 66 is also connected to the fire pad 81C through second connection lines 88; in the considered example, thus, the second connection lines 88 correspond to the first electrical contact lines 70 of FIG. 3 and are connected to the first electrodes 67.

(28) In an embodiment, the second connection lines 88 are metal lines formed in a metal level of the microfluidic device 50 and extend over the actuator plate 53; the first connection lines 87, as well as the lines connecting the switches 86 to the ground pad 81B and to the outputs O1, O2, . . . , Oi, . . . , ON of the decoding unit 85, may be formed by conductive paths integrated in the inside of the same actuator plate 53.

(29) In the microfluidic device 150 in FIG. 5, the decoding unit 181 receives address signals from the addressing pads 81A, decodes them and selectively enables one or more switches 86, supplying appropriate signals on the respective outputs O1, O2, . . . , Oi, . . . , ON. The enabled switches 86 in turn enable the respective actuators 66 that, upon receiving the activation signal F, cause the deflection of the respective membrane 79 (FIG. 3), causing the emission of a droplet and the successive filling of the fluid containment chamber 61, in a known manner, described above with reference to FIG. 1.

(30) The two activation pads 81C are useful for a better distribution of the activation signal F, so as to avoid current peaks on the leading edges of the activation signal F, in particular when several actuators 66 are activated simultaneously. The two activation pads 81C may be connected to all the actuators 66. As an alternative, each fire pad 81C may be connected to only half of the actuators 66. However, the presence of two activation pads 81C is not mandatory and a single fire pad 81C may be provided or more than two activation pads 81C may be provided.

(31) The decoding unit may be implemented in various ways. For example, FIG. 6 shows an embodiment of a microfluidic device 250 having a decoding unit, here indicated with 281, wherein the addressing signals are supplied in parallel to the addressing pads 81A and the decoding unit 281 enables only one actuator 66 each time.

(32) In detail, in FIG. 6, the decoding unit 281 comprises a plurality of addressing lines A1-AM (for example thirteen), each connected to a respective addressing pad 81A and a plurality of decoding circuits 90 (only one shown), in the same number as the actuators 66, and thus switches 86, that may be implemented as shown in FIG. 5.

(33) The decoding circuit 90 comprises three PMOS transistors 91 and three NMOS transistors 92. The PMOS transistors 91 are mutually connected in series between a first enabling line 93 and the gate terminal of a respective switch 86. The gate terminal of each PMOS transistor 91 is connected to an addressing line A1-AM according to an addressing logic. The NMOS transistors 92 are each connected between a respective drain terminal of the PMOS transistors 91 and the second connection lines 88; the gate terminals of the NMOS transistors 92 are connected to a second enabling line 94.

(34) The first and the second enabling lines 93, 94 are connected with the outside through further enabling pads 81D-1 and 81D-2 for receiving control signals for the PMOS transistors 91 and for the NMOS switches 92. In particular, as shown in FIG. 7, illustrating the behavior of some signals in the decoding unit 281 and the ejecting elements 51.sub.1, 52.sub.2, . . . , 52.sub.N actuated each time, during operation of the microfluidic device 250, the first enabling line 93 supplies a logic signal at the high logic state, for example 3.3 V, enabling the PMOS transistors 91, and the addressing lines A1-AM supply activation pulses. In this phase, the second enabling line 94 continues switching between a high level and a low level. In detail, the second enabling line 94 supplies a low signal and turns NMOS transistors 92 off during the activation pulses supplied on the addressing lines A1-AM and supplies a high logic signal in the intervals between the activation pulses, namely when the lines A1-AM are all high at the same potential of the first enabling line 93. In the intervals between the activation pulses, the PMOS transistors 91 are thus off, the NMOS transistors 92 are on and discharge the floating nodes between the PMOS transistors 91 and the gate terminal of the respective switch 86. The logic signal on the first enabling line 93 is at the low logic state when the decoding unit 281 is at rest.

(35) With the solution in FIG. 6, thus, only one decoding circuit 90 is enabled each time, depending on the addressing signals supplied to the addressing lines A1-AM via the addressing pads 81A and on the wired logic through the connections between the addressing lines A1-AM and the PMOS transistors 91, and supplies a corresponding firing signal to the respective switch 86.

(36) The embodiment in FIG. 6 of the decoding unit 281 also allows the characteristics of each actuator 66 to be measured through the fire pad 81C. In fact, the fire pad 81C allows the enabled actuator 66 to be directly connected with the outside through the respective switch 86. This allows various measurements, for example losses, capacitance or impedance, to be carried out in order to detect the characteristics of the actuator 66, in particular of the piezoelectric layer 68, for example during EWSElectrical Wafer Sort test) or at the level of the finished microfluidic device 250 and/or when the latter is mounted in an electronic apparatus. In this way, each actuator 66 may be characterized and controlled, verifying the operation quality thereof, at time zero and/or during the lifetime of the product (on the field).

(37) FIG. 8 shows a microfluidic device 350 wherein the decoding unit, here indicated with 381, receives the addressing signals in serial mode, on a single addressing pad 81A. The decoding unit 381, not shown in detail, is substantially formed by shift registers 317 and memory elements (latches) 318 and it is furthermore connected to a timing pad 81E, receiving a clock signal CLK, to an enabling pad 81F, receiving an enabling signal EN, to a reset pad 81G, receiving a reset signal R, and to an output pad 81H, to output signals and/or control commands, in particular when several fluidic devices 350 are cascade-connected.

(38) For the rest, the microfluidic device 350 of FIG. 8 is similar to the microfluidic device 150 of FIG. 5 and will not be described further.

(39) In the microfluidic device 350 of FIG. 8, the address of the ejecting element or elements 51 (and thus of the respective actuators 66) that are simultaneously enabled is introduced in serial mode through the addressing pad 81A, shifted through the shift registers 317 and stored by the latches 318 which selectively enable the switches 86, supplying appropriate signals on the respective outputs O1, O2, . . . , Oi, . . . , ON.

(40) FIG. 9 shows a microfluidic device 450 receiving the addresses in serial mode, analogously to the solution of FIG. 8; in FIG. 9 the decoding unit, here indicated with 481, has a structure that reduces the number of shift registers. In particular, in the embodiment of FIG. 9, four addressing bits and sixteen data bits are supplied on the addressing pad 81A. In the example illustrated, the decoding unit 481 comprises a sixteen-bit word shift register 417, connected at its input to the addressing pad(s) 81A and connected at its output to sixteen data memory elements 418 (for example, latches) and to a four-bit address shift register 419. The address shift register 419 is connected to an address memory element 420. The address memory element 420 is connected at its output to an address decoder 421 having sixteen column outputs C1-C16. The data memory element 418 has sixteen row outputs R1-R16.

(41) Furthermore, analogously to FIG. 8, the microfluidic device 450 is connected to the pads 81B-81H in order to receive/transmit corresponding signals and to supply the provided voltages.

(42) The row outputs R1-R16 and the column outputs C1-C16 are connected to the switches, here indicated as 486, one whereof is shown by way of example in the enlarged detail. In particular, each switch 486 comprises an AND gate 487 and a drive transistor 488, of the LDMOS type. Each AND gate 487 is connected to the enabling pad 81F, and also to a respective row output Ri and to a respective column output Cj; the various connection combinations of the inputs of the AND gates 487 of the switches 486 with the row outputs R1-R16 and the column outputs C1-C16 thus allow an actuator 66 or a plurality of actuators 66 connected to the same column output C1-C16 to be independently selected.

(43) The embodiment of FIG. 9 thus allows up to sixteen actuators 66 to be simultaneously controlled.

(44) FIG. 10 shows a microfluidic device 550 wherein the decoding unit 581 comprises a sixteen-bit word shift register 517, connected at its input to the addressing pad(s) 81A and at its output to a four-bit address shift register 519. The outputs of the address shift register 519 are connected to an address decoder 521 having sixteen column outputs C1-C16. The word shift register 517 has sixteen row outputs R1-R16.

(45) The row and column outputs R1-R16, C1-C16 are connected to an addressing matrix 530 having a plurality of AND gates each arranged at a respective intersection node between the row outputs R1-R16 and the column outputs C1-C16. In the instant example of sixteen rows and sixteen columns, the addressing matrix 530 thus has 1616=256 nodes, each whereof supplies an enable state for a respective switch 586. These states are stored in a state memory 531, for example comprising a 256-bit latch. The outputs of the state memory 531 are each connected to a respective switch 586, for example formed by an LDMOS transistor, as shown in FIG. 5.

(46) The microfluidic device 450 of FIG. 10 can thus be implemented with fewer shift registers compared with the microfluidic device 450 of FIG. 9, however with a larger number of memory cells. In this way, it is furthermore possible to control sixteen actuators 66 in parallel (i.e., the actuators 66 controlled by the same row of the addressing matrix 530) speeding up the liquid ejection cycle and thus printing.

(47) The microfluidic device described here has numerous advantages.

(48) First, it allows the number of external contact pads to be drastically reduced, reducing the complexity of the wiring operations and thus increasing the yield.

(49) Furthermore, the area needed for forming the pads is reduced.

(50) The assembly is notably simpler than known microfluidic devices, for a same number of ejecting elements, and thus the assembly costs are reduced.

(51) The integration of the decoding and driving electronics is not critical from the point of view of the thermal budget, since the ejected ink or liquid acts as a cooling fluid.

(52) Finally, it is apparent that modifications and variants may be applied to the microfluidic device described and illustrated without however departing from the scope of the present disclosure.

(53) In particular, the decoding unit may be formed in any desired manner.

(54) Furthermore, the described microfluidic device may be used in a different apparatus. In particular, other than in an inkjet printer apparatus, it may be used for ink and/or fragrance sprayers, where it is desired to selectively control at least groups of ejecting elements.

(55) The described microfluidic device may be also used for example in an apparatus of a biological or biomedical type, for local application of biological material (e.g., DNA) during manufacturing of sensors for biological analyses, and/or for administration of medicines.

(56) The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.