GROWTH SUBSTRATE AND METHOD FOR MANUFACTURING AN OPTOELECTRONIC SEMICONDUCTOR BODY

Abstract

In an embodiment a growth substrate includes a substrate and a buffer layer sequence having a plurality of semiconductor layers based on a nitride semiconductor compound material and a plurality of buffer layers, wherein the semiconductor layers and the buffer layers are arranged alternatingly, and wherein the buffer layers comprise at least one of the following two-dimensional layered materials: graphene, boron nitride, MoS.sub.2, WSe.sub.2 or fluorographene.

Claims

1-18. (canceled)

19. A growth substrate comprising: a substrate; and a buffer layer sequence comprising a plurality of semiconductor layers based on a nitride semiconductor compound material and a plurality of buffer layers, wherein the semiconductor layers and the buffer layers are arranged alternatingly, and wherein the buffer layers comprise at least one of the following two-dimensional layered materials: graphene, boron nitride, MoS2, WSe2 or fluorographene.

20. The growth substrate according to claim 19, wherein the growth substrate is configured for epitaxial growth of an epitaxial semiconductor layer sequence based on a III/V semiconductor compound material or based on a II/VI semiconductor compound material.

21. The growth substrate according to claim 19, wherein the growth substrate is configured for epitaxial growth of an epitaxial semiconductor layer sequence based on the nitride semiconductor compound material.

22. The growth substrate according to claim 19, wherein an aluminum content of the semiconductor layers increases from the substrate in a linear or stepwise manner.

23. The growth substrate according to claim 19, wherein an indium content of the semiconductor layers increases from the substrate in a linear or stepwise manner.

24. The growth substrate according to claim 19 wherein the semiconductor layers of the buffer layer sequence are epitaxially grown.

25. The growth substrate according to claim 19, wherein the semiconductor layers have a thickness between 1 nanometer and 2 micrometer, inclusive.

26. The growth substrate according to claim 19, wherein the buffer layers have a thickness between 1.3 nanometer and 500 nanometer, inclusive.

27. The growth substrate according to claim 19, wherein the substrate comprises sapphire, (In,Al,Ga)N, silicon, silicon carbide, or glass.

28. The growth substrate according to claim 19, wherein the semiconductor layers of the buffer layer sequence are strain relaxed.

29. A method for manufacturing an optoelectronic semiconductor body, the method comprising: providing the growth substrate according to claim 19; and epitaxial growing a semiconductor layer sequence based on a semiconductor compound material on a main surface of the growth substrate, wherein the epitaxial semiconductor layer sequence comprises an active zone for generating and/or detecting electromagnetic radiation.

30. The method according to claim 29, further comprising removing the epitaxial semiconductor layer sequence from the growth substrate by exfoliating.

31. The method according to claim 29, wherein the epitaxial semiconductor layer sequence is arranged on a carrier.

32. The method according to claim 29, wherein the active zone is configured to generate and/or detect electromagnetic radiation with a wavelength between 200 nanometer and 1,770 nanometer, inclusive.

33. The method according to claim 29, wherein providing the growth substrate comprises: providing the substrate; and depositing the buffer layer sequence on the substrate, wherein depositing the buffer layer sequence takes place in the same deposition chamber as epitaxial growing the epitaxial semiconductor layer sequence.

34. The method according to claim 29, wherein providing the growth substrate comprises: providing the substrate; and depositing the buffer layer sequence on the substrate, wherein depositing the plurality of buffer layers of the buffer layer sequence takes place in different deposition chambers.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Further advantageous embodiments and developments of the growth substrate and the method for manufacturing an optoelectronic semiconductor body result from the exemplary embodiment described below in connection with the Figures.

[0054] FIG. 1 shows a schematic sectional view of a growth substrate according to an exemplary embodiment;

[0055] FIG. 2 shows a schematic sectional view of a growth substrate according to a further exemplary embodiment;

[0056] FIG. 3 shows a schematic sectional view of a stage of a method for producing a semiconductor body according to an exemplary embodiment;

[0057] FIG. 4 shows a further schematic sectional view of a stage of a method according to an exemplary embodiment;

[0058] FIG. 5 shows a further schematic sectional view of a stage of a method for producing a semiconductor body according to an exemplary embodiment;

[0059] FIG. 6 shows a further schematic sectional view of a further stage of a method for producing a semiconductor body according to an exemplary embodiment; and

[0060] FIG. 7 shows a further schematic sectional view of a further stage of a method for producing a semiconductor body according to an exemplary embodiment.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0061] Equal or similar elements as well as elements of equal function are designated with the same reference signs in the Figures. The Figures and the proportions of the elements shown in the Figures are not regarded as being shown to scale. Rather, single elements, in particular layers, can be shown exaggerated in magnitude for the sake of better presentation and/or better understanding.

[0062] The growth substrate 1 according to the exemplary embodiment of FIG. 1 comprises a substrate 2. The substrate 2 might comprise or consists of sapphire, silicon, silicon carbide, (In,Al,Ga)N or a nanocrystalline material such as glass.

[0063] Furthermore, the growth substrate 1 according to the exemplary embodiment of FIG. 1 comprises a buffer layer sequence 3. The buffer layer sequence 3 is arranged in direct contact on the substrate 2. The buffer layer sequence 3 of the growth substrate 1 according to the exemplary embodiment of FIG. 1 is formed from one single buffer layer 31 and one single semiconductor layer 32.

[0064] The buffer layer 31 is arranged in direct contact with a main surface 4 of the substrate 2. The buffer layer 31 comprises a two-dimensional layered material or consists of a two-dimensional layered material. For example, the buffer layer 31 comprises or consists of at least one of the following two-dimensional layered materials: graphene, boron nitride, MoS.sub.2, WSe.sub.2, fluorographene.

[0065] The semiconductor layer 32 of the buffer layer sequence 3 according to the exemplary embodiment of FIG. 1 is positioned in direct contact on the buffer layer 31. The semiconductor layer 32 of the buffer layer sequence 3 comprises or consists of a semiconductor compound material. For example, the semiconductor layer 32 comprises or consists of a nitride semiconductor compound material. In particular, the semiconductor layer 32 comprises or consists of a semiconductor compound material of the same material system as the epitaxial semiconductor layer sequence 5 to be grown on the growth substrate 1.

[0066] Further, the growth substrate 1 of the exemplary embodiment of FIG. 1 has a main surface 6 onto which the epitaxial semiconductor layer sequence 5 will be grown. The main surface 6 of the growth substrate 1 is formed by a surface of the semiconductor layer 32. Further, the main surface 6 of the growth substrate 1 is freely accessible.

[0067] The growth substrate 1 according to the exemplary embodiment of FIG. 2 also comprises a substrate 2, for example comprising or consisting of sapphire, silicon carbide, glass or some other already mentioned material.

[0068] Further, the growth substrate 1 according to the exemplary embodiment of FIG. 2 comprises a buffer layer sequence 3 arranged on a main surface 4 of the substrate 2. At present, the buffer layer sequence 3 is deposited in direct contact on a main surface 4 of the substrate 2.

[0069] The buffer layer sequence 3 of the growth substrate 1 according to the exemplary embodiment of FIG. 2 comprises three buffer layers 31, 31, 31, each comprising or consisting of boron nitride. It is also possible that the buffer layers 31, 31, 31 of the buffer layer sequence 3 comprise or consists another two-dimensional layered material. Further, it is possible that the buffer layer sequence 3 comprises more or less than three buffer layers 31, 31, 31. In particular, the buffer layers 31, 31, 31 of the buffer layer sequence 3 can comprise or consist of different two-dimensional layered materials. For example, some of the buffer layers 31 of the buffer layer sequence 3 comprise or consist of graphene, while other buffer layers 31 of the buffer layer sequence 3 comprise or consist of boron nitride.

[0070] Furthermore, the buffer layer sequence 3 comprises three semiconductor layers 32, 32, 32. Further, it is possible that the buffer layer sequence 3 comprises more or less than three semiconductor layers 32, 32, 32. Preferably, the number of the buffer layers 31 of the buffer layer sequence 3 and the number of the semiconductor layers 32 of the buffer layer sequence 3 are equal. The semiconductor layers 32 and the buffer layers 31 are arranged alternatingly with each other.

[0071] Further, one buffer layer 31 is arranged directly adjacent to the substrate 2, while a main surface 6 of the growth substrate 1 intended for epitaxial growth of an epitaxial semiconductor layer sequence 5 is formed by a semiconductor layer 32.

[0072] Each of the semiconductor layers 32, 32, 32 of the buffer layer sequence 3 comprises or consists of a nitride compound semiconductor material. At present, the semiconductor layers 32, 32, 32 of the buffer layer sequence 3 comprise or consist of InGaN. In particular, the indium content of the semiconductor layers 32, 32, 32 is increasing with the distance to the substrate 2. In other words, the semiconductor layer 32 closest to the substrate 2 has the lowest indium content, while the semiconductor layer 32 arranged at a largest distance from the substrate 2 has the highest indium content.

[0073] The semiconductor layer 32 closest to the substrate 2 has a material composition In.sub.xGa.sub.1-xN, while the semiconductor layer 32 having the largest distance to the substrate 1 has a material composition of In.sub.zGa.sub.1-zN. The semiconductor layer 32 in between has a material composition of In.sub.yGa.sub.1-yN. Furthermore, the relation is x<y<z valid.

[0074] Alternatively, the semiconductor layers 32, 32, 32 of the buffer layer sequence 3 comprise or consist of AlGaN. In particular, the aluminium content of the semiconductor layers 32, 32, 32 is increasing with the distance to the substrate 2. In other words, the semiconductor layer 32 closest to the substrate 2 has the lowest aluminium content, while the semiconductor layer 32 arranged at the largest distance to the substrate 2 has the highest aluminium content.

[0075] The semiconductor layer 32 closest to the substrate 2 has a material composition Al.sub.xGa.sub.1-xN, while the semiconductor layer 32 having the largest distance to the substrate 2 has a material composition of Al.sub.zGa.sub.1-zN. The semiconductor layer 32 in between has a material composition of Al.sub.yGa.sub.1-yN. Furthermore, the relation is x<y<z valid. It is also possible that z<y<x is valid.

[0076] In a first step of the method of the exemplary embodiment of FIGS. 3 to 7, a growth substrate 1 is provided in a first step, for example in a deposition chamber 7 (FIG. 3). The growth substrate 1 might be embodied as, for example, already described in connection with FIGS. 1 and 2.

[0077] The growth substrate 1 comprises a buffer layer sequence 3 with a plurality of buffer layers 31 and a plurality of semiconductor layers 32. The buffer layers 31 and the semiconductor layers 32 are arranged alternatingly. The semiconductor layers 32 are formed from a semiconductor compound material, while the buffer layers 31 are formed from a two-dimensional layered material.

[0078] The growth substrate 1 has a main surface 6 intended for the growth of an epitaxial semiconductor layer sequence 5. The main surface 6 intended for the growth of the epitaxial semiconductor layer sequence 5 is formed from the material of one of the semiconductor layers 32. A lattice constant of the material of the main surface 6 intended for the growth of the epitaxial semiconductor layer sequence 5 is similar to a lattice constant of the epitaxial semiconductor layer sequence 5 to be grown on the main surface 6 of the growth substrate 1.

[0079] After providing the growth substrate 1 in the deposition chamber 7, an epitaxial semiconductor layer sequence 5 based on a compound semiconductor material is epitaxially grown on the main surface 6 of the growth substrate 1 (FIG. 4).

[0080] For example, the buffer layer sequence 3 is deposited in the deposition chamber 7 prior to the growth of the epitaxial semiconductor layer sequence 5 without leaving the deposition chamber 7. In this case, the layers of the buffer layer sequence 3, namely the semiconductor layers 32 and the buffer layers 31 are grown by the same method as the epitaxial semiconductor layer sequence 5, preferably by MOVPE.

[0081] Alternatively, it is also possible to deposit the layers of the buffer layer sequence 3 and the epitaxial semiconductor layer sequence 5 by different deposition methods. For example, the layers of the buffer layer sequence 3 are deposited by PVD, CVD, ALD and/or MBE, while the epitaxial semiconductor layer sequence 5 is deposited by MOVPE.

[0082] The epitaxial semiconductor layer sequence 5 comprises an active zone 8, which is configured to emit or to detect electromagnetic radiation during operation. The active zone 8 comprises for example a pn-transition, a double hetero structure, a single quantum structure or a multi quantum structure for the generation and/or detection of the electromagnetic radiation. Here, the term quantum structure means quantum wells, quantum wires as wells as quantum dots.

[0083] At present, the epitaxial semiconductor layer sequence 5 grown on the main surface 6 of the growth substrate 1 is based on a nitride compound semiconductor material. Further, the semiconductor layers 32 of the buffer layer sequence 3 are also based on a nitride compound semiconductor material.

[0084] In a next step, which is schematically shown in FIG. 5, the epitaxial semiconductor layer sequence 5 is removed from the deposition chamber 7 and is mechanically removed, for example exfoliated, from the growth substrate 1, for example with the help of a chuck 9. The chuck 9 adheres to the epitaxial semiconductor layer sequence 5 with the help of vacuum and applies a force F such that the epitaxial semiconductor layer sequence 5 is removed from the growth substrate 1.

[0085] During the exfoliation process it is possible that a part of the buffer layer sequence 3 still remains at the epitaxial semiconductor layer sequence 5. In other words, it is possible that a separation due to the applied force F by the chuck 9 takes place within the buffer layer sequence 3.

[0086] As shown schematically in FIG. 6, after exfoliation of the epitaxial semiconductor layer sequence 5 from the growth substrate 1, the epitaxial semiconductor layer sequence 5 is separated from the growth substrate 1.

[0087] Before or after the exfoliation it is possible that the epitaxial semiconductor layer sequence 5 is arranged on a carrier 10 (FIG. 7). The carrier 10 is configured to mechanically stabilize the epitaxial semiconductor layer sequence 5. For example, the carrier is fixed to the epitaxial semiconductor layer sequence 5 by the help of a joining layer (not shown). The semiconductor body manufactured by the method according to the exemplary embodiment of FIGS. 3 to 7 comprises the epitaxial semiconductor layer sequence 5 and the carrier 10.

[0088] The features and exemplary embodiments described in connection with the Figures can be combined with each other according to further exemplary embodiments, even if not all combinations are explicitly described. Furthermore, the exemplary embodiments described in connection with the Figures may alternatively or additionally have further features according to the description in the general part.

[0089] The invention is not limited to the description of the embodiments. Rather, the invention comprises each new feature as well as each combination of features, particularly each combination of features of the claims, even if the feature or the combination of features itself is not explicitly given in the claims or embodiments.