REFLECTIVE INTELLIGENT REFLECTING SURFACE FLEXIBLE BOARD

Abstract

Provided is a reflective intelligent reflecting surface (IRS) flexible board, which includes: a flexible film; and a plurality of unit cells formed on the flexible film, in which each of the plurality of unit cells includes an IC for adjusting a reflection phase, a line pattern for driving the IC, and first and second antenna patterns formed symmetrically to each other based on the IC or the line pattern.

Claims

1. A reflective intelligent reflecting surface (IRS) flexible board, comprising: a flexible film; and a plurality of unit cells formed on the flexible film, wherein each of the plurality of unit cells includes an IC for adjusting a reflection phase, a line pattern for driving the IC, and first and second antenna patterns formed symmetrically to each other based on the IC or the line pattern.

2. The reflective IRS flexible board of claim 1, wherein the line pattern, and the first and second antenna patterns are printed on the flexible film with at least one of conductive ink and functional ink.

3. The reflective IRS flexible board of claim 1, wherein the line pattern includes a ground line, a serial line, a clock line, and a power line on which the IC is mounted.

4. The reflective IRS flexible board of claim 1, wherein the first and second antenna patterns phase-adjust a first RF signal incident according to an operation of the IC 150 to reflect a second RF signal.

5. The reflective IRS flexible board of claim 1, wherein the first and second antenna patterns have a polygonal shape.

6. The reflective IRS flexible board of claim 1, wherein a pinching angle between contiguous sides of each of the first and second antenna patterns is 90° to 150°.

7. The reflective IRS flexible board of claim 1, wherein the line pattern includes the ground line, the serial line, the clock line, and the power line on which the IC is mounted, and the IC includes a PIN diode connected to the ground line, a D-flipflop connected to the PIN diode, the serial line, and the clock line, and performing an on/off operation of the PIN diode, and an RF choke connected to the power line, and preventing an RF signal from being input into DC power input into the IC through the power line.

8. The reflective IRS flexible board of claim 7, wherein the RF choke is a low pass filter constituted by an LC circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0027] FIG. 1 is a brief perspective view illustrating a reflective intelligent reflecting surface (IRS) flexible board according to the present disclosure;

[0028] FIG. 2 is an enlarged view of enlarging an IRS unit cell illustrated in FIG. 1;

[0029] FIG. 3 is a diagram illustrating a connection structure of an IC illustrated in FIG. 2;

[0030] FIG. 4 is an equivalent circuit diagram of the IRS unit cell illustrated in FIG. 2;

[0031] FIGS. 5A-5B are diagrams illustrating a simulation result for the IRS unit cell illustrated in FIG. 2; and

[0032] FIG. 6 is a diagram illustrating a electric field distribution of the IRS unit cell illustrated in FIG. 2.

DETAILED DESCRIPTION

[0033] The present disclosure may have various modifications and various exemplary embodiments and specific exemplary embodiments will be illustrated in the drawings and described in detail. However, this does not limit the present disclosure to specific exemplary embodiments, and it should be understood that the present disclosure covers all the modifications, equivalents, and replacements included within the idea and technical scope of the present disclosure. In describing each drawing, like reference numerals refer to like elements.

[0034] Terms including first, second, A, B, and the like are used for describing various constituent elements, but the constituent elements are not limited by the terms. The terms are used only to discriminate one element from another element. For example, a first component may be referred to as a second component, and similarly, the second component may be referred to as the first component without departing from the scope of the present disclosure. A term and/or includes a combination of a plurality of associated disclosed items or any item of the plurality of associated disclosed items.

[0035] It should be understood that, when it is described that a component is “connected to” or “accesses” another component, the component may be directly connected to or access the other component or a third component may be present therebetween. In contrast, when it is described that a component is “directly connected to” or “directly accesses” another component, it is understood that no element is present between the element and another element.

[0036] Terms used in the present application are used only to describe specific exemplary embodiments, and are not intended to limit the present disclosure. A singular form may include a plural form if there is no clearly opposite meaning in the context. In the present application, it should be understood that a term “include” or “have”indicates that a feature, a number, a step, an operation, a component, a part, or the combination thereof described in the specification is present, but does not exclude a possibility of presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof, in advance.

[0037] If it is not contrarily defined, all terms used herein including technological or scientific terms have the same meanings as those generally understood by a person with ordinary skill in the art. Terms which are defined in a generally used dictionary should be interpreted to have the same meaning as the meaning in the context of the related art, and are not interpreted as an ideal meaning or excessively formal meanings unless clearly defined in the present application.

[0038] Hereinafter, a preferred exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] FIG. 1 is a brief perspective view illustrating a reflective intelligent reflecting surface (IRS) flexible board according to the present disclosure, FIG. 2 is an enlarged view of enlarging an IRS unit cell illustrated in FIG. 1, and FIG. 3 is a diagram illustrating a connection structure of an IC illustrated in FIG. 2.

[0040] Referring to FIGS. 1 to 3, the reflective IRS flexible board 100 may include a flexible film 110 and a plurality of IRS unit cells 120 (hereinafter, referred to as ‘unit cell’).

[0041] Here, the flexible film 110 may be a flexible transparent film having a thickness of approximately 0.1 mm.

[0042] In the exemplary embodiment, the flexible film 110 may be in a state in which at least two films overlap with each other, and is not limited thereto.

[0043] That is, the flexible film 110 may include a base film (not illustrated) in which the plurality of unit cells 120 is formed and a cover film (not illustrated) laminated on the base film to protect the plurality of unit cells 120, and is not limited thereto.

[0044] A cutting line 105 may be displayed on the flexible film 110, and the plurality of unit cells 120 may be cut and used on the flexible film 110 to meet a use purpose.

[0045] Each of the plurality of unit cells 120 may include a line pattern 130, first and second antenna patterns 142 and 144, and an IC 150.

[0046] In the exemplary embodiment, it is described that the IC 150 is mounted on each of the plurality of unit cells 120, but the present disclosure is not limited thereto.

[0047] First, the line pattern 130 may include a ground line 132, a serial line 134, a clock line 136, and a power line 138.

[0048] In this case, the ground line 132, the serial line 134, the clock line 136, and the power line 138 may be formed with a thickness of 0.1 mm, and an interval between respective lines among the ground line 132, the serial line 134, the clock line 136, and the power line 138 may be 0.2 mm.

[0049] The line pattern 130, and the first and second antenna patterns 142 and 144 may be printed on the flexible film 110 with at least one of conductive ink and functional ink.

[0050] The first and second antenna patterns 142 and 144 phase-adjust a first RF signal incident according to an operation of the IC 150 to reflect a second RF signal.

[0051] Here, the first and second antenna patterns 142 and 144 may have a polygonal shape, and a pinching angle between contiguous sides of each of the first and second antenna patterns 142 and 144 may be 90° to 150°, but the present disclosure is not limited thereto.

[0052] The first and second antenna patterns 142 and 144 may be formed symmetrically to each other based on the line pattern 130 or the IC 150.

[0053] Here, the first and second antenna patterns 142 and 144 may resonate at a desired frequency based on resonance properties, and reduce cost.

[0054] The IC 150 may include a PIN diode (PIN-D), a D-flipflop (FF), and an RF choke (CH).

[0055] The PIN diode (PIN-D) may be connected to the ground line 132.

[0056] The D-flipflop (FF) may be connected to the PIN diode (PIN-D), the serial line 134, and the clock line 136, and may perform an on/off operation of the PIN diode (PIN-D).

[0057] That is, the D-flipflop (FF) connects the clock line 136 to the inside to use the clock line 136 as C and a clock signal of a data signal output from the serial line 134.

[0058] Here, the data signal may be output to the PIN diode (PIN-D), and may form a closed loop with a negative electrode of the PIN diode (PIN-D) and the ground of the IC 150.

[0059] The D-flipflop may be constituted by one D-flipflop serving as a memory device and a delivery device, and may receive and store a control signal through a serial terminal 132, and stored data may be output from Q whenever the clock signal becomes 1.

[0060] The RF choke (CH) may minimize interference between an incident RF signal and DC power which flows on the power line 138.

[0061] That is, the RF choke (CH) may be connected to the power line 138, and may prevent the RF signal from being input into the DC power input into the IC 150 through the power line 138.

[0062] Here, the RF choke (CH) may be a low pass filter constituted by an LC circuit, and is not limited thereto.

[0063] FIG. 4 is an equivalent circuit diagram of the IRS unit cell illustrated in FIG. 2, FIG. 5 is a diagram illustrating a simulation result for the IRS unit cell illustrated in FIG. 2, and FIG. 6 is a diagram illustrating a electric field distribution of the IRS unit cell illustrated in FIG. 2.

[0064] FIG. 4, as an equivalent circuit diagram of the unit cell 120, illustrates an equivalent circuit for the line pattern 130, the first and second antenna patterns 140, and the IC 150.

[0065] FIGS. 5A-5B illustrate a simulation result for the unit cell 120.

[0066] FIG. 5A is a diagram illustrating a phase response in the on/off operation of the unit cell 120 and FIG. 5B is a diagram illustrating a size response in the on/off operation of the unit cell 120.

[0067] In FIGS. 5A and 5B, the unit cell operates like an R-L-C resonance circuit, a reflection phase is changed from −180° to 180° at a resonance point, and when the PIN diode (PIN-D) is turned on or off, it is possible to shift the reflection phase by changing a resonant frequency of a patch, and a simulation for a reflection phase and a reflection size between ON and OFF states of the PIN diode (PIN-D) is illustrated.

[0068] FIG. 6, as a diagram illustrating the electric field distribution of the unit cell, illustrates a electric field distribution generated in the first and second antenna patterns 142 and 144 in the on/off operation of the PIN diode (PIN-D).

[0069] As can be seen in FIGS. 4 to 6, an OFF state reflection phase of the unit cell 120 in which the PIN diode (PIN-D) is positioned is ahead of that in the ON state at a target frequency by 180 degrees.

[0070] The reflection size may be confirmed as approximately −3 dB, and loss may occur by a structure of a unit cell 120 storing resistance or energy of the PIN diode (PIN-D).

[0071] Features, structures, effects, and the like described in the above exemplary embodiments are included in at least one exemplary embodiment of the present disclosure, and are not particularly limited to only one exemplary embodiment. Furthermore, features, structures, effects, and the like exemplified in each exemplary embodiment may be combined or modified for other exemplary embodiments those skilled in the art to which the exemplary embodiments pertain. Therefore, the contents related to such combinations and modifications should be interpreted as being included in the scope of the present disclosure.

[0072] In addition, although the exemplary embodiments have been mainly described above, these are merely examples and do not limit the present disclosure, and those skilled in the art to which the present disclosure pertains will know that various modifications and applications not illustrated above can be made within the scope without departing from the essential characteristics of the exemplary embodiment. For example, each component specifically shown in the exemplary embodiment may be implemented by being modified. In addition, it will be interpreted that differences related to the modifications and applications are included in the scope of the present disclosure defined in the appended claims.