ELECTRONIC CIRCUIT AND CORRESPONDING PROTECTION METHOD

20240260176 ยท 2024-08-01

Assignee

Inventors

Cpc classification

International classification

Abstract

The invention relates to an electronic circuit comprising a substrate and at least one electronic component (3, 6), each electronic component (3, 6) including at least one data port (12) for receiving data, the electronic circuit (2) further comprising, for each data port (12): a current injection terminal (8); a breakable electrical trace (10) located in the thickness of the substrate and extending between the data port (12) and the injection terminal (8), each breakable electrical trace (10) comprising a fusible segment (20) and being configured to break, by melting of the fusible segment (20), upon the injection, at the injection terminal (8), of an electric current (I) having an intensity greater than a predetermined trace breaking threshold.

Claims

1. An electronic circuit comprising: a substrate; at least one electronic component, wherein each electronic component comprises at least one data port that receives data; and, for each data port of the at least one data port, a current injection terminal, and a breakable electrical trace located in a thickness of the substrate and extending between the each data port and the current injection terminal, wherein the breakable electrical trace comprises a fusible segment, and wherein the breakable electrical trace is configured to break, by melting of the fusible segment, upon an injection, at the current injection terminal, of an electric current having an intensity greater than a predetermined trace breaking threshold.

2. The electronic circuit according to claim 1, wherein the breakable electrical trace further comprises a first conductive segment connected between the fusible segment and the current injection terminal.

3. The electronic circuit according to claim 2, wherein the fusible segment comprises an electrical resistance per unit length greater than an electrical resistance per unit length of the first conductive segment.

4. The electronic circuit according to claim 2, wherein the fusible segment further comprises a thermal resistance greater than a thermal resistance of the first conductive segment.

5. The electronic circuit according to claim 2, wherein the fusible segment comprises a section smaller than a section of the first conductive segment.

6. The electronic circuit according to claim 2, wherein the breakable electrical trace further comprises a second conductive segment connected between the fusible segment and the each data port corresponding therewith.

7. The electronic circuit according to claim 6, further comprising, for said each data port, a current output terminal that connects to a potential reference.

8. The electronic circuit according to claim 7, wherein said each electronic component is connected to the current output terminal.

9. The electronic circuit according to claim 7, wherein the breakable electrical trace further comprises an auxiliary conductive segment located in the thickness of the substrate and connected between the fusible segment corresponding therewith and the current output terminal.

10. The electronic circuit according to claim 9, wherein, for said at least one data port, the first conductive segment and the auxiliary conductive segment of the breakable electrical trace corresponding therewith extend along a same first axis; and the second conductive segment of the breakable electrical trace corresponding therewith extends along a second axis that is not parallel and that is perpendicular to the same first axis.

11. The electronic circuit according to claim 9, wherein, for said at least one data port, the first conductive segment, the second conductive segment, and the auxiliary conductive segment of the breakable electrical trace corresponding therewith extend along parallel axes; and the current output terminal is closer to the current injection terminal than to said at least one data port corresponding therewith.

12. The electronic circuit according to claim 9, wherein, for said each data port, at least one of the first conductive segment and the auxiliary conductive segment of the breakable electrical trace corresponding therewith comprises a first part and a second part closer to the fusible segment than the first part, wherein a width of the second part is greater than a width of the first part in order to form a heat sink.

13. A method for protecting an electronic component comprised in an electronic circuit, wherein said electronic circuit comprises a substrate; at least one electronic component, wherein each electronic component comprises at least one data port that receives data; and, for each data port of the at least one data port, a current injection terminal, and a breakable electrical trace located in a thickness of the substrate and extending between the each data port and the current injection terminal, wherein the breakable electrical trace comprises a fusible segment, and wherein the breakable electrical trace is configured to break, by melting of the fusible segment, upon an injection, at the current injection terminal, of an electric current having an intensity greater than a predetermined trace breaking threshold; the method comprising: for said each data port, connecting the current injection terminal to a current source; and injecting, at the current injection terminal, the electric current having an intensity greater than the predetermined trace breaking threshold.

14. The method according to claim 13, wherein the at least one electronic component is configured such that, when a first polarization is applied to the at least one electronic component, said each data port comprises a high-impedance state, and the method further comprising, for said each data port, prior to the injecting, first polarization of the at least one electronic component such that the each data port is in the high-impedance state; and connecting a current output terminal to the current source to allow the electric current to flow between the current injection terminal and the current output terminal through the breakable electrical trace corresponding therewith.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The one or more embodiments of the invention will be better understood on reading the following description, given solely by way of non-limiting example and with reference to the accompanying drawings, wherein:

[0041] FIG. 1 is a sectional view of an electronic circuit according to one or more embodiments of the invention, in a plane orthogonal to a substrate of the circuit;

[0042] FIG. 2 is a schematic depiction of the electronic circuit of FIG. 1, during the implementation of the protection method, according to one or more embodiments of the invention;

[0043] FIG. 3 is a depiction analogous to FIG. 2, after the implementation of the protection method, according to one or more embodiments of the invention;

[0044] FIG. 4 is a schematic depiction of a second embodiment of an electronic circuit, during the implementation of the protection method, according to one or more embodiments of the invention;

[0045] FIG. 5 is a depiction analogous to FIG. 4, after the implementation of the protection method, according to one or more embodiments of the invention;

[0046] FIG. 6 is a schematic depiction, in a plane parallel to the substrate, of a first variant of a breakable electrical trace of the electronic circuit of FIG. 4, according to one or more embodiments of the invention;

[0047] FIG. 7 is a schematic depiction, in a plane parallel to the substrate, of a second variant of the breakable electrical trace of the electronic circuit of FIG. 4, according to one or more embodiments of the invention; and

[0048] FIG. 8 is a schematic depiction, in a plane parallel to the substrate, of a third variant of the breakable electrical trace of the electronic circuit of FIG. 4, according to one or more embodiments of the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0049] It is clearly understood that the one or more embodiments that will be described hereafter are by no means limiting. In particular, it is possible to imagine variants of the one or more embodiments of the invention that comprise only a selection of the features disclosed hereinafter in isolation from the other features disclosed, if this selection of features is sufficient to confer a technical benefit or to differentiate the one or more embodiments of the invention with respect to the prior art. This selection comprises at least one preferably functional feature which is free of structural details, or only has a portion of the structural details if this portion alone is sufficient to confer a technical benefit or to differentiate the one or more embodiments of the invention with respect to the prior art.

[0050] In particular, all of the described variants and the one or more embodiments can be combined with each other if there is no technical obstacle to this combination.

[0051] In the figures and in the remainder of the description, the same reference has been used for the features that are common to several figures.

[0052] An electronic circuit 2 according to one or more embodiments of the invention is illustrated by FIG. 1.

[0053] As shown in FIG. 1, the electronic circuit 2 comprises a substrate 4, on which at least one electronic component 3 is arranged.

[0054] The electronic circuit 2 further includes at least one current injection terminal 8 (referred to hereinafter as injection terminal), and at least one breakable electrical trace 10.

[0055] The electronic component 3 is, for example, a programmable component 6. Alternatively, the electronic component 3 is not a programmable component; in this case, the electronic component 3 is, for example, an interface, such as a connector.

[0056] In the case where the electronic component 3 is a programmable component 6, by way of at least one embodiment, said programmable component 6 belongs, for example, to the family of Programmable Logical Devices (PLDs), such as a Field-Programmable Gate Array (FPGA). Alternatively, in at least one embodiment, the programmable component 6 is a Central Processing Unit (CPU), or a microcontroller.

[0057] The electronic component 3 includes at least one data port 12 for receiving data intended for said electronic component 3.

[0058] Each data port 12 of the electronic component 3 is associated with an injection terminal 8 of the electronic circuit 2. In particular, in at least one embodiment, for each data port 12, the corresponding injection terminal 8 is intended to authorize the user to apply the data intended for the electronic component 3 that have been mentioned previously.

[0059] More specifically, in at least one embodiment, each data port 12 is electrically connected to the corresponding injection terminal 8 by means of a breakable electrical trace 10 extending between the data port 12 and the associated injection terminal 8.

[0060] Furthermore, in at least one embodiment, each breakable electrical trace 10 is located in the thickness of the substrate 4, so that the breakable electrical trace 10 is physically isolated from the outside. In this case, in at least one embodiment, each injection terminal 8 and each data port 12 is, for example, electrically connected to the corresponding breakable electrical trace 10 by means of a respective via 14, extending from an external surface 16 of the substrate 4 to the breakable electrical trace 10.

[0061] In the case where the electronic component 3 is a programmable component 6, as illustrated by FIG. 1, the data port 12 is, especially, intended for the configuration of said programmable component 6. In particular, in at least one embodiment, each data port 12 is intended to authorize a user to write, in the programmable component 6, instructions relating to the configuration of the programmable component 6. In this case, in at least one embodiment, the corresponding injection terminal 8 is intended to authorize the user to apply instructions relating to the configuration of the programmable component 6.

[0062] As illustrated by FIG. 2, by way of one or more embodiments of the invention, each breakable electrical trace 10 comprises a first conductive segment 18, a fusible segment 20 and a second conductive segment 22, arranged in this order between the injection terminal 8 and the data port 12.

[0063] The first conductive segment 18, the fusible segment 20 and the second conductive segment 22 are each made of a conductive material, so as to ensure electrical continuity between the injection terminal 8 and the data port 12, as long as said electrical continuity is desired.

[0064] The breakable electrical trace 10 is further configured to break, by melting of the corresponding fusible segment 20, upon the injection, at the injection terminal 8, of an electric current I having an intensity greater than a predetermined trace breaking threshold.

[0065] The trace breaking threshold is preferably between 0.5 A (amps) and 2 A, for example between 0.75 A and 1.25 A, for a breakable electrical trace 10 having a section between 2.7 and 4.5 mm.sup.2 at the first conductive segment 18, and a section between 1.8 and 2.7 mm.sup.2 at the fusible segment 20.

[0066] Preferably, by way of one or more embodiments, the fusible segment 20 has a greater electrical resistance per unit length than the electrical resistance per unit length of the first conductive segment 18. In this case, in at least one embodiment, the flow of the electric current I along the breakable electrical trace 10 causes its heating by the Joule effect, and in particular a greater local heating at the fusible segment 20. If the electric current I has an intensity greater than the predetermined trace breaking threshold, the local heating of the fusible segment 20 causes it to melt, resulting in the breaking of the breakable electrical trace 10.

[0067] Alternatively, or additionally, in one or more embodiments, the fusible segment 20 has a thermal resistance greater than the thermal resistance of the first conductive segment 18. In this case, in at least one embodiment, the flow of the electric current I along the breakable electrical trace 10 causes heating by locally greater Joule effect at the fusible segment 20. In the same way as previously, in at least one embodiment, if the electric current I has an intensity greater than the predetermined trace breaking threshold, the local heating of the fusible segment 20 causes it to melt, resulting in the breaking of the breakable electrical trace 10.

[0068] For example, in one or more embodiments, a greater electrical resistance per unit length at the fusible segment 20 and/or a greater thermal resistance at the fusible segment 20 are likely to be reached by designing a breakable electrical trace 10 in which the fusible segment 20 has a section smaller than a section of the first conductive segment 18, so as to form a restriction, or a constriction, at the fusible segment 20.

[0069] Section is understood, within the meaning of one or more embodiments of the invention, to mean a cross-section, that is to say, in a plane orthogonal to a direction along which the breakable electrical trace 10 extends locally.

[0070] Alternatively, or in a complementary manner, by way of at least one embodiment, a greater electrical resistance per unit length at the fusible segment 20 and/or a greater thermal resistance at the fusible segment 20 are likely to be reached by designing a breakable electrical trace 10 in which the fusible segment 20 is made of a conductive material different from that of which the first conductive segment 18 and the second conductive segment 22 are made.

[0071] Preferably, in one or more embodiments, the electronic circuit 2 further comprises a current output terminal 19 (referred to as output terminal 19), intended to be connected to an electric potential reference, for example for grounding the electronic circuit 2.

[0072] In this case, in at least one embodiment, the electronic component 3 is preferably also connected to the output terminal 19, for example via an output port 23.

[0073] The disconnection of the electronic component 3, in order to protect it against intrusions, is described next with reference to FIGS. 2 and 3, according to one or more embodiments of the invention.

[0074] When the disconnection of the electronic component 3 is desired (for example, if it is a programmable component 6, when the programming of said programmable component 6 is completed), for each data port 12, the corresponding injection terminal 8 is connected to a current source 25, as illustrated in FIG. 2.

[0075] Preferably, in one or more embodiments, the electronic component 3 is also connected to the output terminal 19, which is itself connected to the current source 25.

[0076] Then, the current source 25 is turned on so as to inject, at the injection terminal 8, an electric current I having an intensity greater than the trace breaking threshold associated with the corresponding breakable electrical trace 10.

[0077] This results in the melting of the fusible segment 20 and thus in the breaking of the breakable electrical trace 10, as illustrated by FIG. 3, according to one or more embodiments of the invention. Access to the data port 12 of the electronic component 3 is then no longer possible.

[0078] At least one embodiment of the invention is illustrated by FIGS. 4 and 5. By way of one or more embodiments, especially, to a situation in which the electronic component 3 (not shown) is configured so that, when a predetermined polarization (referred to as first polarization) is applied to said electronic component 3, each data port 12 is in a high-impedance state. This feature is especially present in certain programmable components 6.

[0079] The electronic circuit 2 of FIG. 4 differs from the electronic circuit of FIG. 2 only in that, for each data port 12, the breakable electrical trace 10 also comprises an auxiliary conductive segment 24.

[0080] Like the first conductive segment 18, the fusible segment 20, and the second conductive segment 22 of the corresponding breakable electrical trace 10, each auxiliary conductive segment 24 is also located in the thickness of the substrate 4.

[0081] Furthermore, in at least one embodiment, for each data port 12, the associated auxiliary conductive segment 24 is electrically connected between the output terminal 19 and the fusible segment 20 of the corresponding breakable electrical trace 10.

[0082] The disconnection of the electronic component 3, in order to protect it against intrusions, is described next with reference to FIGS. 4 and 5, according to one or more embodiments of the invention.

[0083] When the disconnection of the electronic component 3 is required (for example, if it is a programmable component, when the programming of said programmable component 6 is completed), the first polarization is applied to the electronic component 3 so that each data port 12 is in its high-impedance state.

[0084] Furthermore, in at least one embodiment, for each data port 12, the corresponding injection terminal 8 is connected to the current source 25. The output terminal 19 is also connected to the current source 25, to allow electric current to flow between the injection terminal 8 and the output terminal 19 through the corresponding breakable electrical trace 10, especially through the corresponding first conductive segment 18, fusible segment 20, and auxiliary conductive segment 24.

[0085] Then, the current source 25 is turned on so that an electric current I flows between the injection terminal 8 and the output terminal 19.

[0086] When the data port 12 is in a high-impedance state, the electric current injected at the injection terminal 8 cannot enter the electronic component 3 by the data port 12, which prevents any degradation of the electronic component 3.

[0087] If the electric current I has an intensity greater than the trace breaking threshold associated with the corresponding breakable electrical trace 10, the fusible segment 20 melts, and the breakable electrical trace 10 is broken, as illustrated by FIG. 5, according to one or more embodiments of the invention. Access to the data port 12 of the electronic component 3 is then no longer possible.

[0088] At least one embodiment of the invention, as shown in FIGS. 4 and 5, is advantageous in that the electric current applied to break the fusible segment 20 does not flow in the second conductive segment 22 (and therefore does not reach the electronic component 3), the data port 12 being in its high-impedance state. An uncontrolled alteration of the electronic component 3, due to the electric current I injected and likely to occur in the at least one embodiment of the invention, as shown in FIGS. 2 and 3, is thus avoided.

[0089] FIGS. 6 to 8 illustrate various possible arrangements of the breakable electrical trace 10, according to one or more embodiments of the invention.

[0090] For example, a so-called T-shaped geometry is depicted in FIG. 6.

[0091] In this case, by way of at least one embodiment, the first conductive segment 18 and the auxiliary conductive segment 24 of the breakable electrical trace 10 extend along a same first axis X-X.

[0092] Furthermore, in at least one embodiment, the second conductive segment 22 of the breakable electrical trace 10 extends along a second axis Y-Y not parallel to the first axis X-X. Preferably, the second axis Y-Y is perpendicular to the first axis X-X.

[0093] Such a geometry is advantageous, insofar as it limits the impact of the heat generated on the other conductors of the electronic circuit 2.

[0094] Preferably, in at least one embodiment, the junction area between the first conductive segment 18, the auxiliary conductive segment 24 and the second conductive segment 22 includes a recess defining the fusible segment 20.

[0095] According to one or more embodiments of the invention, a linear geometry is depicted in FIG. 7.

[0096] In this case, the first conductive segment 18, the second conductive segment 22 and the auxiliary conductive segment 24 of the breakable electrical trace 10 extend along parallel axes A-A, B-B, and C-C, respectively.

[0097] More specifically, the axis B-B extends between the axes A-A and C-C.

[0098] Furthermore, in at least one embodiment, the output terminal 19 is closer to the injection terminal 8 than to the data port 12 connected to the second conductive segment 22. In other words, the injection terminal 8 and the output terminal 19 are arranged on the same side with respect to the fusible segment 20.

[0099] Such a geometry is advantageous, insofar as it limits the bulk.

[0100] Preferably, by way of at least one embodiment, the second conductive segment 22 is offset along the axis B-B so that the junction area between the first conductive segment 18, the second conductive segment 22, and the auxiliary conductive segment 24 has dimensions favorable to local heating greater than that of the first conductive segment 18 and the auxiliary conductive segment 24, thus defining the fusible segment 20.

[0101] By way of one or more embodiments, a so-called fin geometry is depicted in FIG. 8. Such a geometry is capable of being combined with one or the other of the T-shaped geometry (FIG. 6) and the linear geometry (FIG. 7).

[0102] In this case, at least one of the first conductive segment 18 and the auxiliary conductive segment 24 comprises a first part 26 and a second part 28. The second part 28 is closer to the fusible segment 20 than the first part 26.

[0103] Furthermore, in at least one embodiment, the second part 28 has a width greater than a width of the first part 26, to form a heatsink 30, also referred to as fin.

[0104] Width of an electrical trace is understood, within the meaning of one or more embodiments of the invention, to mean the dimension, in the plane of the substrate 4, which is orthogonal to the axis of said electrical trace.

[0105] Such a geometry is advantageous, insofar as the fins 30 accentuate the dissipation of heat in the first conductive segment 18 and/or in the auxiliary conductive segment 24, in the vicinity of the fusible segment 20, which has the effect of concentrating the heat in the fusible segment 20.

[0106] The feature according to which the fusible segment 20 has a greater electrical resistance per unit length and/or a greater thermal resistance and/or a section smaller than that of the first conductive segment 18 is advantageous, in at least one embodiment, insofar as it promotes greater local heating at the fusible segment 20 during the flow of the electric current I along the breakable electrical trace 10.

[0107] The presence of the auxiliary conductive segment 24 is advantageous, in at least one embodiment, insofar as, when the data port 12 of the electronic component 3 is able to have a high-impedance state, it results in that the electric current applied to break the fusible segment 20 does not flow in the second conductive segment 22 when said data port 12 is in its high-impedance state, and therefore does not reach the electronic component 3. In this way, an uncontrolled alteration of the electronic component 3, due to the electric current I injected to degrade the fusible segment 20, is avoided.

[0108] The T-shaped geometry is advantageous, in at least one embodiment, insofar as it limits the impact of the heat generated on the other conductors of the electronic circuit 2.

[0109] The linear geometry is advantageous, in at least one embodiment, insofar as it limits the bulk.

[0110] The presence of fins 30 is advantageous, in at least one embodiment, insofar as said fins 30 accentuate the dissipation of heat in the first conductive segment 18 and/or in the auxiliary conductive segment 24, in the vicinity of the fusible segment 20, which has the effect of concentrating the heat in the fusible segment 20.