CIRCUIT BOARD FOR A POWER SEMICONDUCTOR MODULE, POWER SEMICONDUCTOR MODULE, AND METHOD FOR PRODUCING A CIRCUIT BOARD AND A POWER SEMICONDUCTOR MODULE

Abstract

A circuit board (1) for a power semiconductor module (13), having at least one top side (2) and one bottom side (3), wherein at least one mounting area (4) for a power semiconductor component (12) is provided on the top side (2), wherein on the mounting area (4), at least one solder layer (8) is provided for connecting at least one power semiconductor component (12) to the mounting area (4), which layer is divided into regions (9) that are separated from one another by means of intermediate spaces (11), and wherein multiple thermal vias (5) are provided in the circuit board (1) and extend from the top side (2) to the bottom side (3) of the circuit board (2) in the region of the mounting area (4), wherein each upper opening (6) of the thermal vias (5) is directly surrounded by a respective region (9) of the solder layer (8) and each lower opening (7) of the vias (5) is covered by a layer (10) of electrically insulating material.

Claims

1. A circuit board for a power semiconductor module, having at least one top side and one bottom side, wherein at least one mounting area for a power semiconductor component is provided on the top side, wherein on the mounting area, at least one solder layer connects at least one power semiconductor component to the mounting area, which layer is divided into regions that are separated from one another by intermediate spaces, and wherein multiple thermal vias are provided in the circuit board and extend from the top side to the bottom side of the circuit board in the region of or near the mounting area, wherein each upper opening of the thermal vias is directly surrounded by a respective region of the solder layer and each lower opening of the thermal vias is covered by a layer of electrically insulating material.

2. The circuit board according to claim 1, wherein the regions of the solder layer that are separated from one another by the intermediate spaces are arranged in a geometrical grid.

3. The circuit board according to claim 1, wherein at least one thermal via is provided for each region of the solder layer.

4. The circuit board according to claim 1, wherein the layer of electrically insulating material is embodied as a continuous layer on the bottom side of the circuit board.

5. The circuit board according to claim 4, wherein the layer of insulating material is embodied as a solder stop mask layer.

6. The circuit board according to claim 1, wherein metallizations are provided beneath the mounting area in the circuit board in order to improve the thermal conductivity.

7. A circuit board according to claim 6, which is embodied as a PCB.

8. The circuit board of claim 7, wherein a power semiconductor module having at least one power semiconductor component is positioned on a mounting area of a circuit board.

9. The circuit board according to claim 8, wherein the thermal vias are at least partially filled with solder.

10. A method for producing a circuit board for a power semiconductor module, including the steps of: preparing a circuit board having at least one top side and one bottom side, wherein on the top side, there is at least one mounting area for a power semiconductor component, wherein the circuit board has thermal vias, which extend from the top side to the bottom side of the circuit board in the region of or near the mounting area; applying a solder layer, which is divided into regions that are separated from one another by intermediate spaces, onto the mounting area so that upper openings of the thermal vias are each directly surrounded by a region of the solder layer; and applying a layer of insulating material onto the bottom side of the circuit board so that at least the lower openings of the thermal vias are covered by the layer of insulating material.

11. A method according to claim 10 for producing a power semiconductor module, including the steps of: preparing a circuit board for mounting at least one power semiconductor component on the mounting area by a soldering process.

12. The method according to the claim 11, wherein during the soldering process, solder travels from the solder layer at least partially into the thermal vias.

13. The circuit board according to claim 1, wherein at least one thermal via is provided for each region of the solder layer.

14. The circuit board according to claim 1, wherein the layer of electrically insulating material is embodied as a continuous layer on the bottom side of the circuit board.

15. The circuit board according to claim 1, wherein the layer of insulating material is embodied as a solder stop mask layer.

16. The circuit board according to claim 1, wherein metallizations are provided beneath the mounting area in the circuit board in order to improve the thermal conductivity.

17. A circuit board according to claim 1, which is embodied as a PCB.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Embodiments of this invention are described by way of example below based on schematic drawings, wherein:

[0037] FIG. 1 shows a perspective view of a circuit board for a power semiconductor module during a method for producing a circuit board according to one embodiment of this invention;

[0038] FIG. 2 shows a plan view of the top side of the circuit board according to FIG. 1 after a solder layer has been applied;

[0039] FIG. 3 shows a plan view of the bottom side of the circuit board according to FIGS. 1 and 2 after an insulating layer has been applied;

[0040] FIG. 4 shows a cutaway view of the circuit board according to FIGS. 2 and 3;

[0041] FIG. 5 shows a cutaway view of a power semiconductor module after a power semiconductor component has been mounted on a circuit board according to FIG. 4;

[0042] FIG. 6 shows a cutaway view of the power semiconductor module according to FIG. 5 after a reflow process;

[0043] FIG. 7 shows a plan view of a circuit board according to an alternative embodiment; and

[0044] FIG. 8 shows a plan view of a circuit board according to another alternative embodiment.

DETAILED DESCRIPTION OF THE INVENTION

[0045] FIG. 1 shows a circuit board 1 for a power semiconductor module, which has a top side 2 and opposite from this, a bottom side 3. The circuit board 1 can, for example, be a PCB.

[0046] On the top side 2, a mounting area 4 is provided as a subregion of the top side 2. The mounting area 4, which is indicated by the dashed line, refers to the area on which a power semiconductor component is to be mounted in order to form a power semiconductor module. Because large quantities of lost heat accumulate during the operation of the power semiconductor module, a heat dissipation of the circuit board 1 in the region of or near the mounting area 4 is important.

[0047] In the region of or near the mounting area 4, multiple vias 5 in the circuit board 1 are provided, which pass through the circuit board 1 from the top side 2 to the bottom side 3. The vias 5 are provided in the form of through bores in the circuit board 1 and for the sake of better thermal conduction, have metallizations, in particular a coating of their inner walls with metal. The vias 5 have upper openings 6, which are exposed on the top side 2 of the circuit board 1, and lower openings, which are not shown in FIG. 1.

[0048] In the embodiment shown, a total of nine thermal vias 5 are provided and are arranged in a geometrical grid.

[0049] FIG. 2 shows a plan view of the circuit board 1 according to FIG. 1 after another method step for producing the circuit board 1. In this method step, a solder layer 8 is applied, for example, printed, onto the top side 2, at least in the region of or near the mounting area 4. The solder layer 8 is applied in the form of separate regions 9, wherein the regions 9 are separated from one another by means of intermediate spaces 11, which are kept free of the solder layer 8.

[0050] Each of the regions 9, which are embodied as rectangular in the embodiment shown, directly surrounds an upper opening 6 of one via 5, such as no barrier made of solder stop mask is positioned around the edge of the upper openings 6. In the embodiment shown, exactly one via 5 is provided in each region 9 of the solder layer.

[0051] FIG. 3 shows a plan view of the bottom side 3 of the circuit board 1 according to FIG. 1 after an electrically insulating layer 10 has been applied to the bottom side 3 of the circuit board 1. In the embodiment shown, the insulating layer 10 is applied in the form of a continuous layer, which extends across the entire bottom side 3 of the circuit board 1 and covers the lower openings 7 of the vias 5. The insulating layer 10 thus insulates the metallized vias 5 from one another, even if during a soldering process, solder flows into the vias 5 and comes out again on the bottom side 3 of the circuit board 1.

[0052] In the embodiment shown, the insulating layer 10 on the bottom side 3 of the circuit board 1 is comprised of solder stop mask.

[0053] FIG. 4 shows a cutaway view of the circuit board 1 according to FIGS. 2 and 3. A metallization of the vias 5 is not shown in the figure for the sake of clarity.

[0054] FIG. 5 shows a cutaway view of the circuit board 1 according to FIGS. 1 to 4 after another step in a method for producing a power semiconductor module. In this step, at least one power semiconductor component 12 is mounted onto the top side 2 of the circuit board 1, specifically onto the mounting area 4 provided for this purpose. In this case, contact lands of the power semiconductor component 12 that are not shown are brought into contact with the regions 9 of the solder layer 8.

[0055] To form a power semiconductor module 13, additional power semiconductor components or other components can also be mounted on the circuit board 1, but these are not shown in the figures.

[0056] FIG. 6 shows the power semiconductor module 13 according to FIG. 5 after a reflow process. As shown in the cutaway view, solder that has liquefied during the soldering process has partially flowed from the solder layer 8 into the vias 5. In addition, the intermediate spaces 11 between regions of the solder layer 8 have partially closed. During the soldering, flux and solvent can escape from the solder layer 8 through the intermediate spaces 11 and the individual regions 9 of the solder layer 8 can partially or completely flow into one another.

[0057] The exposed upper openings 6 of the vias 5 on the top side 2 of the circuit board 1, which in the embodiment shown are each surrounded by a region of the solder layer 8, prevent the solder of the solder layer 8 from being distributed unevenly over the mounting area 4. After the soldering process, the power semiconductor component 12 is thus connected to the circuit board 1 at the same time and the circuit board 1 has effective thermally conducting structures underneath the mounting area 4 with the vias 5 that are completely or partially filled with metal.

[0058] FIG. 7 shows another embodiment of the circuit board 1 in which there are four exposed openings 6 of the vias 5 in each region 9 of the solder layer 8. A uniform distribution of solder on the mounting area 4 is assured in this embodiment as well.

[0059] FIG. 8 shows another embodiment of the circuit board 1, which differs from the one shown in FIG. 2 because the individual regions 9 of the solder layer 8 are embodied as rhomboid and are arranged in a grid. Alternatively, other shapes for the regions 9 are also possible, for example, round shapes and/or combinations of the embodiments shown in FIGS. 2, 7, and 8.

[0060] While in the foregoing specification this invention has been described in relation to certain preferred embodiments, and many details are set forth for purpose of illustration, it will be apparent to those skilled in the art that this invention is susceptible to additional embodiments and that certain of the details described in this specification and in the claims can be varied considerably without departing from the basic principles of this invention.