Abstract
In accordance with embodiments of the present disclosure, a system for power conversion may include a power converter comprising a power inductor and a switch coupled to the power inductor and a predriver system for electrically driving a gate of the switch, the predriver system configured to operate in a plurality of modes including a high-power mode in which the predriver system is supplied with electrical energy from a first power supply having a first supply voltage and a low-power mode in which the predriver system is supplied with electrical energy from a second power supply having a second supply voltage significantly lesser than the first supply voltage.
Claims
1. A system for power conversion, comprising: a power converter comprising a power inductor and a switch coupled to the power inductor; and a predriver system for electrically driving a gate of the switch, the predriver system configured to operate in a plurality of modes including: a high-power mode in which the predriver system is supplied with electrical energy from a first power supply having a first supply voltage; and a low-power mode in which the predriver system is supplied with electrical energy from a second power supply having a second supply voltage significantly lesser than the first supply voltage.
2. The system of claim 1, wherein: the switch comprises a single switching element; the predriver system comprises a single predriver circuit for electrically driving a gate of the single switching element; and the single predriver circuit comprises a second switch for switching a power supply input of the single predriver circuit between the first power supply and the second power supply such that the power supply input is coupled to the first power supply in the high-power mode and the power supply input is coupled to the second power supply in the low-power mode.
3. The system of claim 2, wherein the single switching element comprises a field-effect transistor.
4. The system of claim 2, wherein the single switching element comprises an n-type field-effect transistor.
5. The system of claim 1, wherein: the switch comprises a first switching element and a second switching element; and the predriver system comprises: a first predriver circuit for electrically driving a gate of the first switching element, the first predriver circuit having a first power supply input coupled to the first power supply and configured to drive the gate of the first switching element in the high-power mode; and a second predriver circuit for electrically driving a gate of the second switching element, the second predriver circuit having a second power supply input coupled to the second power supply and configured to drive the gate of the second switching element in the low-power mode.
6. The system of claim 5, wherein non-gate terminals of the first switching element and the second switching element are coupled in parallel.
7. The system of claim 5, wherein the first switching element comprises a first field-effect transistor and the second switching element comprises a second field-effect transistor.
8. The system of claim 5, wherein the first switching element comprises a first n-type field-effect transistor and the second switching element comprises a second n-type field-effect transistor.
9. The system of claim 1, wherein the power converter comprises a boost converter.
10. A method for power conversion, comprising, in a power converter comprising a power inductor and a switch coupled to the power inductor: operating a predriver system for electrically driving a gate of the switch in a high-power mode in which the predriver system is supplied with electrical energy from a first power supply having a first supply voltage; and operating the predriver system in a low-power mode in which the predriver system is supplied with electrical energy from a second power supply having a second supply voltage significantly lesser than the first supply voltage.
11. The method of claim 10, wherein: the switch comprises a single switching element; the predriver system comprises a single predriver circuit for electrically driving a gate of the single switching element; and the method further comprises switching a power supply input of the single predriver circuit between the first power supply and the second power supply such that the power supply input is coupled to the first power supply in the high-power mode and the power supply input is coupled to the second power supply in the low-power mode.
12. The method of claim 11, wherein the single switching element comprises a field-effect transistor.
13. The method of claim 11, wherein the single switching element comprises an n-type field-effect transistor.
14. The method of claim 10, wherein: the switch comprises a first switching element and a second switching element; the method further comprises: electrically driving a gate of the first switching element with a first predriver circuit, the first predriver circuit having a first power supply input coupled to the first power supply and configured to drive the gate of the first switching element in the high-power mode; and electrically driving a gate of the second switching element with a second predriver circuit, the second predriver circuit having a second power supply input coupled to the second power supply and configured to drive the gate of the second switching element in the low-power mode.
15. The method of claim 14, wherein non-gate terminals of the first switching element and the second switching element are coupled in parallel.
16. The method of claim 14, wherein the first switching element comprises a first field-effect transistor and the second switching element comprises a second field-effect transistor.
17. The method of claim 14, wherein the first switching element comprises a first n-type field-effect transistor and the second switching element comprises a second n-type field-effect transistor.
18. The method of claim 10, wherein the power converter comprises a boost converter.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:
(2) FIG. 1 illustrates an example circuit comprising a boost converter for converting an input source voltage to produce an output voltage, in accordance with embodiments of the present disclosure;
(3) FIG. 2 illustrates an example circuit comprising a boost converter for converting an input source voltage to produce an output voltage which may be used to implement the circuit of FIG. 1, in accordance with embodiments of the present disclosure; and
(4) FIG. 3 illustrates another example circuit comprising a boost converter for converting an input source voltage to produce an output voltage which may be used to implement the circuit of FIG. 1, in accordance with embodiments of the present disclosure.
DETAILED DESCRIPTION
(5) FIG. 1 illustrates an example circuit 100 comprising a boost converter 102 for converting an input source voltage V.sub.BAT to produce an output voltage V.sub.OUT, in accordance with embodiments of the present disclosure. As shown in FIG. 1, boost converter 102 may comprise an inductor 106 coupled at a first terminal to an input source voltage V.sub.BAT and coupled at a second terminal to non-gate terminals of each of switches 108 and 110. Boost converter 102 shown in FIG. 1 may also comprise switch 108 coupled at one non-gate terminal to a ground voltage and coupled at its other non-gate terminal to inductor 106 and a non-gate terminal of switch 110, and switch 110 coupled at one non-gate terminal to inductor 106 and a non-gate terminal of switch 108 and coupled at its other non-gate terminal to a terminal of capacitor 107. Boost converter 102 shown in FIG. 1 may also include a capacitor 107 coupled between a non-gate terminal of switch 110 and a ground voltage.
(6) As shown in FIG. 1, circuit 100 may also include a predriver system 116. Predriver system 116 may include any suitable system, device, or apparatus configured to drive a p-side control voltage v.sub.CTRLP to the gate terminal of switch 110 and to drive a n-side control voltage v.sub.CTRLN to the gate terminal of switch 108. Each of p-side control voltage v.sub.CTRLP and n-side control voltage v.sub.CTRLN may be pulse-width modulated signals. In steady-state operation, switch 108 will generally be open when switch 110 is closed, and vice versa (although, in some embodiments, a diode may be used in lieu of switch 110, wherein an anode of such diode may be coupled to inductor 106 and the cathode of such diode may be coupled to capacitor 107). When switch 108 is closed, current may flow from the voltage source generating the input source voltage V.sub.BAT through inductor 106, and inductor 106 may store energy. During this time, inductor 106 may have a voltage drop across it, with a positive-polarity at the terminal coupled to the input source voltage V.sub.BAT. When switch 108 is open and switch 110 is closed, the current flowing through inductor 106 may be reduced. Such change or reduction in current may be opposed by inductor 106 and the voltage polarity of inductor 106 may reverse (e.g., with a positive-polarity at the terminal coupled to generating the input source voltage V.sub.BAT). As a result, effectively two voltage sources are in series (input source voltage V.sub.BAT and the voltage across inductor 106), thus causing a voltage higher than V.sub.BAT to charge capacitor 107. If switches 108 and 110 are cycled fast enough, inductor 106 will not discharge fully in between charging stages, and output voltage V.sub.OUT on capacitor 107 will have voltage greater than that of the input source voltage V.sub.BAT when switch 108 is opened. Thus, output voltage V.sub.OUT generated by boost converter 102 may be a function of p-side control voltage v.sub.CTRLP, n-side control voltage v.sub.CTRLN, and the input source voltage V.sub.BAT.
(7) Also as shown in FIG. 1, predriver system 116 may be configured to receive a first power supply having a first supply voltage V.sub.DD and a second power supply having a second supply voltage V.sub.DDA significantly lesser than first supply voltage V.sub.DD (e.g., V.sub.DDA<V.sub.DD). Predriver 116 may also receive a mode select signal MODE SELECT indicative of a desired operating mode of predriver system 116. Accordingly, based on mode select signal MODE SELECT, predriver system 116 may operate in a plurality of modes including a high-power mode in which predriver system 116 is supplied with electrical energy from the first power supply with first supply voltage V.sub.DD and a low-power mode in which predriver system 116 is supplied with electrical energy from the second power supply with second supply voltage V.sub.DDA. By being able to operate in a plurality of modes in this manner, when another system which is supplied power by output voltage V.sub.OUT is powered down or idle, operating in the low-power mode may allow boost converter 102 to stay active and continue generating a boosted output voltage V.sub.OUT, while consuming a smaller amount of power than it would in the high-power mode.
(8) FIG. 2 illustrates an example circuit 100A comprising a boost converter 102A for converting an input source voltage V.sub.BAT to produce an output voltage V.sub.OUT, in accordance with embodiments of the present disclosure. Circuit 100A may be used to implement circuit 100 of FIG. 1. Accordingly, boost converter 102A and predriver system 116A of FIG. 2 may be used to implement boost converter 102 and predriver system 116 of FIG. 1, respectively. As shown in FIG. 2, switch 108 of circuit 100 may be implemented in circuit 100A as a single switching element, for example, an n-type metal-oxide-semiconductor field-effect transistor (NMOSFET) 208. FIG. 2 also depicts that switch 110 of circuit 100 may be implemented in circuit 100A as a p-type metal-oxide-semiconductor field-effect transistor (PMOSFET) 210, although in some embodiments, such switch may be implemented as a diode having its anode coupled to inductor 106 and its cathode coupled to capacitor 107.
(9) FIG. 2 further depicts that predriver system 116 of circuit 100 may be implemented with predriver system 116A having a single predriver circuit. The single predriver circuit may include a predriver subsystem 216 for driving p-side control voltage V.sub.CTRLP to the gate terminal of transistor 210 and driving n-side control voltage v.sub.CTRLN to the gate terminal of transistor 208. The single predriver circuit may also include a switch 218 configured to, based on mode select signal MODE SELECT, switch a power supply input of the single predriver circuit between the first power supply having first supply voltage V.sub.DD and the second power supply having second supply voltage V.sub.DDA such that the power supply input is coupled to the first power supply and receives first supply voltage V.sub.DD in the high-power mode and the power supply input is coupled to the second power supply and receives second supply voltage V.sub.DDA in the low-power mode. Thus, in the low-power mode, n-side control voltage v.sub.CTRLN may be driven to a low voltage as compared to the high-power mode, thus allowing boost converter 102A to generate boosted output voltage V.sub.OUT while consuming less power.
(10) FIG. 3 illustrates an example circuit 100B comprising a boost converter 102B for converting an input source voltage V.sub.BAT to produce an output voltage V.sub.OUT, in accordance with embodiments of the present disclosure. Circuit 100B may be used to implement circuit 100 of FIG. 1. Accordingly, boost converter 102B and predriver system 116B of FIG. 3 may be used to implement boost converter 102 and predriver system 116 of FIG. 1, respectively. As shown in FIG. 3, switch 108 of circuit 100 may be implemented in circuit 100B as a switch 308 comprising a plurality of switching elements, for example, a first switching element comprising a first metal-oxide-semiconductor field-effect transistor 312 and the second switching element comprising a second metal-oxide-semiconductor field-effect transistor 314. Also as depicted in FIG. 3, first metal-oxide-semiconductor field-effect transistor 312 and second metal-oxide-semiconductor field-effect transistor 314 may be coupled in parallel in that respective non-gate terminals of each of first metal-oxide-semiconductor field-effect transistor 312 and second metal-oxide-semiconductor field-effect transistor 314 may be coupled together. FIG. 3 also depicts that switch 110 of circuit 100 may be implemented in circuit 100B as a p-type metal-oxide-semiconductor field-effect transistor 310, although in some embodiments, such switch may be implemented as a diode having its anode coupled to inductor 106 and its cathode coupled to capacitor 107.
(11) FIG. 3 further depicts that predriver system 116 of circuit 100 may be implemented with predriver system 116B having a plurality of predriver circuits comprising first predriver circuit 318 and second predriver circuit 320. First predriver circuit 318 may be configured to electrically drive a gate of first metal-oxide-semiconductor field-effect transistor 312, and first predriver circuit 318 may have a first power supply input coupled to the first power supply with first supply voltage V.sub.DD such that first predriver circuit 318 operates from first supply voltage V.sub.DD in order to drive the gate of first metal-oxide-semiconductor field-effect transistor 312 with a first n-side control voltage v.sub.CTRLNH in the high-power mode. Similarly, second predriver circuit 320 may be configured to electrically drive a gate of second metal-oxide-semiconductor field-effect transistor 314, and second predriver circuit 320 may have a second power supply input coupled to the second power supply with second supply voltage V.sub.DDA such that second predriver circuit 320 operates from second supply voltage V.sub.DDA in order to drive the gate of second metal-oxide-semiconductor field-effect transistor 314 with a second n-side control voltage v.sub.CTRLNL in the low-power mode, wherein second n-side control voltage v.sub.CTRLNL is substantially smaller than first n-side control voltage v.sub.CTRLNH. Thus, in the low-power mode, second n-side control voltage v.sub.CTRLNL may be driven to a metal-oxide-semiconductor field-effect transistor and first n-side control voltage v.sub.CTRLNH may be driven to another parallel metal-oxide-semiconductor field-effect transistor in the high-power mode, thus allowing boost converter 102B to generate boosted output voltage v.sub.OUT in the low-power mode while consuming less power.
(12) Although FIGS. 1-3 above and the description thereof contemplate use of a predriver system in connection with a boost converter, it is understood that the systems and methods described herein may be generally applicable to and usable by systems having power converters other than a boost converter, such as a buck converter and a buck-boost converter, as non-limiting examples.
(13) As used herein, when two or more elements are referred to as coupled to one another, such term indicates that such two or more elements are in electronic communication whether connected indirectly or directly, without or without intervening elements.
(14) This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative.
(15) All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosures have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.
