Non-isolated DC/DC converter

Abstract

A buck converter includes a switching transistor. A switching line connected to a source of the switching transistor is connected to a ground of a controller. The controller drives the switching transistor and generates a step-up pulse. The step-up circuit receives an output voltage V.sub.OUT of a DC/DC converter and generates a power supply voltage V.sub.BOOST of the controller using the step-up pulse.

Claims

1. A non-isolated DC/DC converter comprising: a buck converter including a switching transistor; a controller whose ground is connected to a switching line connected to a source of the switching transistor, and which drives the switching transistor and generates a step-up pulse; and a step-up circuit which receives an output voltage of the DC/DC converter and generates a power supply voltage of the controller by using the step-up pulse, wherein the step-up circuit includes: a first capacitor whose one end is connected to a switching line; a first diode which has an anode receiving the output voltage of the DC/DC converter and a cathode connected to another end of the first capacitor; and a charge pump circuit which is configured with the switching line as a ground, receives a voltage across both ends of the first capacitor as an input voltage, and performs a step-up operation according to the step-up pulse.

2. The DC/DC converter according to claim 1, wherein the switching transistor is built in a same package as the controller.

3. The DC/DC converter according to claim 1, wherein the controller includes: an oscillator; a pulse width modulator which generates a pulse signal in synchronization with a signal generated by the oscillator; a driver which drives the switching transistor according to the pulse signal; and a step-up pulse generator which generates the step-up pulse based on a signal generated by the oscillator.

4. The DC/DC converter according to claim 1, wherein the step-up pulse is a gate drive pulse supplied to a gate of the switching transistor.

5. The DC/DC converter according to claim 1, wherein the controller receives a voltage of the other end of the first capacitor as a feedback voltage and drives the switching transistor such that the feedback voltage coincides with a reference voltage.

6. The DC/DC converter according to claim 1, wherein the charge pump circuit generates a voltage obtained by adding a voltage across both ends of the first capacitor and an amplitude of the step-up pulse.

7. The DC/DC converter according to claim 1, wherein the charge pump circuit includes a plurality of diodes.

8. The DC/DC converter according to claim 1, further comprising a drive circuit that drives a plurality of switches in synchronization with the step-up pulse, wherein the charge pump circuit includes the plurality of switches.

9. The DC/DC converter according to claim 8, wherein the plurality of switches and the drive circuit are integrated on a same semiconductor substrate as the controller.

10. A controller of a non-isolated DC/DC converter, the DC/DC converter including not only the controller but also a buck converter and a step-up circuit which generates a power supply voltage of the controller according to an output voltage of the DC/DC converter and a step-up pulse, the controller comprising: a switching transistor; a ground pin connected to a source of the switching transistor; a high-voltage pin connected to a drain of the switching transistor; a feedback pin which needs to receive a feedback voltage according to the output voltage of the DC/DC converter; an oscillator; a pulse modulator which generates a pulse signal whose duty ratio varies such that the feedback voltage and a reference voltage approximate to each other in synchronization with the oscillator; a driver which drives the switching transistor based on the pulse signal; and a step-up pulse generator which generates the step-up pulse in synchronization with the oscillator, wherein the step-up circuit includes: a first capacitor having one end connected to a switching line; a first diode which has an anode receiving the output voltage of the DC/DC converter and a cathode connected to another end of the first capacitor; and a charge pump circuit which is configured with the switching line as a ground, receives a voltage across both ends of the first capacitor as an input voltage, and performs a step-up operation according to the step-up pulse.

11. The controller according to claim 10 that is integrally integrated on one semiconductor substrate.

12. A DC/DC converter comprising the controller according to claim 10.

13. An electronic device comprising: a load; a diode rectifier circuit which performs full-wave rectification of an AC voltage; a smoothing capacitor which smooths an output voltage of the diode rectifier circuit to generate a DC input voltage; and a non-isolated DC/DC converter which steps down the DC input voltage and supplies the stepped-down DC input voltage to the load, wherein the non-isolated DC/DC converter comprises: a buck converter including a switching transistor; a controller whose ground is connected to a switching line connected to a source of the switching transistor, and which drives the switching transistor and generates a step-up pulse; and a step-up circuit which receives an output voltage of the DC/DC converter and generates a power supply voltage of the controller by using the step-up pulse.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments will now be described, by way of example only, with reference to the accompanying drawings which are meant to be exemplary, not limiting, and wherein like elements are numbered alike in several Figures, in which:

(2) FIG. 1 is a block diagram illustrating a basic configuration of an AC/DC converter that has been studied by the inventor of the present application;

(3) FIG. 2 is a circuit diagram of an AC/DC converter including a DC/DC converter according to a first embodiment;

(4) FIG. 3 is an operation waveform diagram of the DC/DC converter of FIG. 2;

(5) FIG. 4 is a circuit diagram illustrating a specific configuration example of the DC/DC converter of FIG. 2;

(6) FIG. 5 is a circuit diagram illustrating a configuration example of a controller;

(7) FIGS. 6A and 6B are circuit diagrams illustrating modifications of a step-up circuit;

(8) FIG. 7 is a circuit diagram of a DC/DC converter according to a second modification;

(9) FIG. 8 is a circuit diagram of an AC/DC converter including a DC/DC converter according to a second embodiment;

(10) FIG. 9 is an operation waveform diagram of the DC/DC converter of FIG. 8;

(11) FIG. 10 is a circuit diagram illustrating a specific configuration example of the DC/DC converter of FIG. 8;

(12) FIG. 11 is a circuit diagram illustrating a configuration example of a controller;

(13) FIGS. 12A and 12B are circuit diagrams illustrating modifications of a step-up circuit; and

(14) FIG. 13 is a diagram illustrating an electronic device including an AC/DC converter.

DETAILED DESCRIPTION OF THE INVENTION

(15) The invention will now be described based on preferred embodiments which do not intend to limit the scope of the present invention but exemplify the invention. All of the features and the combinations thereof described in the embodiment are not necessarily essential to the invention.

(16) Hereinafter, the present invention will be described with reference to the drawings based on preferred embodiments. The same or similar components, members, and processes illustrated in the respective drawings are denoted by the same reference signs, and redundant description thereof will be omitted as appropriate. In addition, the embodiments are described only for exemplary purposes without limiting the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

(17) In the present specification, a state where a member A is connected to a member B includes not only a state where the member A is physically and directly connected to the member B but also a state where the member A is indirectly connected to the member B via another member that does not substantially affect such an electrical connection state therebetween or does not impair functions and effects exhibited by such a combination.

(18) Similarly, a state where a member C is provided between a member A and a member B includes not only a state where the member A is directly connected to the member C, or the member B is directly connected to the member C but also a state where the member A is indirectly connected to the member C or the member B is indirectly connected to the member C via another member that does not substantially affect such an electrical connection state therebetween, or that does not impair functions and effects exhibited by such a combination.

First Embodiment

(19) FIG. 2 is a circuit diagram of an AC/DC converter 100 including a DC/DC converter 200 according to a first embodiment. The AC/DC converter 100 includes a rectifier circuit 104, a smoothing capacitor 106, and a DC/DC converter 200.

(20) The DC/DC converter 200 includes a non-isolated buck converter (step-down converter) 202, a step-up circuit 210, a controller 300, and peripheral components. A configuration of the buck converter 202 is similar to that of FIG. 1, and includes a switching transistor M.sub.1, a rectifier diode D.sub.1, an inductor L.sub.1, and an output capacitor C.sub.1.

(21) The controller 300 includes a VH pin, a GND pin, a VIN pin, an FB pin, a step-up (boost) pin. The switching transistor M.sub.1 of the buck converter 202 is built in the same package as the controller 300.

(22) The GND pin is connected to a source of the switching transistor M.sub.1. A wiring connected to the GND pin is referred to as a switching line 204. The controller 300 operates with a potential of the GND pin (that is, a potential V.sub.S of the switching line 204) as a ground. The controller 300 generates a pulse signal whose duty ratio (or frequency) varies such that a voltage V.sub.FB fed back to the FB pin coincides with a predetermined target value, and supplies a gate drive pulse V.sub.G according to the pulse signal to the switching transistor M.sub.1. A voltage having a correlation with an output voltage V.sub.OUT may be fed back to the FB pin, and this voltage is not particularly limited.

(23) The controller 300 generates a step-up pulse S.sub.1 and outputs the generated step-up pulse from the boost pin. The step-up pulse S.sub.1 is input to the step-up circuit 210. For example, it is desirable that a duty ratio of the step-up pulse S.sub.1 be not dependent on an operation state of the DC/DC converter 200, and is fixed at a predetermined value in the vicinity of 50% (40 to 60%).

(24) The step-up circuit 210 receives the output voltage V.sub.OUT of the DC/DC converter 200 (buck converter 202), generates a power supply voltage V.sub.BOOST obtained by stepping up the output voltage V.sub.OUT at an output OUT thereof using the step-up pulse S.sub.1, and supplies the generated voltage to the input pin (V.sub.IN) of the controller 300. This power supply voltage V.sub.BOOST fluctuates while maintaining a higher state than a voltage V.sub.S of the switching line 204 by a constant potential difference V.
V.sub.BOOST=V.sub.S+V(1)

(25) The potential difference V is given as V=V.sub.OUT+V.sub.ADD . . . (2A) when a step-up voltage width by the step-up circuit 210 is V.sub.ADD. From another point of view, the potential difference V generated by the step-up circuit 210 may be expressed as Formula (2B) assuming that a step-up rate by the step-up circuit 210 is (>1).
V=V.sub.OUT(2B)

(26) The potential difference V is determined so as to be larger than a gate threshold voltage V.sub.GS(th) of the switching transistor M.sub.1.
V>V.sub.GS(th)(3)

(27) The configuration of the DC/DC converter 200 has been described as above. Next, an operation thereof will be described. FIG. 3 is an operation waveform diagram of the DC/DC converter 200 in FIG. 2. When the switching transistor M.sub.1 is switched at a duty ratio D in a steady state, the output voltage is stabilized such that V.sub.OUTDV.sub.DC. At this time, the voltage V.sub.S of the switching line is switched between V.sub.DC and V.sub.F.

(28) As described above, the power supply voltage V.sub.BOOST fluctuates while maintaining a state of being higher than the voltage V.sub.S of the switching line 204 by the potential difference V. This potential difference V is larger than the gate threshold voltage V.sub.GS(th) of the switching transistor M.sub.1.
V.sub.BOOST=V.sub.S+V(4)
Here, V=V.sub.OUT+V.sub.ADD>V.sub.GS(th)

(29) A potential difference between the VIN pin and the GND pin of the controller 300, that is, a power supply voltage V.sub.DD of the controller 300 is V.sub.DD=V.sub.BOOSTV.sub.S=V. Since V>V.sub.GS(th) is established although a maximum amplitude of a voltage (gate-source voltage) V.sub.GS that can be generated between a gate and the source of the switching transistor M.sub.1 by the controller 300 is the power supply voltage V.sub.DD=V, the controller 300 can reliably turn on the switching transistor M.sub.1.

(30) Since V=V.sub.DDV.sub.OUT in a DC/DC converter 200R of FIG. 1, it is necessary to satisfy that V.sub.OUT>V.sub.GS(th). In contrast, V=V.sub.OUT+V.sub.ADD is established according to the DC/DC converter 200 of FIG. 2, and thus, it is possible to satisfy that V.sub.OUT<V.sub.GS(th). That is, a target voltage of the output voltage V.sub.OUT can be arbitrarily set without being restricted by the gate threshold voltage V.sub.GS(th), and can be set to be lower than that of the related art.

(31) As a modification, it is also conceivable to use the gate drive pulse V.sub.G as the step-up pulse S.sub.1. Then, a duty ratio of the step-up pulse S.sub.1 varies when a duty ratio of the gate drive pulse V.sub.G varies, and thus, a situation that is not preferable for a step-up operation may occur. In this embodiment, it is possible to set the duty ratio of the step-up pulse S.sub.1 to a value optimum for the step-up operation.

(32) Hereinafter, specific configuration examples and examples relating to the first embodiment will be described in order not to narrow the scope of the present invention but to aid understanding of the essence of the invention and the circuit operation and for the sake of clarification thereof.

(33) FIG. 4 is a circuit diagram illustrating a specific configuration example of the DC/DC converter 200 in FIG. 2. The step-up circuit 210 includes a first diode D.sub.21, a first capacitor C.sub.21, and a charge pump circuit 212.

(34) One end of the first capacitor C.sub.21 is connected to the switching line 204. The first diode D.sub.21 has an anode that receives the output voltage V.sub.OUT of the DC/DC converter 200 (buck converter 202) and a cathode that is connected to the other end of the first capacitor C.sub.21.

(35) The charge pump circuit 212 is configured with the switching line 204 as a ground. The charge pump circuit 212 receives a voltage V.sub.C21 across the first capacitor C.sub.21 as an input voltage and performs a step-up operation according to the step-up pulse S.sub.1.

(36) The charge pump circuit 212 is a voltage addition-type charge pump and includes a second diode D.sub.22, a third diode D.sub.23, a flying capacitor C.sub.22, and an output capacitor C.sub.23. A voltage V.sub.C23 is generated across the output capacitor C.sub.23 by a step-up operation of the charge pump circuit 212. Here, a forward voltage of the diode is not considered.
V.sub.C23V.sub.C21+V.sub.AMP(5)

(37) V.sub.AMP is an amplitude of the step-up pulse S.sub.1 when the potential V.sub.S of the switching line 204 is set as a reference. Considering the forward voltage,
V.sub.C23=V.sub.C21+V.sub.AMP2V.sub.F(6).

(38) Voltage V.sub.C21 of FIG. 4 is a voltage corresponding to a voltage V.sub.IN of FIG. 1, and thus, is equal to V.sub.OUT. In addition, the voltage V.sub.C23 of the output capacitor C.sub.23 is V in FIG. 3. Therefore, Formula (5) can be rewritten to Formula (7).
V=V.sub.OUT+V.sub.AMP(7)

(39) In this manner, the appropriate power supply voltage V.sub.BOOST can be supplied to the VIN pin of the DC/DC converter 200 according to the step-up circuit 210 of FIG. 4.

(40) For example, the voltage V.sub.FB obtained by dividing the voltage V.sub.C21 across the first capacitor C.sub.21 by resistors R.sub.21 and R.sub.22 is fed back to the FB pin of the controller 300. In this case, the gate drive pulse V.sub.G is generated such that V.sub.FB=V.sub.C21R.sub.22/(R.sub.21+R.sub.22) coincides with an internal reference voltage V.sub.REF. Therefore, feedback is applied such that V.sub.C21=(R.sub.21+R.sub.22)/R.sub.22V.sub.REF. As described above, since V.sub.C21=V.sub.OUT, a target voltage V.sub.OUT(REF) of the output voltage V.sub.OUT becomes V.sub.OUT(REF)=(R.sub.21+R.sub.22)/R.sub.22V.sub.REF.

(41) FIG. 5 is a circuit diagram illustrating a configuration example of the controller 300. The controller 300 is a controller of a peak current mode. The buck converter 202 includes a current sense resistor R.sub.CS provided between the switching transistor M.sub.1 and the inductor L.sub.1. A current detection signal V.sub.CS corresponding to a voltage drop across the current sense resistor R.sub.CS is input to a current sense (CS) pin of the controller 300.

(42) An internal circuit of the controller 300 operates with the voltage V.sub.S of the switching line 204 supplied to the GND pin as a ground. The controller 300 includes a pulse modulator 301, an oscillator 306, a driver 314, and a step-up pulse generator 320.

(43) The oscillator 306 oscillates at a predetermined frequency to generate a set pulse S.sub.SET and a slope signal V.sub.SLOPE. The pulse modulator 301 generates a pulse signal S.sub.PWM in synchronization with the signals S.sub.SET and V.sub.SLOPE generated by the oscillator 306.

(44) A reference voltage source 308 generates the reference voltage V.sub.REF. An error amplifier 302 amplifies an error between the voltage V.sub.FB fed back to the FB pin and the reference voltage V.sub.REF to generate an error signal V.sub.ERR. A slope compensator 310 superimposes the slope signal V.sub.SLOPE on the current detection signal V.sub.CS input to the CS pin. A comparator 304 compares the error signal V.sub.ERR with a current detection signal V.sub.CS on which the slope signal V.sub.SLOPE is superimposed, and asserts a reset pulse S.sub.RESET (for example, sets the reset pulse to a high level) when V.sub.CS>V.sub.ERR. A flip-flop 312 transitions to an off-level (for example, a low level) in response to the assertion of the reset pulse S.sub.RESET, and generates a pulse signal S.sub.PWM to transition to an on-level (for example, a high level) in response to the set pulse S.sub.SET. A driver 314 generates the gate drive pulse V.sub.G of the switching transistor M.sub.1 based on the pulse signal S.sub.PWM. A starter circuit 316 receives a DC voltage V.sub.DC input to the VH pin and charges the capacitor C.sub.23 via the VIN pin at the time of activating the controller 300.

(45) The step-up pulse generator 320 generates the step-up pulse S.sub.1 based on a clock signal CK generated by the oscillator 306. The step-up pulse generator 320 may be a buffer or an inverter that receives the clock signal CK and applies the clock signal to the flying capacitor C.sub.22.

(46) Incidentally, a frequency of the clock signal CK (that is, a switching frequency of the switching transistor M.sub.1) is not always suitable as an operation frequency of the charge pump circuit 212. Thus, the step-up pulse generator 320 may include a frequency divider that multiplies or divides the clock signal CK and generate the step-up pulse S.sub.1 having a frequency optimum for the operation of the charge pump circuit 212.

(47) First Modification

(48) Next, modifications relating to the first embodiment will be described. The configuration of the step-up circuit 210 is not limited to FIG. 4. FIGS. 6A and 6B are circuit diagrams illustrating modifications of the step-up circuit 210. A charge pump circuit 212a in FIG. 6A includes switches M.sub.22 and M.sub.23 in place of the diodes D.sub.22 and D.sub.23, and a drive circuit 214 of the switches M.sub.22 and M.sub.23. The drive circuit 214 drives the switches M.sub.22 and M.sub.23 in synchronization with the clock signal CK generated by the oscillator 306. The drive circuit 214 may be built in the controller 300. In addition, the switches M.sub.22 and M.sub.23 configured using MOSFETs may be built in the controller 300.

(49) FIG. 6B illustrates a two-stage charge pump circuit 212b which includes two flying capacitors C.sub.22 and C.sub.24. A step-up voltage may be expressed by the following formula when a forward voltage of a rectifier element is not considered.
V.sub.BOOST=V.sub.OUT+V.sub.AMP2

(50) The number of stages of the charge pump circuit is not particularly limited and may be three or more.

(51) Second Modification

(52) The switching transistor M.sub.1 may be externally attached to the controller 300. FIG. 7 is a circuit diagram of the DC/DC converter 200 according to a second modification. The controller 300 includes an OUT pin connected to the gate of the switching transistor M.sub.1.

(53) The driver 314 outputs the gate drive pulse V.sub.G from the OUT pin. Other configurations are the same as those in FIG. 5.

(54) Third Modification

(55) The configuration of the controller 300 is not limited to those in FIGS. 5 and 7, and a controller of an average current mode or a controller of a voltage mode may be used. In addition, the buck converter 202 may be a synchronous rectification type.

Second Embodiment

(56) FIG. 8 is a circuit diagram of an AC/DC converter 100 including a DC/DC converter 200 according to an embodiment. The AC/DC converter 100 includes a rectifier circuit 104, a smoothing capacitor 106, and a DC/DC converter 200.

(57) The DC/DC converter 200 includes a non-isolated buck converter (step-down converter) 202, a step-up circuit 210, a controller 300, and peripheral components. A configuration of the buck converter 202 is similar to that of FIG. 1, and includes a switching transistor M.sub.1, a rectifier diode D.sub.1, an inductor L.sub.1, and an output capacitor C.sub.1.

(58) The controller 300 includes a VH pin, an OUT pin, a GND pin, a VIN pin, and an FB pin. A commercially available controller may be used as the controller 300, and a configuration thereof is not particularly limited.

(59) A wiring connected to a source of the switching transistor M.sub.1 is referred to as a switching line 204. The GND pin (ground) of the controller 300 is connected to the switching line 204. The controller 300 generates a pulse signal whose duty ratio (or frequency) varies such that a voltage V.sub.FB fed back to the FB pin coincides with a predetermined target value, and supplies a gate drive pulse V.sub.G according to the pulse signal to the switching transistor M.sub.1 via the OUT pin. A voltage having a correlation with an output voltage V.sub.OUT may be fed back to the FB pin, and this voltage is not particularly limited.

(60) The step-up circuit 210 receives the output voltage V.sub.OUT and the gate drive pulse V.sub.G of the DC/DC converter 200 (buck converter 202). Further, the step-up circuit 210 generates a power supply voltage V.sub.BOOST obtained by stepping up the output voltage V.sub.OUT at an output OUT thereof and supplies the generated power supply voltage to the input pin (V.sub.IN) of the controller 300. This power supply voltage V.sub.BOOST fluctuates while maintaining a higher state than a voltage V.sub.S of the switching line 204 by a constant potential difference V.
V.sub.BOOST=V.sub.S+V(1)

(61) The potential difference V is given as V=V.sub.OUT+V.sub.ADD . . . (2A) when a step-up voltage width by the step-up circuit 210 is V.sub.ADD. From another point of view, the potential difference V generated by the step-up circuit 210 may be expressed as Formula (2B) assuming that a step-up rate by the step-up circuit 210 is (>1).
V=V.sub.OUT(2B)

(62) The potential difference V is determined so as to be larger than a gate threshold voltage V.sub.GS(th) of the switching transistor M.sub.1.
V>V.sub.GS(th)(3)

(63) The configuration of the DC/DC converter 200 has been described as above. Next, an operation thereof will be described. FIG. 9 is an operation waveform diagram of the DC/DC converter 200 of FIG. 8. When the switching transistor M.sub.1 is switched at a duty ratio D in a steady state, the output voltage is stabilized such that V.sub.OUTDV.sub.DC. At this time, the voltage V.sub.S of the switching line is switched between V.sub.DC and V.sub.F.

(64) As described above, the power supply voltage V.sub.BOOST fluctuates while maintaining a state of being higher than the voltage V.sub.S of the switching line 204 by the potential difference V. This potential difference V is larger than the gate threshold voltage V.sub.GS(th) of the switching transistor M.sub.1.
V.sub.BOOST=V.sub.S+V(4)

(65) Here, V=V.sub.OUT+V.sub.ADD>V.sub.GS(th)

(66) A potential difference between the VIN pin and the GND pin of the controller 300, that is, a power supply voltage V.sub.DD of the controller 300 is V.sub.DD=V.sub.BOOSTV.sub.S=V. Since V>V.sub.GS(th) is established although a maximum amplitude of a voltage (gate-source voltage) VGS that can be generated between the OUT pin and the GND pin, that is, a gate and the source of the switching transistor M.sub.1 by the controller 300 is the power supply voltage V.sub.DD=V, the controller 300 can reliably turn on the switching transistor M.sub.1.

(67) Since V=V.sub.DDV.sub.OUT in a DC/DC converter 200R of FIG. 1, it is necessary to satisfy that V.sub.OUT>V.sub.GS(th). In contrast, V=V.sub.OUT+V.sub.ADD is established according to the DC/DC converter 200 of FIG. 8, and thus, it is possible to satisfy that V.sub.OUT<V.sub.GS(th). That is, a target voltage of the output voltage V.sub.OUT can be arbitrarily set without being restricted by the gate threshold voltage V.sub.GS(th), and can be set to be lower than that of the related art.

(68) The invention extends to various apparatuses and circuits that are grasped as the block diagram and the circuit diagram of FIG. 8, or derived from the above description, and are not limited to specific configurations. Hereinafter, more specific configuration examples and examples will be described in order not to narrow the scope of the present invention but to aid understanding of the essence of the invention and the circuit operation and for the sake of clarification thereof.

(69) FIG. 10 is a circuit diagram illustrating a specific configuration example of the DC/DC converter 200. The step-up circuit 210 includes a first diode D.sub.21, a first capacitor C.sub.21, and a charge pump circuit 212.

(70) One end of the first capacitor C.sub.21 is connected to the switching line 204. The first diode D.sub.21 has an anode that receives the output voltage V.sub.OUT of the DC/DC converter 200 (buck converter 202) and a cathode that is connected to the other end of the first capacitor C.sub.21.

(71) The charge pump circuit 212 is configured with the switching line 204 as a ground. The charge pump circuit 212 receives a voltage V.sub.C21 across the first capacitor C.sub.21 as an input voltage and performs a step-up operation according to the gate drive pulse V.sub.G.

(72) The charge pump circuit 212 is a voltage addition-type charge pump and includes a second diode D.sub.22, a third diode D.sub.23, a flying capacitor C.sub.22, and an output capacitor C.sub.23. A voltage V.sub.C23 is generated across the output capacitor C.sub.23 by a step-up operation of the charge pump circuit 212. Here, a forward voltage of the diode is not considered.
V.sub.C23V.sub.C21+V.sub.AMP(5)

(73) V.sub.AMP is the amplitude of the gate drive pulse V.sub.G when the potential V.sub.S of the switching line 204 is set as a reference. Considering the forward voltage,
V.sub.C23=V.sub.C21+V.sub.AMP2V.sub.F(6).

(74) Voltage V.sub.C21 of FIG. 10 is a voltage corresponding to a voltage V.sub.IN of FIG. 1, and thus, is equal to V.sub.OUT. In addition, the voltage V.sub.C23 of the output capacitor C.sub.23 is V in FIG. 9. Therefore, Formula (5) can be rewritten to Formula (7).
V=V.sub.OUT+V.sub.AMP(7)

(75) In this manner, the appropriate power supply voltage V.sub.BOOST can be supplied to the VIN pin of the DC/DC converter 200 according to the step-up circuit 210 of FIG. 10.

(76) For example, the voltage V.sub.FB obtained by dividing the voltage V.sub.C21 across the first capacitor C.sub.21 by resistors R.sub.21 and R.sub.22 is fed back to the FB pin of the controller 300. In this case, the gate drive pulse V.sub.G is generated such that V.sub.FB=V.sub.C21R.sub.22/(R.sub.21+R.sub.22) coincides with an internal reference voltage V.sub.REF. Therefore, feedback is applied such that V.sub.C21=(R.sub.21+R.sub.22)/R.sub.22V.sub.REF. As described above, since V.sub.C21=V.sub.OUT, a target voltage V.sub.OUT(REF) of the output voltage V.sub.OUT becomes V.sub.OUT(REF)=(R.sub.21+R.sub.22)/R.sub.22V.sub.REF.

(77) FIG. 11 is a circuit diagram illustrating a configuration example of the controller 300. The controller 300 is a controller of a peak current mode. The buck converter 202 includes a current sense resistor R.sub.CS provided between the switching transistor M.sub.1 and the inductor L.sub.1. A current detection signal V.sub.CS corresponding to a voltage drop across the current sense resistor R.sub.CS is input to a current sense (CS) pin of the controller 300.

(78) An internal circuit of the controller 300 operates with the voltage V.sub.S of the switching line 204 supplied to the GND pin as a ground. The controller 300 includes a pulse modulator 301, an oscillator 306, a driver 314, and a starter circuit 316. The oscillator 306 oscillates at a predetermined frequency to generate a set pulse S.sub.SET and a slope signal V.sub.SLOPE. The pulse modulator 301 generates a pulse signal S.sub.PWM in synchronization with the signals S.sub.SET and V.sub.SLOPE generated by the oscillator 306.

(79) A reference voltage source 308 generates the reference voltage V.sub.REF. An error amplifier 302 amplifies an error between the voltage V.sub.FB fed back to the FB pin and the reference voltage V.sub.REF to generate an error signal V.sub.ERR. A slope compensator 310 superimposes the slope signal V.sub.SLOPE on the current detection signal V.sub.CS input to the CS pin.

(80) A comparator 304 compares the error signal V.sub.ERR with a current detection signal V.sub.CS on which the slope signal V.sub.SLOPE is superimposed, and asserts a reset pulse S.sub.RESET (for example, sets the reset pulse to a high level) when V.sub.CS>V.sub.ERR. A flip-flop 312 transitions to an off-level (for example, a low level) in response to the assertion of the reset pulse S.sub.RESET, and generates a pulse signal S.sub.PWM to transition to an on-level (for example, a high level) in response to the set pulse S.sub.SET. A driver 314 generates the gate drive pulse V.sub.G of the switching transistor M.sub.1 based on the pulse signal S.sub.PWM. A starter circuit 316 receives a DC voltage V.sub.DC input to the VH pin and charges the capacitor C.sub.23 via the VIN pin at the time of activating the controller 300.

(81) The invention has been described as above based on the embodiments. Those examples are illustrative, and it is understood by those skilled in the art that various types of modification examples can be made in combinations of the respective components and the respective processes, and further, such modification examples are included in a range of the invention. Hereinafter, such modifications will be described.

(82) Fourth Modification

(83) The configuration of the step-up circuit 210 is not limited to FIG. 10. FIGS. 12A and 12B are circuit diagrams illustrating modifications of the step-up circuit 210. A charge pump circuit 212a in FIG. 12A includes switches M.sub.22 and M.sub.23 in place of the diodes D.sub.22 and D.sub.23, and a drive circuit 214 of the switches M.sub.22 and M.sub.23. The drive circuit 214 drives the switches M.sub.22 and M.sub.23 in synchronization with the gate drive pulse V.sub.G. The drive circuit 214 may be built in the controller 300. In addition, the switches M.sub.22 and M.sub.23 configured using MOSFETs may be built in the controller 300.

(84) FIG. 12B illustrates a two-stage charge pump circuit 212b which includes two flying capacitors C.sub.22 and C.sub.24. A step-up voltage may be expressed by the following formula when a forward voltage of a rectifier element is not considered.
V.sub.BOOST=V.sub.OUT+V.sub.AMP2

(85) The number of stages of the charge pump circuit is not particularly limited and may be three or more.

(86) Fifth Modification

(87) The configuration of the controller 300 is not limited to that in FIG. 11, and a controller of an average current mode or a controller of a voltage mode may be used. In addition, the buck converter 202 may be a synchronous rectification type. Application

(88) Next, the application of the DC/DC converter 200 described in the first or second embodiment will be described.

(89) FIG. 13 is a diagram illustrating an electronic device 900 including the AC/DC converter 100. The electronic device 900 in FIG. 7 is a refrigerator, but a type of the electronic device 900 is not particularly limited, and can be widely employed in so-called white goods with a built-in power supply apparatus such as a washing machine, a vacuum cleaner, and a rice cooker. Alternatively, the AC/DC converter 100 may also be employed in a lighting apparatus.

(90) A plug 902 receives a commercial AC voltage V.sub.AC from an electrical outlet (not illustrated). The AC/DC converter 100 is mounted inside a housing 904. The DC output voltage V.sub.OUT generated by the AC/DC converter 100 is supplied to a load (not illustrated), such as an inverter, a converter, a microcomputer, a lighting apparatus, an analog circuit, and a digital circuit, mounted inside the same housing 904.

(91) While the preferred embodiments of the present invention have been described using specific terms, such description is for illustrative purposes only, and it is to be understood that changes and variations may be made without departing from the spirit or scope of the appended claims.