Control strategies for multilevel line regenerative drive

Abstract

A control system (48) having a motor (28) is disclosed. The control system (48) may include a converter (32) operatively connected to a power source (36), an inverter (34) operatively connected to the motor (28), and a controller (50) operatively connected to the converter (32) or inverter (34). The controller (50) may be configured to receive control command signals, receive state feedback signals, and generate duty cycle signals for upper and lower arms of each phase (40) of the motor (28) based at least in part on the control command signals and state feedback signals. The duty cycle signals may minimize neutral point current in the converter (32) or inverter (34).

Claims

1. A control system having a motor, comprising: a converter operatively connected to a power source, the converter having a plurality of devices in selective communication with each phase of the power source; an inverter operatively connected to the motor, the inverter having a plurality of devices in selective communication with each phase of the motor; and a controller operatively connected to the converter or inverter, the controller being configured to: receive control command signals; receive state feedback signals; and generate duty cycle signals for upper and lower arms of each phase of the motor based at least in part on the control command signals and state feedback signals, the duty cycle signals minimizing neutral point current in the converter or inverter; wherein the controller is further configured to generate duty cycle injection signals based at least in part on the state feedback signals, a first duty cycle injection signal configured to balance neutral point voltage in the converter or inverter and a second duty cycle injection signal configured to relieve thermal stress across the plurality of devices.

2. The control system of claim 1, wherein the controller is further configured to generate a three-phase duty cycle signal based at least in part on the control command signals.

3. The control system of claim 2, wherein the controller is further configured to generate a duty cycle reference signal using the three-phase duty cycle signal.

4. The control system of claim 3, wherein the controller is further configured to determine the duty cycle signals for the upper and lower arms of each phase using the following formula: TABLE-US-00006 D*.sub.i = D*.sub.abc + 0.5[max(D*.sub.abc) + min(D*.sub.abc)] D*.sub.abc+ = 0.5(D*.sub.i min(D*.sub.i)) + D*.sub.off1 + D*.sub.off2 for upper arm D*.sub.abc = |0.5(D*.sub.i max(D*.sub.i))| D*.sub.off1 + D*.sub.off2 for lower arm where D*.sub.i is the duty cycle reference signal, D*.sub.abc is the three-phase duty cycle signal, D*.sub.abc+ is the duty cycle signal for the upper arm, D*.sub.abc is the duty cycle signal for the lower arm, and D*.sub.off1 and D*.sub.off2 are the duty cycle injection signals.

5. The control system of claim 3, wherein the controller is further configured to determine the duty cycle signals for the upper and lower arms of each phase using the following formula: TABLE-US-00007 D*.sub.i = D*.sub.abc + 0.5[max(D*.sub.abc) + min(D*.sub.abc)] D*.sub.abc+ = D*.sub.i+ + D*.sub.off1 + D*.sub.off2 for upper arm D*.sub.abc = D*.sub.i D*.sub.off1 + D*.sub.off2 for lower arm where D*.sub.i is the duty cycle reference signal, D*.sub.abc is the three-phase duty cycle signal, D*.sub.abc+ is the duty cycle signal for the upper arm, D*.sub.abc is the duty cycle signal for the lower arm, D*.sub.Off1 is the duty cycle injection signal from the DC voltage difference PI regulator, D*.sub.Off2 is the duty cycle injection signal from the harmonic calculator, D*.sub.i+ is the positive side of the duty cycle corresponding to the i (=a, b, or c) phase, and D*.sub.i is the negative side of the duty cycle corresponding to the i (=a, b, or c) phase.

6. A control system having a motor, comprising: a converter operatively connected to a power source, the converter having a plurality of devices in selective communication with each phase of the power source; an inverter operatively connected to the motor, the inverter having a plurality of devices in selective communication with each phase of the motor; and a controller operatively connected to the converter or inverter, the controller being configured to: receive control command signals; receive state feedback signals; and generate duty cycle signals for upper and lower arms of each phase of the motor based at least in part on the control command signals and state feedback signals, the duty cycle signals minimizing neutral point current in the converter or inverter; wherein the controller is further configured to determine dead-time compensation for each phase using the following formula:
D*.sub.comp=sign(i)T.sub.DTF.sub.s where D*.sub.comp is the dead-time compensation, i is phase current direction, T.sub.DT is dead-time duration, and F.sub.s is pulse width modulation frequency.

7. The control system of claim 1, wherein the converter or inverter has a diode-neutral-point-clamped topology or a T-type topology.

8. The control system of claim 1, wherein the control system is applied to an elevator system.

9. A method for controlling a converter or an inverter, the method comprising: receiving state feedback signals and control command signals; generating duty cycle injection signals based at least in part on the state feedback signals; generating a three-phase duty cycle signal based at least in part on the control command signals; generating duty cycle signals for upper and lower arms of each phase of the motor which simultaneously balance neutral point voltage and thermal stress in the converter or inverter, the duty cycle signals being based at least in part on the duty cycle injection signals and the three-phase duty cycle signal; determining dead-time compensation for each phase based at least in part on phase current direction, dead-time duration, and pulse width modulation frequency.

10. The method of claim 9, further comprising modifying the duty cycle signals to incorporate the dead-time compensation.

11. The method of claim 9, further comprising the converter or inverter having a diode-neutral-point-clamped topology or a T-type topology.

12. The method of claim 9, further comprising determining values of the duty cycle injection signals based at least in part on the state feedback signals and a voltage difference between upper and lower DC buses of the converter or inverter.

13. An elevator system, comprising: an elevator car disposed in a hoistway; a motor operatively connected to the elevator car, the motor generating a thrust force to move the elevator car within the hoistway; a power source operatively connected to the motor, the power source supplying power to the motor; a converter operatively connected to the power source, the converter having a plurality of devices in selective communication with each phase of the power source; an inverter operatively connected to the motor, the inverter having a plurality of devices in selective communication with each phase of the motor; and a controller in communication with the converter or inverter, the controller being configured to: receive control command signals; receive state feedback signals; and generate duty cycle signals for upper and lower arms of each phase of the motor that simultaneously balance neutral point voltage and thermal stress in the converter or inverter, the duty cycle signals being based at least in part on the control command signals and the state feedback signals; wherein the controller is further configured to determine dead-time compensation for each phase of the motor, and modify the duty cycle signals to include the dead-time compensation.

14. The elevator system of claim 13, wherein the converter or inverter has a diode-neutral-point-clamped topology or a T-type topology.

15. The elevator system of claim 13, wherein the controller is further configured to have a harmonic calculator, the harmonic calculator generating a duty cycle injection signal that balances neutral point voltage of the converter or inverter.

16. The elevator system of claim 13, wherein the controller is further configured to have a voltage difference regulator, the voltage difference regulator generating a duty cycle injection signal that balances thermal stress across the plurality of devices in the converter or inverter.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic representation of an elevator system, according to one embodiment of the present disclosure;

(2) FIG. 2 is a schematic representation of a diode-neutral-point-clamped (DNPC) regenerative drive for the elevator system of FIG. 1 according to an exemplary embodiment of the invention;

(3) FIG. 3 is a schematic representation of a phase leg of a converter or an inverter of the regenerative drive of FIG. 2 according to an exemplary embodiment of the invention;

(4) FIG. 4 is a schematic representation of a T-type regenerative drive for the elevator system of FIG. 1 according to an exemplary embodiment of the invention;

(5) FIG. 5 is a schematic representation of a phase leg of a converter or an inverter of the regenerative drive of FIG. 4 according to an exemplary embodiment of the invention;

(6) FIG. 6 is a schematic representation of a controller for the converter/inverter of FIGS. 2 and 4 according to an exemplary embodiment of the invention;

(7) FIG. 7 is a schematic representation of a thermal and neutral point balancing regulator for the controller of FIG. 6 according to an exemplary embodiment of the invention;

(8) FIG. 8 is a diagram of a triangle comparison within a PWM modulator for the controller of FIG. 6 according to an exemplary embodiment of the invention;

(9) FIG. 9 is a flowchart illustrating an exemplary process for controlling a converter or an inverter, according to an exemplary embodiment of the invention;

(10) FIG. 10 is a graph of a current waveform of the prior art illustrating current distortion due to dead-time effects;

(11) FIG. 11 is a graph of a current waveform with dead-time compensation using modulation techniques of the present disclosure according to an exemplary embodiment of the invention;

(12) FIG. 12 is a graph showing simulation results of three-phase current of the prior art;

(13) FIG. 13 is a graph showing simulation results of neutral point current using modulation techniques according to exemplary embodiments of the invention;

(14) FIG. 14 is a graph showing simulation results for a maximum device j-c temperature rise T.sub.jc in both DNPC and T-type topologies of the prior art; and

(15) FIG. 15 is a graph showing simulation results for a maximum device j-c temperature rise T.sub.jc in both DNPC and T-type topologies using modulation techniques according to various exemplary embodiments of the invention.

(16) While the present disclosure is susceptible to various modifications and alternative constructions, certain illustrative embodiments thereof, will be shown and described below in detail. It should be understood, however, that there is no intention to be limited to the specific embodiments disclosed, and the intention is to cover all modifications, alternative constructions, and equivalents along within the spirit and scope of the present disclosure.

DETAILED DESCRIPTION

(17) Referring now to the drawings, and with specific reference to FIG. 1, a schematic diagram of an elevator system 20 is provided, according to an exemplary embodiment. It is to be understood that the version of the elevator system 20 shown in FIG. 1 is for illustrative purposes only and to assist in disclosing various embodiments of the invention. As is understood by a person skilled in the art, FIG. 1 does not depict all of the components of an exemplary elevator system, nor are the depicted features necessarily included in all elevator systems.

(18) As shown in FIG. 1, the elevator system 20 may reside fully or partially in a hoistway 22 that is vertically disposed within a building. The hoistway 22 may provide a vertical path through which an elevator car 24 may travel between floors or landings 26 of the building. A motor 28, or other prime mover, may be operatively connected to the elevator car 24 in order to generate a thrust force to move the elevator car 24 within the hoistway 22. The motor 28 may also be referred to as a machine, or in alternate configurations, the motor 28 may be a part of a machine that is used to move an elevator car 24.

(19) A power source 36 (as shown in FIG. 2) may be operatively connected to the motor 28 in order to supply power to the motor 28. The power source 36 may be externally generated power, such as from a power utility grid. The motor 28 and power source 36 may each be three-phase. In addition, a regenerative drive 30 may be coupled to the motor 28 and power source 36 in order to operate the motor 28 to achieve the desired elevator car movement.

(20) Referring now to FIGS. 2-5, with continued reference to FIG. 1, the regenerative drive 30 may include a converter 32 on the input or power utility grid side and an inverter 34 on the motor side. More specifically, the converter 32 may be operatively connected to the power source 36 and may have a phase-leg 42 for each phase 40 of the power source 36. The inverter 34 may be operatively connected to the converter 32 and motor 28 and may have a phase-leg 42 for each phase 40 of the motor 28. In this example, since the power source 36 and motor 28 are each three phase, the converter 32 and the inverter 34 may each have three phase-legs 42.

(21) Furthermore, each phase-leg R, S, T of the converter 32 may have a plurality of devices 38 in selective communication with each phase 40 of the power source 36, and each phase-leg W, V, U of the inverter 34 may have a plurality of devices 38 in selective communication with each phase 40 of the motor 28. The regenerative drive 30 may be a multilevel drive having a multilevel converter 32 and a multilevel inverter 34. In this example, the regenerative drive 30 may be a three-level drive with a three-level converter 32 and a three-level inverter 34. More specifically, each phase-leg 42 of the converter 32 and inverter 34 may output three levels of voltage, e.g., a positive voltage, a neutral point voltage, and a negative voltage.

(22) As shown best in FIGS. 2 and 3, each phase-leg 42 of the converter 32 and inverter 34 may have a diode-neutral-point-clamped (DNPC) topology 44. In an embodiment shown in FIGS. 4 and 5, each level or phase-leg 42 of the converter 32 and inverter 34 may have a T-type topology 46. It is to be understood that other topologies for the phase-leg 42 of the converter 32 and inverter 34 are certainly possible.

(23) A control system 48 may be used to control the regenerative drive 30. More specifically, a controller 50 may be operatively connected to and used to control the converter 32 and inverter 34. Although the controller 50 is shown and described as applying to both the converter 32 and the inverter 34, it is to be understood that there may be two separate controllers instead of one controller, e.g., one controller for the converter 32 and one controller for the inverter 34. The controller 50 may comprise a processor (e.g., computer processor) or processor-based device that may include or be associated with a non-transitory computer readable storage medium having stored thereon computer-executable instructions. It is understood that the control system 48 and controller 50 may include other hardware, software, firmware, or combinations thereof.

(24) As shown best in FIG. 6, the controller 50 may include modules 52, 54, 56, 58, 60, 62 in communication with each other. More specifically, an outer regulator 52 may receive control command signals and state feedback signals to generate direct quadrature (D-Q) current command signals i*.sub.q, i*.sub.d. The control command signals may be real and reactive power, direct current (DC) link voltage, and the like. The state feedback signals may be real and reactive power, DC link voltage, and the like.

(25) A D-Q current regulator 54 may receive the D-Q current command signals i*.sub.q, i*.sub.d from the outer regulator 52, as well as measured D-Q current signals i.sub.q, i.sub.d, to generate D-Q duty cycle command signals D*.sub.q, D*.sub.d. A DQ/ABC transformation module 56 receives the D-Q duty cycle command signals D*.sub.q, D*.sub.d and phase angle . The DQ/ABC transformation module 56 converts the two-phase D-Q duty cycle command signals D*.sub.q, D*.sub.d into three-phase quantities, generating a three-phase duty cycle signal D*.sub.abc.

(26) The three-phase duty cycle signal D*.sub.abc, and state feedback signals are fed into a thermal and neutral point (NP) balancing module 58. The thermal and NP balancing module 58 generates duty cycle signals D*.sub.abc, D*.sub.abc for upper and lower arms of each phase of the motor that balance neutral point voltage and thermal stress in the converter and/or inverter. More specifically, as shown best in FIG. 7, the thermal and NP balancing module 58 may include the following modules: harmonic calculator 64, DC voltage difference proportional-integral (PI) regulator 66, and modulator 68.

(27) The harmonic calculator 64 receives the state feedback signals. Based on the state feedback signals, the harmonic calculator 64 generates a duty cycle injection signal D*.sub.off2 that balances NP voltage of the converter and/or inverter. In order to determine a value of duty cycle injection signal D*.sub.off2, the harmonic calculator 64 may be implemented using techniques such as, without limitation, a look-up table, linear equations, nonlinear equations, and the like.

(28) A higher value for the duty cycle injection signal D*.sub.off2 indicates an increased injection applied to the converter and/or inverter. Therefore, increased current flows through outer insulated-gate bipolar transistors (IGBTs) and diodes, while less current flows through the neutral point path. When output current is high and frequency is low, a higher value of D*.sub.off2 can be chosen. When the converter/inverter has a decreased load, then a lower value of D*.sub.off2 may be appropriate for switching loss reduction. In so doing, the harmonic calculator 64 minimizes NP current in order to maintain a desired NP voltage of the converter/inverter.

(29) The state feedback signals may include a voltage difference between upper and lower DC buses of the converter and inverter. The voltage difference between the upper and lower DC buses is fed into the DC voltage difference PI regulator 66. The DC voltage difference PI regulator 66 generates duty cycle injection signal D*.sub.off1 that eliminates steady-state NP voltage unbalance and has slow dynamics in order to prevent instability. In so doing, the DC voltage difference PI regulator 66 generates duty cycle injection signal D*.sub.off1 that balances or relieves uneven thermal stress across the plurality of devices in the converter/inverter.

(30) Together with the three-phase duty cycle signal D*.sub.abc, the duty cycle injection signals D*.sub.off1 and D*.sub.off2 from modules 64, 66 are fed into the modulator 68. The modulator 68 determines the duty cycles for the upper and lower arms of each phase of the motor, generating duty cycle signals D*.sub.abc+, D*.sub.abc. In order to calculate the duty cycles for upper and lower arms of each phase leg, the modulator 68 may use the following formula:

(31) TABLE-US-00003 D*.sub.i = D*.sub.abc + 0.5[max(D*.sub.abc) + min(D*.sub.abc)] D*.sub.abc+ = 0.5(D*.sub.i min(D*.sub.i)) + D*.sub.off1 + D*.sub.off2 for upper arm D*.sub.abc = |0.5(D*.sub.i max(D*.sub.i))| D*.sub.off1 + D*.sub.off2 for lower arm
where D*.sub.i is a duty cycle reference signal, D*.sub.abc is the three-phase duty cycle signal, D*.sub.abc+ is the duty cycle signal for the upper arm, D*.sub.abc is the duty cycle signal for the lower arm, D*.sub.off1 is the duty cycle injection signal from the DC voltage difference PI regulator, and D*.sub.off2 is the duty cycle injection signal from the harmonic calculator.

(32) It is to be understood that the neutral point balancing algorithm from the DC voltage difference PI regulator 66 with output D*.sub.off1 and the thermal balancing algorithm from the harmonic calculator 64 with output D*.sub.off2 may be used independently with a variety of base pulse width modulation (PWM) techniques. For example, in another embodiment, the above equations may be modified, and the modulator 68 may use the following formula in order to calculate the duty cycles for upper and lower arms of each phase leg:

(33) TABLE-US-00004 D*.sub.i = D*.sub.abc + 0.5[max(D*.sub.abc) + min(D*.sub.abc)] D*.sub.abc+ = D*.sub.i+ + D*.sub.off1 + D*.sub.off2 for upper arm D*.sub.abc = D*.sub.i D*.sub.off1 + D*.sub.off2 for lower arm
where D*.sub.i is the duty cycle reference signal, D*.sub.abc is the three-phase duty cycle signal, D*.sub.abc+ is the duty cycle signal for the upper arm, D*.sub.abc is the duty cycle signal for the lower arm, D*.sub.off1 is the duty cycle injection signal from the DC voltage difference PI regulator, D*.sub.off2 is the duty cycle injection signal from the harmonic calculator, D*.sub.i+ is the positive side of the duty cycle corresponding to the i (=a, b, or c) phase, and D*.sub.i is the negative side of the duty cycle corresponding to the i (=a, b, or c) phase.

(34) Other base PWM techniques that may be used include, but are not limited to, space vector PWM (SPWM), sin-triangle PWM with third harmonic injection, discontinuous PWM (DPWM) in which the switches are not switched during a period of large current in the alternating current waveform (e.g., converter/inverter), and the like.

(35) Referring back to FIG. 6, a dead-time compensator 60 may receive the duty cycle signals D*.sub.abc+, D*.sub.abc from the thermal and neutral point (NP) balancing module 58. The dead-time compensator 60 may modify the duty cycle signals D*.sub.abc+, D*.sub.abc to compensate for dead-time, generating modified duty cycle signals D**.sub.abc+, D**.sub.abc Dead-time may be adopted to prevent shoot-through across the DC-link, as well as to guarantee a low voltage rate of change (dV/dt) stress at the alternating current (AC) terminals. Furthermore, application of proper dead-time compensation may prevent current distortion introduced by adopting dead-time. Dead-time compensation may be based on phase current direction, dead-time duration, and PWM frequency. The dead-time compensator 60 may determine dead-time compensation for each phase leg using the following formula:

(36) TABLE-US-00005 D*.sub.comp = sign(i) T.sub.DT F.sub.s D**.sub.abc+ = D*.sub.abc+ + D*.sub.comp for upper arm D**.sub.abc = D*.sub.abc D*.sub.comp for lower arm
where D*.sub.comp is the dead-time compensation, i is the phase current direction, T.sub.DT is the dead-time duration, F.sub.s is the PWM frequency, D*.sub.abc+ is the duty cycle signal for the upper arm, D*.sub.abc is the duty cycle signal for the lower arm, D**.sub.abc+ is the modified duty signal for the upper arm, and D**.sub.abc is the modified duty signal for the lower arm.

(37) A PWM modulator 62 may receive the modified duty signals D**.sub.abc+, D**.sub.abc for triangle comparison. Triangle comparison controls semiconductor devices in the power circuit and may be implemented in the PWM modulator 62, as illustrated in FIG. 8. There may be one comparator for each phase leg in the PWM modulator 62 that receives the modified positive and negative duty cycle signals D**.sub.i+, D**.sub.i for (i=a, b, c). The comparator may then output logic signals T.sub.i1T.sub.i4 which control corresponding IGBTs (FIGS. 2-5) in the converter/inverter (where 1=turn on and 0=turn off). The modified positive and negative duty cycle signals D**.sub.i+, D**.sub.i from the modulators are compared with two carriers Carrier+, Carrier, respectively. The two carriers Carrier+, Carrier are phase-shifted by one hundred eighty degrees)(180). The logic calculations are shown below:
If D*.sub.i+Carrier+, then T.sub.i1=1, T.sub.i3=0; else T.sub.i1=0, T.sub.i3=1
If D*.sub.iCarrier, then T.sub.i4=1, T.sub.i2=0; else T.sub.i4=0, T.sub.i2=1
where D*.sub.i is the negative side of the duty cycle corresponding to the i (=a, b, or c) phase, D*.sub.i is the positive side of the duty cycle corresponding to the i (=a, b, or c) phase, Carrier+ is the positive side of the carrier, Carrier is the negative side of the carrier, and T.sub.i1T.sub.i4 are the output logic signals controlling corresponding IGBTs in FIGS. 2-5.

(38) Turning now to FIG. 9, with continued reference to FIGS. 1-8, an exemplary process 80 for controlling the converter 32 and/or inverter 34 coupled to the motor 28 is shown. At block 82, the controller 50 may receive state feedback signals and control command signals. The controller 50 may generate duty cycle injection signals D*.sub.off1, D*.sub.off2 based at least in part on the state feedback signals, at block 84. At block 86, the controller 50 may generate the three-phase duty cycle signal D*.sub.abc based at least in part on the control command signals. At block 88, the controller 50 may generate duty cycle signals D*.sub.abc+, D*.sub.abc for upper and lower arms of each phase of the motor 28. The duty cycle signals D*.sub.abc+, D*.sub.abc may be based at least in part on the duty cycle injection signals D*.sub.off1, D*.sub.off2 and the three-phase duty cycle signal D*.sub.abc. Furthermore, the duty cycle signals D*.sub.abc+, D*.sub.abc balance neutral point voltage and thermal stress in the converter/inverter.

INDUSTRIAL APPLICABILITY

(39) From the foregoing, it can be seen that the teachings of this disclosure can find industrial or commercial applications, such as, including but not limited to, control systems for regenerative drives. Such control systems may be used, for example, in traction applications, such as, including but not limited to, elevator systems.

(40) The described disclosure provides a control system and method for a three-level converter and/or inverter in a regenerative drive. The disclosed modulation formulae for the control system and method are convenient for implementation in digital controllers. Using the disclosed modulation formulae appropriately, it is possible to control the neutral point current in order to balance the neutral point voltage, thereby minimizing the DC-link capacitance requirement. At the same time, the thermal stress in the converter/inverter can be distributed evenly among all the devices, which translates into a significant increase in the converter/inverter power throughput and a substantial enhancement in the expected device lifetime.

(41) The disclosed controller conveniently manages thermal stress of the devices because the disclosed modulation techniques are related to only one control variable (duty cycle injection signal D*.sub.off2) and the control logic is straightforward. Furthermore, the disclosed thermal balancing modulation technique allows for continuous variation of the control variable (duty cycle injection signal D*.sub.off2), thereby eliminating the need to switch back and forth between the neutral point balancing PWM and bipolar PWM and improving voltage total harmonic distortion.

(42) Moreover, the disclosed modulation techniques include dead-time compensation. Compared to the prior art current waveform shown in FIG. 10, the dead-time compensation of the present disclosure improves the current distortion due to dead-time effects, as shown in FIG. 11.

(43) The modulation techniques disclosed herein can be used in both DNPC and T-type topologies for three-level converters and/or three-level inverters. FIGS. 12-15 depict simulation results of the disclosed modulation techniques compared to the prior art. Compared to the prior art results in FIG. 12, neutral point current is significantly minimized using the disclosed modulation techniques, as shown in FIG. 13. Compared to the prior art results in FIG. 14, the maximum device j-c temperature rise T.sub.jc is also significantly reduced using the disclosed modulation techniques, as shown in FIG. 15. In addition, the benefits of the disclosed techniques are achieved without using higher rating devices or adding extra circuit components, and the increased computational power required to fulfill the described techniques is minimal.

(44) While the foregoing detailed description has been given and provided with respect to certain specific embodiments, it is to be understood that the scope of the disclosure should not be limited to such embodiments, and that the same are provided simply for enablement and best mode purposes. The breadth and spirit of the present disclosure is broader than the embodiments specifically disclosed and encompassed within the claims appended hereto. It is understood that features described with relation to a specific embodiment may be used with alternate embodiments where practicable.