Peak detector and operational amplifier circuit therein

Abstract

A peak detector utilizes two choppers to cancel offset voltage of a transconductance amplifier, so the influence of the offset voltage is preventable and the peak detection accuracy of the peak detector can be improved significantly.

Claims

1. A peak detector comprising: an operational amplifier circuit including a first chopper, a transconductance amplifier, a second chopper and a low pass filter, the transconductance amplifier is electrically connected with the first and second choppers, and the low pass filter is electrically connected with the second chopper, wherein the second chopper is configured to modulate a offset voltage of the transconductance amplifier to higher frequency, and the low pass filter is configured to filter out the offset voltage with higher frequency; a charge transistor electrically connected with the low pass filter of the operational amplifier circuit, wherein turning on or turning off the charge transistor is determined by a output signal of the low pass filter; and a charge capacitor electrically connected with the charge transistor and the operational amplifier circuit, wherein when the charge transistor is turned on, the charge capacitor is charged for detecting a peak of a input voltage signal.

2. The peak detector in accordance with claim 1, wherein the first chopper is configured to receive and modulate the input voltage signal and a charge voltage signal of the charge capacitor to higher frequency, the transconductance amplifier is configured to convert the input voltage signal the charge voltage signal with higher frequency to a first output signal and a second output signal with higher frequency, and the second chopper is configured to modulate the first output signal and the second output signal from higher frequency to lower frequency.

3. The peak detector in accordance with claim 2 further includes an integrator, wherein the integrator is electrically connected with the second chopper, and the integrator is configured to provide a gain and convert the first output signal and the second output signal to a first voltage signal and a second voltage signal.

4. The peak detector in accordance with claim 3, wherein the integrator includes an integrated operational amplifier, a first integrated capacitor and a second integrated capacitor, the integrated operational amplifier includes a positive input end, a negative input end, a first output end and a second output end, wherein two ends of the first integrated capacitor are respectively and electrically connected with the positive input end and the first output end, and two ends of the second integrated capacitor are respectively and electrically connected with the negative input end and the second output end.

5. The peak detector in accordance with claim 3 further includes a buffer, wherein the buffer is electrically connected with the integrator for receiving the first voltage signal and the second voltage signal, and the buffer is configured to separate the integrator and the low pass filter.

6. The peak detector in accordance with claim 1 further includes an inverter, wherein the inverter is electrically connected with the low pass filter of the operational amplifier circuit for receiving the output signal, and the inverter is configured to output an invert output signal.

7. A operational amplifier circuit of a peak detector comprising: a first chopper configured to receive and modulate a input voltage signal and a charge voltage signal to higher frequency; a transconductance amplifier electrically connected with the first chopper, wherein the transconductance amplifier is configured to modulate the input voltage signal and the charge voltage signal with higher frequency to a first output signal and a second output signal with higher frequency; a second chopper electrically connected with the transconductance amplifier, wherein the second chopper is configured to modulate the first output signal and the second output signal from higher frequency to lower frequency, and the second chopper is configured to modulate a offset voltage of the transconductance amplifier to higher frequency; and a low pass filter electrically connected with the second chopper, wherein the low pass filter is configured to filter out the offset voltage with higher frequency and remain the first output signal and the second output signal with lower frequency.

8. The operational amplifier circuit in accordance with claim 7 further includes an integrator, wherein the integrator is electrically connected with the second chopper, and the integrator is configured to provide a gain and convert the first output signal and the second output signal to a first voltage signal and a second voltage signal.

9. The operational amplifier circuit in accordance with claim 8, wherein the integrator includes an integrated operational amplifier, a first integrated capacitor and a second integrated capacitor, the integrated operational amplifier includes a positive input end, a negative input end, a first output end and a second output end, and wherein two ends of the first integrated capacitor are respectively and electrically connected with the positive input end and the first output end, and two ends of the second integrated capacitor are respectively and electrically connected with the negative input end and the second output end.

10. The operational amplifier circuit in accordance with claim 8 further includes a buffer, wherein the buffer is electrically connected with the integrator for receiving the first voltage signal and the second voltage signal, and the buffer is configured to separate the integrator and the low pass filter.

Description

DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a circuit diagram illustrating a peak detector in accordance with one embodiment of the present invention.

(2) FIG. 2 is a functional block diagram illustrating an operational amplifier circuit of the peak detector in accordance with one embodiment of the present invention.

(3) FIG. 3 is a circuit diagram illustrating the operational amplifier circuit of the peak detector in accordance with one embodiment of the present invention.

(4) FIG. 4 is a circuit diagram illustrating a transconductance amplifier of the operational amplifier circuit in accordance with one embodiment of the present invention.

(5) FIG. 5 is a circuit diagram illustrating an integrated operational amplifier of the operational amplifier circuit in accordance with one embodiment of the present invention.

(6) FIG. 6 is a circuit diagram illustrating a buffer of the operational amplifier circuit in accordance with one embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

(7) A circuit diagram of a peak detector 100 in one embodiment is represented in FIG. 1. The peak detector 100 includes an operational amplifier (OPA) circuit 110, a charge transistor 120, a charge capacitor 130, an inverter 140 and a reset transistor 150. The OPA circuit 110 is arranged to receive an input voltage signal V.sub.in via a negative end and output a output signal V.sub.out via a output end. The charge transistor 120 is arranged to receive the output signal V.sub.out by a gate terminal and receive a power by a source terminal. As a result, turning on or turning off the charge transistor 120 can be determined by the electric potential of the output signal V.sub.out. One end of the charge capacitor 130 is electrically connected with a drain terminal of the charge transistor 120, and the other end of the charge capacitor 130 is connected to ground. When the transistor 120 is ON, the power can charge the charge capacitor 130 through the charge transistor 120 to increase the electric potential of a charge voltage signal V.sub.c of the charge capacitor 130, then the charge voltage signal V.sub.c of the charge capacitor 130 feedbacks to a positive end of the OPA circuit 110 for comparing the charge voltage signal V.sub.c and the input voltage signal V.sub.in in electric potential. Owing to the charge voltage signal V.sub.c and the input voltage signal V.sub.in are respectively inputted into the positive end and the negative end of the OPA circuit 110, when the input voltage signal V.sub.in is higher than the charge voltage signal V.sub.c in electric potential, the output voltage signal V.sub.out is low potential and switches on the charge transistor 120 to charge the charge capacitor 130 by the power. On the contrary, when the input voltage signal V.sub.in is lower than the charge voltage signal V.sub.c in electric potential, the output signal V.sub.out is high potential and cut off the charge transistor 120, so the power stops charging the charge capacitor 130 and that means the input voltage signal V.sub.in reaches a peak.

(8) With reference to FIG. 1, the inverter 140 is electrically connected with the output end of the OPA circuit 110 for receiving the output signal V.sub.out, and the inverter 140 is configured to invert the output signal V.sub.out to an invert output signal V.sub.out.sub._.sub.i for the benefit of back-end circuit control. However, the inverter 140 is not essential in the present invention, i.e., the peak detector 100 in other embodiments may not require the inverter 140.

(9) With reference to FIG. 1, a drain terminal of the reset transistor 150 is electrically connected with one end of the charge capacitor 130, a gate terminal of the reset transistor 150 is arranged to receive a reset signal reset and a source terminal of the reset transistor 150 is connected to ground. When the reset signal reset is high potential, the reset transistor 150 is turned on and provides a discharge path for the charge capacitor 130, so can lower the electric potential of the charge voltage signal V.sub.c and reset the peak detector 100 for the next peak detection.

(10) FIG. 2 is a functional block diagram of the OPA circuit 110. The OPA circuit 110 includes a first chopper 111, a transconductance amplifier 112, a second chopper 113 and a low pass filter 116. An offset voltage in the transconductance amplifier 112 is the major problem affecting the peak detector 100 accuracy. For this reason, the first and second choppers 111 and 113 are provided to eliminate the interference of the offset voltage in the transconductance amplifier 112.

(11) The first chopper 111 is configured to receive and up-modulate the input voltage signal V.sub.in and the charge voltage signal V.sub.c to higher frequency. The transconductance amplifier 112 is electrically connected with the first chopper 111 and is configured to convert the input voltage signal V.sub.in and the charge voltage signal V.sub.c with higher frequency into a output signal with higher frequency. The second chopper 113 is electrically connected with the transconductance amplifier 112 and is utilized to down-modulate the output signal to lower frequency. However, because the first chopper 111 didn't modulate the offset voltage of the transconductance amplifier 112, the offset voltage delivered to the second chopper 113 will be up-modulated to higher frequency by the second chopper 113. The low pass filter 116 is electrically connected with the second chopper 113 and is configured to filter out the offset voltage of the transconductance amplifier 112, which is up-modulated to higher frequency; and output the output signal V.sub.out with lower frequency, so can eliminate the influence of the offset voltage of the transconductance amplifier 112.

(12) With reference to FIG. 3, it is a circuit diagram showing the OPA circuit 110 in a better embodiment of the present invention. The OPA circuit 110 further includes an integrator 114 and a buffer 115 in this embodiment, and the transconductance amplifier 112 has a double-ended output.

(13) In this embodiment, similarly, the first chopper 111 is configured to receive and up-modulate the input voltage signal V.sub.in and the charge voltage signal V.sub.c to higher frequency, and the transconductance amplifier 112 is configured to receive the input voltage signal V.sub.in and the charge voltage signal V.sub.c with higher frequency and output a first output signal O.sub.1 and a second output signal O.sub.2. The transconductance amplifier 112 in this embodiment is an operational transconductance amplifier whose circuit is shown as FIG. 4, and the operational transconductance amplifier is used to convert voltage signals into current signals. The symbols V.sub.b1V.sub.b4 in FIG. 4 are the bias voltages.

(14) With reference to FIG. 3, the second chopper 113 is configured to receive and down-modulate the first output signal O.sub.1 and the second output signal O.sub.2 to lower frequency. Furthermore, the second chopper 113 is configured to up-modulate the offset voltage of the transconductance amplifier 112 to higher frequency due to the first chopper 111 didn't up-modulate the offset voltage to higher frequency.

(15) The integrator 114 is electrically connected with the second chopper 113 and is provided to receive the first output signal O.sub.1, the second output signal O.sub.2 and the offset voltage which are modulated by the second chopper 113. Moreover, the integrator 114 is used to provide a gain and convert the first output signal O.sub.1 and the second output signal O.sub.2 with lower frequency to a first voltage signal V.sub.1 and a second voltage signal V.sub.2, and is used to filter out the partial offset voltage which is up-modulated to high frequency. The buffer 115 is electrically connected with the integrator 114 for receiving the first and second voltage signals V.sub.1 and V.sub.2. And the buffer 115 is configured to separate the integrator 114 and the low pass filter 116 for preventing the interaction with each other and convert from double-ended output to signal-ended output for the benefit of back-end circuit use. The low pass filter 116 is electrically connected with the buffer 115 in order to filter out the offset voltage with higher frequency in the output signals, such that to obtain the output signal V.sub.out without the influence of the offset voltage.

(16) With reference to FIG. 3, the integrator 114 includes an integrated operational amplifier 114a, a first integrated capacitor 114b and a second integrated capacitor 114c in this embodiment. The integrated operational amplifier 114a includes a positive input end 114d, a negative input end 114e, a first output end 114f and a second output end 114g. The positive and negative input ends 114d and 114e are electrically connected with the second chopper 113 for receiving the first output signal O.sub.1 and the second output signal O.sub.2, respectively. Two ends of the first integrated capacitor 114b are respectively and electrically connected with the positive input end 114d and the first output end 114f. And two ends of the second integrated capacitor 114c are respectively and electrically connected with the negative input end 114e and the second output end 114g. The circuit diagram of the integrated operational amplifier 114a is shown as FIG. 5, and the symbols V.sub.b1V.sub.b3 in FIG. 5 are the bias voltages.

(17) FIG. 6 is the circuit diagram of the buffer 115, and the symbol V.sub.bias is the bias voltage. The capacitor Cc is a Miller compensation capacitor which is used to increase the phase margin and allow the buffer 115 to operate normally when existing a feedback path. As a result, the occurrence of signal oscillation and signal divergence is preventable.

(18) With reference to FIG. 3, the OPA circuit 110 in this embodiment further includes a first frequency compensation capacitor 117 and a second frequency compensation capacitor 118 which are used for frequency compensation. Two ends of the first frequency compensation capacitor 117 are respectively and electrically connected with the positive input end 114d of the integrated operational amplifier 114a and the low pass filter 116. One end of the second frequency compensation capacitor 118 is electrically connected with the negative input end 114e of the integrated operational amplifier 114a, and the other end of the second frequency capacitor 118 is connected to ground.

(19) The modulation of the first and second choppers 111 and 113 and the filtering of the low pass filter 116 can cancel the offset voltage of the transconductance amplifier 112, such that the detection of the peak detector 100 will not be affected by the offset voltage and the accuracy of the peak detector 100 will be improved.

(20) While this invention has been particularly illustrated and described in detail with respect to the preferred embodiments thereof, it will be clearly understood by those skilled in the art that is not limited to the specific features shown and described, and various modified and changed in form and details may be made without departing from the spirit and scope of this invention.