Circuit for controlling an acceleration, braking and steering system of a vehicle

Abstract

A circuit for controlling an acceleration, braking and steering system of a vehicle having at least two separate motors for actuating the acceleration and braking system, at least two separate motors for actuating the steering system and at least one electronic control unit for controlling the motors. The control unit comprises three identical CPUs and one programmable logic component. Each of the CPUs generates control signals for the motors depending on input control signals and sensor signals of the motors and forwards these control signals to the programmable logic component. The programmable logic component, depending on its programming, forwards the control signals of one of the CPUs to the motors.

Claims

1. A circuit for controlling acceleration, braking and steering of a vehicle having at least two separate motors for actuating an acceleration and braking system, at least two separate motors for actuating the steering system and at least one electronic control unit for controlling the at least two separate motors for actuating the acceleration and braking system and the at least two separate motors for actuating the steering system, the at least one control unit comprising three identical CPUs; and a programmable logic component; wherein each of the three identical computer processing units (CPUs) generates control signals for the at least two separate acceleration and braking system motors and at least two steering system motors depending on input control signals and on sensor signals of the at least two separate acceleration and braking system motors and the at least two steering system motors, forwards the generated control signals to each other of the three identical CPUs, compares the generated control signals received from the each other of the three identical CPUs with the generated control signals and, forwards the generated control signals and the CPU compare results to the programmable logic component; and wherein the programmable logic component is programmed to process the generated control signals and the CPU compare results generated by the three identical CPUs, select one of the three identical CPUs determined to be most trustworthy based on the processing and forwards the control signals of the selected CPU to the at least two separate acceleration and braking system motors and the at least two steering system motors thereby ensuring secured control of the acceleration and braking and the steering system.

2. The circuit according to claim 1, wherein the programmable logic component is a complex programmable logic device (CPLD).

3. The circuit according to claim 1, wherein the input control signals are generated by control elements of the acceleration and braking system and the steering system and by the position sensors of the at least two separate acceleration and braking system motors and the at least two steering system motors.

4. The circuit according to claim 3, wherein the control elements are one or more of joysticks, steering wheels, and pedals.

5. The circuit according to claim 1, wherein the sensor signals are generated by current measuring devices, temperature sensors on each of the at least two separate acceleration and braking system motors and the at least two steering system motors.

6. The circuit according to claim 1, wherein H-bridge circuits of the at least two separate acceleration and braking system motors and the at least two steering system motors are controlled by control signals forwarded by the logic component.

7. The circuit according to claim 1, wherein the at least two separate motors of the acceleration and braking system and the at least two separate motors of the steering system drive a common shaft, respectively.

8. A method for controlling an acceleration and braking system and, a steering system of a vehicle having at least two separate motors for actuating the acceleration and braking system, at least two separate motors for actuating the steering system, and at least one electronic control unit having three computer processing units (CPUs) and one programmable logic component, the method comprising the steps of: receiving, in the at least one electronic control unit, input signals from control elements in or on the vehicle for the acceleration and braking system and from position sensors on the at least two separate acceleration and braking system motors and on the at least two steering system motors; evaluating input control signals by each the three CPUs, generating by each of the three CPUs generated control signals for the at least two separate acceleration and braking system motors and the at least two steering system motors on the basis of the input control signals and sensor signals of the motors; each of the three CPUs forwarding the generated control signals to each other of the three CPUs and comparing the generated control signals received by the each other of the three CPUs with the generated control signals of the each of the three CPUs to generate CPU compare results; and the logic component processing the generated control signals and the CPU compare results of the three CPUs to one another and, depending on the logic component programming, determining one of the three CPUs to be most trustworthy and forwarding the generated control signals of the one of the three CPUs determined to be most trustworthy to the at least two separate acceleration and braking system motors and the at least two steering system motors thereby ensuring secured control of the acceleration and braking system and the steering system.

9. The method according to claim 8, wherein the logic component forwards the generated control signals of the one of the three CPUs because the logic component has determined that the one of the three CPUs, in the comparison of the generated control signals by the one of the CPUs with the control signals generated by the other of the three CPUs is most trustworthy.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Further features and advantages of the invention will become apparent from the description of embodiments that follows, with reference to the attached figures, wherein:

(2) FIG. 1 presents a circuit according to one embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

(3) The following is a detailed description of at least one example embodiment of the invention depicted in the accompanying drawing. The example embodiments are presented in such detail as to clearly communicate the invention and are designed to make such embodiments obvious to a person of ordinary skill in the art. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present invention, as defined by the appended claims.

(4) The invention is described in greater detail in the following by reference to a the circuit of FIG. 1, which shows a control unit 10 and motors 12, 13 for the braking and acceleration system, and motors 14, 15 for the steering of a non-illustrated vehicle.

(5) The control unit 10 comprises three CPUs, namely CPU1, CPU2, CPU3. The three CPUs, namely CPU1, CPU2, CPU3, are identically designed and perform identical tasks. Each of these CPUs receive, via a first input 16, three redundant input signals from non-illustrated control elements such as joysticks, steering wheels, or pedals for the steering and the braking and acceleration system of the vehicle and, via a second input 17, three redundant input signals of position sensors on the motors.

(6) Furthermore, the three CPUs, namely CPU1, CPU2, CPU3, receive further sensor signals from the motors 12, 13, 14 and 15 via lines 18, 19, 20, 21. These sensor signals contain information on the operating state of the motors and, on the current flow through the motors and the temperature thereof. On the basis of the input control signals 16, 17 and the sensor signals of the lines 18 to 21, the three CPUs, namely CPU1, CPU2, CPU3, each calculate output signals for the motors 12, 13, 14 and 15 and transmit these output signals via lines 22, 23, 24 to a programmable logic component 11. The programmable logic component 11 selects, depending on the programming thereof and, depending on the input signals it receives from the three CPUs (CPU1, CPU2, CPU3), one of the three CPUs and forwards the signals thereof to the four motors 12, 13, 14 and 15. The three CPUs (CPU1, CPU2, CPU3) are connected to one another via a line 25, which is shown as a dashed line.

(7) The signals received from the adjacent CPUs are compared to the signals of the receiving CPU. The result of the comparison is transmitted via the lines 22 to 24 to the logic component 11 and is taken into consideration in the selection of the CPU, the signals of which are forwarded to the motors 12 to 15. The logic component 11 is advantageously programmed such that a CPU selected at one time controls the motors 2, 13, 14 and 15 until the two adjacent CPUs deliver output signals that differ from those of the currently selected CPU. In this case, it is assumed that the previously selected CPU no longer functions properly and the logic component 11 selects a different CPU for the further control of the motors 12, 13, 14 and 15.

(8) As will be evident to persons skilled in the art, the foregoing detailed description and figures are presented as examples of the invention, and that variations are contemplated that do not depart from the fair scope of the teachings and descriptions set forth in this disclosure. The foregoing is not intended to limit what has been invented, except to the extent that the following claims so limit that.