Silicon carbide single crystal wafer and method of manufacturing a silicon carbide single crystal ingot
10202706 ยท 2019-02-12
Assignee
Inventors
- Masashi Nakabayashi (Yorii-Machi, JP)
- Kota Shimomura (Yorii-Machi, JP)
- Yukio Nagahata (Yorii-Machi, JP)
- Kiyoshi Kojima (Yorii-Machi, JP)
Cpc classification
C30B23/06
CHEMISTRY; METALLURGY
International classification
C30B23/00
CHEMISTRY; METALLURGY
H01L29/16
ELECTRICITY
Abstract
Provided is a SiC single crystal wafer, which is manufactured from a SiC single crystal ingot grown by the sublimation-recrystallization method, and which brings about high device performance and high device manufacture yield when used as a wafer for manufacturing a device. The SiC single crystal wafer has, in a surface thereof, a basal plane dislocation density of 1,000 dislocations per cm.sup.2 or less, a threading screw dislocation density of 500 dislocations per cm.sup.2 or less, and a Raman index of 0.2 or less. Further provided is a method of manufacturing a SiC single crystal ingot, including controlling heat input from a side surface of the single crystal ingot during growth of a single crystal, to thereby grow the crystal while changes in the temperature distribution of the single crystal ingot are reduced.
Claims
1. A silicon carbide single crystal wafer, which has a diameter of 100 mm or more, the silicon carbide single crystal wafer having, in a surface thereof, a basal plane dislocation (BPD) density of 500 dislocations per cm.sup.2 or less, a threading screw dislocation (TSD) density of 200 dislocations per cm.sup.2 or less, and a differential between a wavenumber of Raman scattered light measured at the center of the wafer and a wavenumber of Raman scattered light measured at a point located at 2 mm from a circumference of the wafer of 0.15 or less.
2. The silicon carbide single crystal wafer according to claim 1, wherein the differential between a wavenumber of Raman scattered light measured at the center of the wafer and the wavenumber of Raman scattered light measured at the point located at 2 mm from the circumference of the wafer is 0.1 or less.
3. The silicon carbide single crystal wafer according to claim 1, wherein the basal plane dislocation density in the surface is 300 dislocations per cm.sup.2 or less.
4. The silicon carbide single crystal wafer according to claim 3, wherein a sum of the basal plane dislocation density and the threading screw dislocation density in the surface is 300 dislocations per cm.sup.2 or less.
5. The silicon carbide single crystal wafer according to claim 1, wherein the basal plane dislocation density in the surface is 100 dislocations per cm.sup.2 or less.
6. The silicon carbide single crystal wafer according to claim 1, wherein the threading screw dislocation density is 100 dislocations per cm.sup.2 or less.
7. The silicon carbide single crystal wafer according to claim 1, wherein a sum of the basal plane dislocation density and the threading screw dislocation density in the surface is 500 dislocations per cm.sup.2 or less.
8. A silicon carbide single crystal wafer, which has a diameter of 100 mm or more, the silicon carbide single crystal wafer having, in a surface thereof, a basal plane dislocation (BPD) density of 100 dislocations per cm.sup.2 or less, a threading screw dislocation (TSD) density of 300 dislocations per cm.sup.2 or less, and a differential between a wavenumber of Raman scattered light measured at the center of the wafer and a wavenumber of Raman scattered light measured at a point located at 2 mm from a circumference of the wafer of 0.15 or less.
9. A silicon carbide single crystal wafer, which has a diameter of 100 mm or more, the silicon carbide single crystal wafer having, in a surface thereof, a basal plane dislocation (BPD) density of 300 dislocations per cm.sup.2 or less, a threading screw dislocation (TSD) density of 300 dislocations per cm.sup.2 or less, and a differential between a wavenumber of Raman scattered light measured at the center of the wafer and a wavenumber of Raman scattered light measured at a point located at 2 mm from a circumference of the wafer of 0.15 or less, wherein a sum of the basal plane dislocation density and the threading screw dislocation density in the surface is 300 dislocations per cm.sup.2 or less.
10. The silicon carbide single crystal wafer according to claim 8 or 9, wherein the threading screw dislocation density is 200 dislocations per cm.sup.2 or less.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
DESCRIPTION OF EMBODIMENTS
(9) The present invention is described in detail below.
(10) First, a SiC single crystal wafer in the present invention has a diameter of 100 mm or more is low in BPD density and TSD density, and is small in elastic strain, which makes the manufacture of a high-performance device possible and, even in the industrial-scale manufacturing of a device, guarantees high yield. The BPD density of a SiC single crystal wafer of the present invention is 1,000 dislocations per cm.sup.2 or less when the wafer diameter is 150 mm or more, and 500 dislocations per cm.sup.2 or less when the wafer diameter is 100 mm or more. The TSD density of a SiC single crystal wafer in the present invention is 500 dislocations per cm.sup.2 or less when the wafer diameter is 150 mm or more, and 300 dislocations per cm.sup.2 or less when the wafer diameter is 100 mm or more.
(11) There are several methods of evaluating elastic strain, including, for example, precise measurement of the lattice constant with the use of an X-ray. However, the measurement methods that have been used express elastic strain in vector, which leads to problems such as requiring a sophisticated analysis technology to evaluate the degree of impact on a device, and requiring time and skill for the measurement itself. This has prompted the inventors of the present invention to develop an optimum method of evaluating elastic strain that affects the yield of a device. It has been found as a result that, because of being (1) an evaluation index independent of wafer size, (2) capable of expressing elastic strain that is a vector in scalar that is simpler, and (3) short in measurement time, evaluating a differential between a value that is measured in the center of a wafer and a value that is measured in the perimeter of the wafer with respect to an inverse number of a wavelength at a Raman scattered light peak of SiC (namely, a Raman index) is most effective as the method of evaluating elastic strain. This method is therefore employed as an elastic strain evaluation method in the present invention.
(12) A light source used in the present invention for Raman measurement is a green laser having a wavelength of 532 nm. The laser irradiated a spot 2 m in diameter on a surface of a SiC single crystal wafer that was a sample. The measurement light irradiated eight rows by nine columns, seventy-two points in total, per measurement site at a spot interval of 10 m, and an average value thereof was recorded as scattered light data in the measurement site. Each wafer has a measurement site the center of which is the center of the wafer, and a measurement site the center of which is a point located at 2 mm from the edge (circumference) of the wafer (a point that faces the wafer center at 2 mm from the wafer edge). The wavelength of Raman scattered light was measured at these two measurement sites. A differential between the wavenumbers (inverse numbers of the wavelengths) (value at the centervalue at 2 mm from circumference) is used as a Raman index.
(13)
(14) A wafer that is lower in BPD density than the value given above brings about even higher device performance and yield. It is therefore desirable for a wafer 150 mm or more in diameter to have 500 BPDs per cm.sup.2 or less, and, at any wafer diameter, the BPD density is desirably 300 dislocations per cm.sup.2 or less, more desirably 100 dislocations per cm.sup.2 or less. The same applies to TSD density: a wafer 150 mm or more in diameter desirably has the TSD density of 300 dislocations per cm.sup.2 or less, and, at any wafer diameter, the TSD density is desirably 200 dislocations per cm.sup.2 or less, more desirably 100 dislocations per cm.sup.2 or less. When BPDs and TSDs are both reduced to a density lower than 100 dislocations per cm.sup.2, the adverse effect on a device is estimated to be substantially zero.
(15) As described above, different regulations are set for wafers having a diameter of 150 mm or more and wafers having a diameter of 100 mm or more. This is because wafers having a diameter of 150 mm or more are often used in the manufacture of a mass-produced, inexpensive device, whereas wafers having a diameter of 100 or more is used in the manufacture of a high-performance device and is accordingly required to have higher quality. BPD and TSD both hinder the practical application of a device as described above. A marked improvement in device performance and yield is therefore expected when the combined density of BPDs and TSDs is 1,000 dislocations per cm.sup.2 or less. The sum of BPDs and TSDs are desirably 500 dislocations per cm.sup.2 or less, more desirably 300 dislocations per cm.sup.2 or less. Wafers having a diameter of 100 mm or more are defined as SiC single crystal wafers having a diameter of 100 mm or more and 300 mm or less in view of existing products and the like, and include, for example, what are called 100-mm wafers and 125-mm wafers. Similarly, wafers having a diameter of 150 mm or more are defined as SiC single crystal wafers having a diameter of 150 mm or more and 300 mm or less, and include what are called 150-mm wafers. A larger wafer diameter is preferred from the viewpoint of device productivity, and there is no upper limit to wafer diameter in that sense. With the current technology, however, the temperature difference within a crystal that is undergoing sublimation and recrystallization becomes excessively large when the wafer diameter exceeds 300 mm, and the difference in physical property throughout the wafer becomes prominent as well. In other words, a larger wafer diameter equals a higher internal stress, which is likely to make obtaining a high-quality wafer difficult, and a practical upper limit to wafer diameter is accordingly 300 mm.
(16) In the manufacture of a SiC single crystal wafer as the one described above, a manufacturing method that has been the mainstream in the past is to grow a SiC single crystal ingot in an environment where as small a temperature gradient as possible is set so that stress on a growth surface is reduced. However, a temperature gradient set in a growth space is indispensable for the stable growth of a SiC single crystal ingot by the sublimation-recrystallization method as described above, and reducing the temperature gradient blindly has an adverse effect on the success rate and growth speed of single-polytype growth, which lowers productivity, and is disadvantageous industrially. From the industrial viewpoint, an ingot needs to be about 30 mm or more in height.
(17) The inventors of the present invention have conducted research and development for years on a manufacturing method for obtaining a SiC single crystal wafer that is low in BPD and TSD, furthermore low in elastic strain in industrial-scale production. It has been found as a result that, surprisingly, the internal stress of a SiC single crystal ingot, which ultimately turns into dislocations and elastic strain in a wafer, is generated on a growth surface at the time of growth and also increases drastically by a change in the temperature distribution of the crystal after growth. This phenomenon is described in detail below.
(18) In a SiC single crystal ingot at one point in time during growth, internal stress is generated by the temperature distribution at that point, and part of the internal stress is already transformed into dislocations. If the growth is completed while the temperature distribution at that point is maintained, a SiC single crystal wafer manufactured has a dislocation density and elastic strain that reflect this temperature distribution. Under actual manufacturing conditions, however, the temperature distribution changes for several reasons with the growth of the crystal, and new stress is consequently generated in the SiC single crystal ingot. The newly generated stress increases BPDs without fail. The atomic arrangement on the growth surface changes a well, thereby causing TSD. The elastic strain of the wafer also increases, and the manufacturing of a quality device is made difficult as a result. If the temperature distribution changes so as to reduce the temperature gradient, the change may reduce the elastic strain of an ultimately manufactured wafer. In that case still, however, dislocation is generated due to new stress applied by the application of a temperature field that is not balanced in terms of stress to the ingot that has been balanced in terms of stress under the original temperature distribution, and a wafer that is low in dislocation density and elastic strain both therefore cannot be manufactured.
(19) The inventors of the present invention have accordingly thought of controlling heat input from a side surface of a single crystal ingot during the growth of the single crystal and thus reducing changes in the temperature distribution of the ingot during crystal growth, which may then keep BPDs and TSDs from increasing during growth and reduce elastic strain as well. However, actually measuring crystal temperature is impossible in an actual growth of a SiC single crystal. The inventors of the present invention have used the finite element method to analyze the temperature and internal stress in the single crystal ingot and a crucible, and have further performed multitudes of quality evaluations on actually grown crystals. The inventors of the present invention have found as a result a method of realizing the above idea, and successfully developed the SiC single crystal wafer of the present invention.
(20) First, one of causes of a change in temperature distribution is a fluctuation in heat input from a side surface of a single crystal ingot due to deterioration in the characteristics of a heat insulating material that is disposed on the outside of a crucible in which the crystal is grown. A heat insulating material that is often used in the manufacture of a SiC single crystal by the sublimation-recrystallization method is graphite felt or a preformed heat insulating material made of graphite. Manufacturing conditions of these heat insulating materials include setting the treatment temperature to 1,000 C. or less in the case of the most common heat treatment, and setting the treatment temperature to 2,000 C. in the case of a high-temperature treatment product. The temperature in a crucible for a SiC single crystal is, at maximum, 2,400 C. or higher, which is over the treatment temperature of the heat insulating materials described above, and accordingly causes a reaction such as graphitization of the heat insulating material during crystal growth, thereby deteriorating the heat insulating characteristics. In addition, a sublimation gas component leaking from inside the crucible reacts with the heat insulating material in a thermochemical reaction, to thereby deteriorate the graphite material and degrade heat insulating properties. The deterioration of the heat insulating material is accompanied by a rise in an electric current that is input to a coil, owing to temperature feedback in apparatus control in the actual manufacture of a SiC single crystal ingot (because it is determined that the crucible temperature has dropped by the deterioration of the heat insulating characteristics). Then, while the temperature drops in a part of the crucible where the heat insulating material has deteriorated, the temperature may rise in a part of the crucible where the deterioration is light. The change in temperature gradient that is experienced by the single crystal ingot is therefore not uniform. In any case, a change in the temperature distribution of a single crystal ingot undoubtedly generates a new internal stress.
(21) Performing heat treatment on the heat insulating material at a temperature of 2,250 C. or more, desirably 2,450 C. or more, prior to crystal growth prevents the exposure to high temperature during growth from changing the material characteristics and reduces the reactivity with the sublimation gas component as well. Although the mechanism of the reduction in reactivity with sublimation gas is unclear, it is deduced that the high degree of graphitization of graphite fiber and others are effective for the reduction. The heat treatment of the heat insulating material can be performed by a method in which one lot of raw heat insulating material is treated at once in an inert atmosphere, a method in which heat treatment uses an induction furnace for crystal growth with a heat insulating member that has been processed and assembled for growth attached to the crucible, or the like, and is not limited to a particular method. The treatment temperature has no particular upper limit but, considering that a ultra-high temperature environment causes graphite itself to sublime and is disadvantageous in terms of cost, a temperature around 3,000 C. is an appropriate upper limit.
(22) Another major cause of a change in the temperature distribution of an ingot during crystal growth is a change in the amount of heat that passes through a graphite member forming the crucible from the raw material side where the temperature is high to the SiC single crystal side where the temperature is low, and subsequently enters a side surface of the ingot. Generally speaking, the crucible temperature is not constant and changes in the growth of a SiC single crystal. The change may be an active temperature adjustment for controlling the growth speed, or may be a passive fluctuation due to a change to the crucible interior state that accompanies growth. In any case, the temperature change is unavoidable. This temperature change is accompanied by a change in the amount of heat that enters the side surface of the ingot, with the result that the temperature distribution in the ingot changes. Even if the temperature is kept constant, the amount of heat that enters from the side surface of the single crystal ingot still changes because the side surface of the ingot increases in area as the SiC single crystal grows, and the temperature distribution in the ingot changes accordingly.
(23) This temperature change can be reduced effectively by reducing a thermal flux from the crucible to the ingot and from the ingot to a seed crystal attaching region of a crucible lid to which a seed crystal is attached. The thermal flux is reduced by setting, along the perimeter of the seed crystal attaching region, a member higher in heat conductivity than a member that forms the seed crystal attaching region (hereinafter referred to as thermal flux control member), and increasing a thermal flux that flows from the crucible to the thermal flux control member. The effect is obtained by setting, as the heat conductivity of each member, the room temperature heat conductivity of the member that forms the seed crystal attaching region (which is denoted by .sub.1) and the room temperature heat conductivity of the thermal flux control member (which is denoted by .sub.2) so as to satisfy a relation 1.1.sub.1.sub.2. A more desirable condition is that the room temperature heat conductivity .sub.1 and the room temperature heat conductivity .sub.2 satisfy a relation 1.2.sub.1.sub.2. No particular upper limit is set to the value of .sub.2. However, a value of the room temperature heat conductivity .sub.2 that makes the ratio of .sub.2 to .sub.1 exceed 1.8 causes a great change in temperature distribution on the growth surface as well, which hinders stable growth, and therefore is undesirable. In order to control the heat input from the side surface of the ingot and reduce changes in the temperature distribution of the ingot during crystal growth, it is more effective to dispose the thermal flux control member outside the seed crystal attaching region to which the seed crystal is attached. However, the thermal flux control member may be disposed so as to partially overlap with the seed crystal attaching region around the perimeter of the seed crystal attaching region, as long as heat input to the side surface of the ingot can be controlled by increasing the thermal flux that flows from the crucible to the thermal flux control member.
(24) Another method of reducing changes in ingot temperature is to increase the amount of heat that is diffused into the atmosphere from a crucible for crystal growth by improving the heat conductivity of an atmosphere gas in a peripheral space, which surrounds the crucible set in a double-walled quartz tube or the like. Hydrogen, which is generally known as a gas component that is high in heat conductivity, has adverse effects such as unintended etching of graphite and SiC, and is therefore undesirable. A gas type that is optimum in this case is helium, and the intended effect is obtained when the atmosphere contains 10 vol % of helium or more. A greater effect is obtained when the atmosphere contains 20 vol % of helium or more. The upper limit of helium is determined naturally in relation to cost and an electrical conductivity that is required of the wafer (i.e., the dopant concentration in the atmosphere). However, helium gas contained in a concentration of 50 vol % or more causes a great change in temperature distribution on the growth surface as well, which hinders stable growth, and therefore is undesirable.
EXAMPLES
(25) A concrete description of the present invention is given below based on Examples and Comparative Examples.
(26)
Example 1
(27) First, a crucible in which no raw material and no seed crystal were loaded and a set of pieces of commercially available graphite felt that had been treated by heat treatment at 2,000 C. were prepared. Another round of heat treatment was performed on the graphite felt prior to crystal growth. Thereafter, the crucible and the heat insulating material were assembled the same way as in crystal growth and installed in the Quartz tube in the manner described above as preparation for crystal growth, and the quartz tube was evacuated. The highly pure Ar gas was subsequently caused to flow into the Quartz tube via the pipe under control of the mass flow controller, a high-frequency current was caused to flow in the work coil while maintaining the pressure in the quartz tube at 80 kPa, the temperatures in the lower part of the graphite crucible and the upper part of the graphite crucible were raised to their respective target temperatures, and this state was maintained for twelve hours. Thus, heat treatment was completed. The heat treatment of the graphite felt in Example 1 was conducted at a temperature of 2,300 C. in a highly pure argon atmosphere for twelve hours.
(28) The crystal growth of Example 1, which has been performed with the use of the above crucible and felt, is described next. Used as the seed crystal 1 is a SiC single crystal wafer having a diameter of 101 mm and made of a single polytype, specifically, 4H. The principal surface of the wafer is a (0001) plane and the <0001> axis of the wafer is tilted by 4 in the <11-20> direction. The growth pressure is 1.33 kPa, and the partial pressure of nitrogen gas is 180 Pa to 90 Pa. The partial pressure of nitrogen was varied in order to maintain an optimum conductivity of the overall ingot. Compared to common graphite felt, felt that is subjected to high-temperature heat treatment as the one in this Example deteriorates less and reduces fluctuations in heat input from a side surface of the single crystal ingot, thereby making the manufacture of a SiC single crystal wafer that is low in dislocation density and elastic strain possible.
(29) The thus obtained SiC single crystal ingot was 106.8 mm in diameter and 34.8 mm in height. A SiC single crystal ingot for manufacturing a 100 mm-diameter wafer according to Example 1 was manufactured in this manner.
(30) The obtained ingot was machined by a known machining technology into eight mirror-finished wafers having a (0001) plane with the off angle set to 4 similarly to the seed crystal and having a thickness of 0.4 mm, and the wafers were evaluated for quality. The wafers are assigned wafer numbers 11 to 18 starting from the seed crystal side. The relative positions of the wafers No. 11 to No. 18 relative to the ingot height take values between 0.2 to 0.9 at intervals of 0.1. In other words, a relative position 0 corresponds to the seed crystal surface and a relative position 1.0 corresponds to the ingot height.
(31) Raman shifts of the eight manufactured wafers were measured first by the method described above with the use of a Raman spectrometer (NRS-7100, a product of JASCO Corporation having a resolution of 0.05 cm.sup.1). Thereafter, molten KOH etching was performed to measure BPD density and TSD density with an optical microscope. Here, a method described in Takahashi, J., et al., Journal of Crystal Growth, 135, (1994), pp. 61-70 was followed to immerse a sample in molten KOH at 530 C. for 10 minutes, and dislocation defects were sorted by etch pit shape, with a shell-shaped pit classified as a BPD and a hexagonal pit of a middle to large size classified as a TSD. An example of etch pit observation is shown in
(32) Results of the evaluation are shown in Table 1. In the wafer No. 18, the BPD density is 500 dislocations per cm.sup.2 or less, and the combined density of BPDs and TSDs is less than 1,000 dislocations per cm.sup.2 as well. The characteristics of this wafer are thus within the scope of the present invention.
(33) TABLE-US-00001 TABLE 1 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 11 0.20 2,450 360 2,810 12 0.18 1,250 330 1,580 13 0.17 980 290 1,270 14 0.15 890 280 1,170 15 0.13 870 270 1,140 16 0.11 800 260 1,060 17 0.09 710 260 970 18 0.07 490 250 740
Example 2
(34) Example 2 is described next. In Example 2, a set of pieces of commercially available graphite felt that had been treated by heat treatment at 2,000 C. was prepared as in Example 1, and another round of heat treatment was performed on the graphite felt prior to crystal growth. The heat treatment of the graphite felt in Example 2 is the same as the one in Example 1, except that the heat treatment temperature is set to 2,500 C.
(35) A crystal growing method of Example 2 which uses the crucible and felt described above is the same as the method in Example 1. Example 2, where the manufacturing of a SiC single crystal wafer that is low in dislocation density and low in elastic strain is made possible from the same reasons that are given in Example 1, is particularly effective for the reduction of BPDs because the use of the graphite felt treated at a higher temperature prevents heat insulating material deterioration from reducing the in-plane temperature gradient excessively.
(36) A SiC single crystal ingot for manufacturing a 100 mm-diameter wafer was manufactured in this manner to have a diameter of 105.7 mm and a height of 37.9 mm.
(37) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 21 to 28 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 2. The wafers No. 27 and No. 28 have a quality that is within the scope of the present invention in terms of BPD density and the combined density of BPDs and TSDs as well.
(38) TABLE-US-00002 TABLE 2 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 21 0.22 2,540 360 2,900 22 0.21 1,280 300 1,580 23 0.19 980 280 1,260 24 0.17 840 260 1,100 25 0.15 740 240 980 26 0.12 660 240 900 27 0.10 480 240 720 28 0.08 470 240 710
Example 3
(39) A crystal manufacturing method of Example 3 is described next. In Example 3, a graphite crucible 24 that is structured as illustrated in a schematic diagram of
(40) In Example 3, a crucible that includes the thermal flux control member 27 described above is used and the heat insulating material is treated by the same heat treatment method as the one in Example 1. The thus obtained SiC single crystal ingot was 105.5 mm in diameter and 37.8 mm in height.
(41) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 31 to 38 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 3. The wafers No. 33 to No. 38 have characteristics that are within the scope of the present invention. The wafers No. 34 to No. 38, in particular, have a combined density of BPDs and TSDs that is lower than 500 dislocations per cm.sup.2, and are very favorable.
(42) TABLE-US-00003 TABLE 3 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 31 0.18 2,600 280 2,880 32 0.15 990 190 1,180 33 0.12 360 160 520 34 0.09 300 160 460 35 0.06 280 160 440 36 0.04 280 150 430 37 0.03 270 140 410 38 0.02 270 130 400
Example 4
(43) A crystal manufacturing method of Example 4 is described next. In Example 4, a graphite crucible 24 that is structured as illustrated in a schematic diagram of
(44) In Example 4, a crucible designed for the same purpose as the one described in Example 3 was used and the heat insulating material was treated by the same heat treatment method as the method of Example 2. These reduce fluctuations in heat input from the side surface of the single crystal ingot more effectively, and make it possible to manufacture a SiC single crystal wafer that is even lower in dislocation density and elastic strain than in Examples described above. The thus obtained SiC single crystal ingot was 105.7 mm in diameter and 39.6 mm in height.
(45) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 41 to 48 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 4. The wafers all have characteristics that are within the scope of the present invention. The wafers No. 44 to No. 48, in particular, have a combined density of BPDs and TSDs that is lower than 300 dislocations per cm.sup.2, and are extremely favorable.
(46) TABLE-US-00004 TABLE 4 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 41 0.14 450 280 730 42 0.12 330 160 490 43 0.09 250 140 390 44 0.07 110 140 250 45 0.05 90 140 230 46 0.03 80 130 210 47 0.01 80 120 200 48 0.00 80 110 190
Example 5
(47) Example 5 is described next. A wafer having a diameter of 150 mm was manufactured in Example 5. Crystal manufacturing in Example 5 uses a crucible and a heat insulating material that are sized to an ingot for a 150 mm-diameter wafer. The basic structure of the crucible and the heat insulating material, however, is as illustrated in
(48) The seed crystal used in Example 5 is a SiC single crystal wafer having a diameter of 154 mm and made of a single polytype, specifically, 4H. The principal surface of the wafer is a (0001) plane and the <0001> axis of the wafer is tilted by 4 in the <11-20> direction. A single crystal ingot was manufactured under substantially the same crystal growth conditions as those in Example 1, except the size of the seed crystal and the crucible structure, which included the thermal flux control member 27.
(49) While Example 5 is an example of manufacturing a single crystal ingot that is for manufacturing a 150 mm-diameter wafer, the idea on how to manufacture the ingot in Example 5 is basically the same as in Example 4, and a SiC single crystal wafer that is low in dislocation density and low in elastic strain can be manufactured also from an ingot having a different diameter. A SiC single crystal ingot of Example 5 for manufacturing a 150 mm-diameter wafer was manufactured in this manner. The thus obtained SiC single crystal ingot was 158.1 mm in diameter and 42.6 mm in height.
(50) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 51 to 58 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 5. The wafers all have characteristics that are within the scope of the present invention. The wafers No. 55 to No. 58, in particular, have a combined density of BPDs and TSDs that is lower than 300 dislocations per cm.sup.2, and are extremely favorable.
(51) Homogeneous epitaxial growth was performed on a Si plane of the wafer No. 58. Conditions for the epitaxial growth include setting the growth temperature to 1,550 C., setting the silane (SiH.sub.4) flow rate, the propane (C.sub.3H.sub.8) flow rate, and the hydrogen (H.sub.2) flow rate to 32 cc/min, 21 cc/min, and 150 L/min, respectively, and setting the flow rate of nitrogen gas to a rate that makes the carrier concentration in an active layer 110.sup.16 cm.sup.3. The active layer was grown to a thickness of approximately 5 m. The resultant epitaxial film was found to have a surface extraordinarily flat throughout and have very few epitaxial defects such as carrot defects. In short, a favorable epitaxial thin film was formed. A MOSFET structure was built on this epitaxial wafer, and the withstand voltage of its gate insulating film was measured to be approximately 820 V.
(52) TABLE-US-00005 TABLE 5 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 51 0.13 460 360 820 52 0.11 330 230 560 53 0.09 240 210 450 54 0.07 130 190 320 55 0.06 120 180 300 56 0.05 110 170 280 57 0.04 110 160 270 58 0.03 100 160 260
Example 6
(53) A crystal manufacturing method of Example 6 is described next. In Example 6, a graphite crucible 24 that is structured as illustrated in a schematic diagram of
(54) Crystal growth conditions in Example 6 are the same as those in Example 1, except that, in Example 6, He gas is mixed in an atmosphere gas in the peripheral space surrounding the graphite crucible, which is installed in the double-walled quartz tube 8. The He gas content ratio is 16 vol %. The crucible used in Example 6 is designed for the same purpose as the one described in Example 4. The graphite felt used in Example 6 is treated by the same heat treatment conditions as those in Example 4. Example 6 also aims for a further reduction in temperature gradient by giving the atmosphere gas high heat conductivity. The thus obtained SiC single crystal ingot was 108.7 mm in diameter and 56.3 mm in height.
(55) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 61 to 68 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 6. The wafers No. 63 to No. 68 have characteristics that are within the scope of the present invention in both a BPD density and a combined density of BPDs and TSDs. The wafers No. 66 to No. 68, in particular, have a combined density of BPDs and TSDs that is lower than 500 dislocations per cm.sup.2, and are extremely favorable. Although the dislocation density was slightly higher compared to Example 4, a wafer very small in elastic strain was successfully manufactured as indicated by the Raman index. It is likely that a SiC single crystal wafer that is even lower in dislocation density and elastic strain can be manufactured by optimizing the crucible structure, the gas composition, and crystal growth conditions in a comprehensive manner.
(56) TABLE-US-00006 TABLE 6 Sum of BPD density Wafer Raman BPD density TSD density and TSD number index dislocations/cm.sup.2 dislocations/cm.sup.2 density 61 0.15 1,260 270 1,530 62 0.13 680 190 1,170 63 0.09 490 150 640 64 0.06 430 150 580 65 0.03 400 130 530 66 0.01 340 120 460 67 0.00 300 120 420 68 0.02 280 110 390
Comparative Example 1
(57) Comparative Example 1 is described next. In Comparative Example 1, a crystal was grown by using a set of pieces of commercially available graphite felt that had been treated by heat treatment at 2,000 C. The crucible structure is the same as the one in Example 1. The crystal growth method in Comparative Example is substantially the same as the method in Example 1. In Comparative Example 1, common graphite felt and a common graphite crucible are used, and fluctuations in heat input from the side surface of the single crystal ingot are therefore not reduced, which means that a SiC single crystal wafer that is low in dislocation density and elastic strain cannot be manufactured. The thus obtained SiC single crystal ingot was 107.4 mm in diameter and 35.2 mm in height.
(58) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 71 to 78 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 7. The properties of the wafers are examined for each evaluation item. The Raman index of every wafer except the wafer No. 71 takes a value that is within the scope of the present invention. The dislocation density, on the other hand, is high in every wafer, and the BPD density is particularly high. Consequently, none of the obtained wafers have characteristics that are within the scope of the present invention.
(59) Homogeneous epitaxial growth was performed on a Si plane of the wafer No. 78 under the same conditions as those in Example 6 to grow an active layer having a thickness of approximately 5 m. In a surface of the resultant epitaxial film, disorder in surface morphology such as bunching was observed and many epitaxial defects such as carrot defects were found. A MOSFET structure was built on this epitaxial wafer, and the withstand voltage of its gate insulating film was measured to be approximately 270 V.
(60) TABLE-US-00007 TABLE 7 Sum of BPD Wafer Raman BPD density TSD density density and number index dislocations/cm.sup.2 dislocations/cm.sup.2 TSD density 71 0.22 10,440 370 10,810 72 0.18 8,650 380 9,030 73 0.15 7,390 370 7,760 74 0.11 5,990 370 6,360 75 0.07 4,820 360 5,180 76 0.04 4,110 360 4,470 77 0.02 3,690 350 4,040 78 0.01 3,560 340 3,900
Comparative Example 2
(61) Comparative Example 2 is described next. In Comparative Example 2, a crystal was grown by using a set of pieces of commercially available graphite felt that had been treated by heat treatment at 2,000 C. The crucible structure is substantially the same as the one in Example 1. In Comparative Example 2, substantially the same preparation as in Example 1 was made for crystal growth, and the obtained SiC single crystal ingot was 103.1 mm in diameter and 16.5 mm in height. Similarly to Comparative Example 1, Comparative Example 2 uses common graphite felt and a common graphite crucible, and therefore is not reduced in fluctuations in heat input from the side surface of the single crystal ingot. SiC single crystal wafers manufactured from the obtained ingot may manage to partially accomplish one of low dislocation density and low elastic strain owing to a difference in growth condition, but cannot accomplish low dislocation density and low elastic strain both.
(62) The obtained ingot was not tall enough to manufacture wafers that would have been No. 81 and No. 88. The ingot was therefore machined into six mirror-finished wafers having relative positions No. 82 to No. 87, and the wafers were evaluated for quality. Results of the evaluation are shown in Table 8. The wafers No. 84 to No. 87 in Table 8 have a basal plane dislocation density that is within the scope of the present invention. However, the Raman index is high in every wafer, meaning that none of the obtained wafers have characteristics that are within the scope of the present invention.
(63) Homogeneous epitaxial growth was performed on a Si plane of the wafer No. 87 under the same conditions as those in Example 6 to grow an active layer having a thickness of approximately 5 m. The count of epitaxial defects such as carrot defects in a surface of the resultant epitaxial film is considerably lower compared to the wafer No. 78 of Comparative Example 1, though higher than in the wafer No. 58 of Example 5. However, a high density of disorder in surface morphology such as bunching was observed. The cause thereof is probably disorder in the state of surface steps of the wafer due to elastic strain. A MOSFET structure was built on this epitaxial wafer, and the withstand voltage of its gate insulating film was measured to be approximately 340 V.
(64) TABLE-US-00008 TABLE 8 Sum of BPD Wafer Raman BPD density TSD density density and number index dislocations/cm.sup.2 dislocations/cm.sup.2 TSD density 81 82 0.25 1,990 350 2,340 83 0.23 1,440 360 1,800 84 0.22 990 350 1,340 85 0.21 980 340 1,320 86 0.21 760 340 1,100 87 0.20 660 320 980 88
Comparative Example 3
(65) Comparative Example 3 is described next. In Comparative Example 3, a set of pieces of commercially available graphite felt that had been treated by heat treatment at 2,000 C. was used to manufacture a wafer having a diameter of 150 mm. A crucible and heat insulating material used to grow an ingot for a 150 mm-diameter wafer have a structure similar to that of the crucible and heat insulating material used in Example 1, and are sized to the ingot for a 150 mm-diameter wafer. The crystal growth method in Comparative Example 3 is substantially the same as the method in Example 1. In Comparative Example 3, common graphite felt and a common graphite crucible are used, and fluctuations in heat input from the side surface of the single crystal ingot are therefore not reduced, which means that a SiC single crystal wafer that is low in dislocation density and elastic strain cannot be manufactured. The thus obtained SiC single crystal ingot was 158.5 mm in diameter and 33.2 mm in height.
(66) The obtained ingot was machined into eight mirror-finished wafers having the same relative positions in the ingot as in Example 1 (the wafers were assigned wafer numbers 91 to 98 starting from the seed crystal side). The wafers were evaluated for quality. Results of the evaluation are shown in Table 9. The properties of the wafers are examined for each evaluation item. TSD in the wafers has a value that is within the scope of the present invention. However, BPD is high in every wafer and the Raman index is also high in most of the wafers. Consequently, none of the obtained wafers have characteristics that are within the scope of the present invention.
(67) TABLE-US-00009 TABLE 9 Sum of BPD Wafer Raman BPD density TSD density density and number index dislocations/cm.sup.2 dislocations/cm.sup.2 TSD density 91 0.26 12,790 480 13,270 92 0.26 11,650 440 12,090 93 0.25 9,470 420 9,890 94 0.24 8,280 390 8,670 95 0.23 6,470 370 6,840 96 0.22 5,320 350 5,670 97 0.21 4,990 340 5,330 98 0.20 4,740 350 5,090
REFERENCE SIGNS LIST
(68) 1: seed crystal (SiC single crystal) 2: SiC single crystal ingot 3: sublimation raw material (SiC powder raw material) 4: graphite crucible 5: heat insulating material 6: graphite lid (crucible lid) 7: graphite support seat (crucible support seat and shaft) 8: double-walled quartz tube 9: work coil 10: pipe 11: mass flow controller 12: vacuum pump apparatus and pressure control apparatus 13a: radiation thermometer (for upper part of crucible) 13b: radiation thermometer (for lower part of crucible) 21: seed crystal (SiC single crystal) 22: SiC single crystal ingot 23: sublimation raw material (SiC powder raw material) 24: graphite crucible 25: heat insulating material 26: graphite lid (crucible lid) 27: thermal flux control member