Active gate driver
11515815 · 2022-11-29
Assignee
Inventors
Cpc classification
H03K2217/0072
ELECTRICITY
International classification
H03K3/00
ELECTRICITY
H03K5/00
ELECTRICITY
H03K17/10
ELECTRICITY
Abstract
An active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver includes a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.
Claims
1. An active gate driver comprising: a pull up branch; a pull down branch; a first connection between a first input of the active gate driver and an output of the pull up branch and the pull down branch; and a second connection between a second input of the active gate driver and the output of the pull up branch and the pull down branch, wherein a current and voltage feedback is performed via the first connection and the second connection, the feedback being performed from an output of the active gate driver to the first input and the second input of the active gate driver.
2. The active gate driver according to claim 1 wherein the active gate driver further comprises biasing circuitry configured to activate the pull up branch in response to a positive voltage signal and the pull down branch in response to a negative voltage signal.
3. The active gate driver according to claim 1 wherein the pull up branch comprises a transistor at an output of the pull up branch and the pull down branch comprises a transistor at an output of the pull down branch, wherein the transistor of the pull up branch and the transistor of the pull down branch are configured to be connected in series between a first and a second supply voltage and wherein the output of the active gate driver is configured to be connected to a node between the transistor of the pull up branch and the transistor of the pull down branch.
4. The active gate driver according to claim 1 wherein the active gate driver further comprises an operational amplifier comprising the first input and the second input, wherein the voltage feedback is from the output of the active gate driver to the first input and the second input, and the output of the active gate driver is configured to be connected to a node between the output of the pull up branch and the output of the pull down branch.
5. The active gate driver according to claim 1 wherein the active gate driver further comprises an operational amplifier comprising the first input and the second input, and the active gate driver further comprises current sensing circuitry configured to sense a current provided at an output of the pull up branch and a current provided at an output of the pull down branch and configured to feed a sensed current back to the first input and the second input.
6. The active gate driver according to claim 1 wherein the current and voltage feedback is adaptive or controlled in real time.
7. The active gate driver according to claim 1 wherein the output of the active gate driver is current limited.
8. The active gate driver according to claim 1 wherein at least one of the pull up branch and the pull down branch comprises a current mirror.
9. An electric motor control system, comprising: an active gate driver comprising: a pull up branch; and a pull down branch, wherein a current and voltage feedback is performed from an output of the active gate driver to at least one input of the active gate driver, wherein a path of the current and voltage feedback is connected, directly or indirectly, to circuit elements of the pull up branch and the pull down branch; and a controller, wherein the electric motor control system is configured to perform a current feedback from an output of an electronic switch of the electric motor to an input of the controller and the controller is configured to output a control signal to the input of the active gate driver.
10. An electric motor control system, comprising: an active gate driver comprising: a pull up branch; a pull down branch; a first connection between a first input of the active gate driver and an output of the pull up branch and the pull down branch; a second connection between a second input of the active gate driver and the output of the pull up branch and the pull down branch; and a controller, wherein the electric motor control system comprises current feedback circuitry to perform feedback from an output of an electronic switch of the electric motor to an input of the controller and the controller is configured to output a control signal to the first input and the second input of the active gate driver, a current and voltage feedback is performed via the first connection and the second connection, the feedback being performed from an output of the active gate driver to the first input of the active gate driver and the second input of the active gate driver, and a path of the current and voltage feedback is connected, directly or indirectly, to circuit elements of the pull up branch and the pull down branch.
11. The electric motor control system according to claim 10 wherein the active gate driver further comprises biasing circuitry configured to activate the pull up branch in response to a positive voltage signal and the pull down branch in response to a negative voltage signal.
12. The electric motor control system according to claim 10 wherein the pull up branch comprises a transistor at an output of the pull up branch and the pull down branch comprises a transistor at an output of the pull down branch, wherein the transistor of the pull up branch and the transistor of the pull down branch are configured to be connected in series between a first and a second supply voltage and wherein the output of the active gate driver is configured to be connected to a node between the transistor of the pull up branch and the transistor of the pull down branch.
13. The electric motor control system according to claim 10 wherein the active gate driver further comprises an operational amplifier comprising the first input and the second input, wherein the current and voltage feedback is from the output of the active gate driver to the first input and the second input, and the output of the active gate driver is configured to be connected to a node between the output of the pull up branch and the output of the pull down branch.
14. The electric motor control system according to claim 10 wherein the active gate driver further comprises an operational amplifier comprising the first input and the second input, and the active gate driver further comprises current sensing circuitry configured to sense a current provided at an output of the pull up branch and a current provided at an output of the pull down branch and configured to feed a sensed current back to the first input and the second input.
15. The electric motor control system according to claim 10 wherein the current and voltage feedback is adaptive or controlled in real time.
16. The electric motor control system according to claim 10 wherein the output of the active gate driver is current limited.
17. The electric motor control system according to claim 10 wherein at least one of the pull up branch or the pull down branch comprises a current mirror.
Description
(1) Arrangements of the embodiments will be understood and appreciated more fully from the following detailed description, made by way of example only and taken in conjunction with drawings in which:
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
DETAILED DESCRIPTION
(14) According to an embodiment there is provided an active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver comprises a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.
(15) The electronic switch can be configured to control a current flow in a motor winding based on a signal.
(16) In an embodiment at least one of the current feedback and the voltage feedback is a closed loop feedback.
(17) In an embodiment the active gate driver further comprises a biasing circuitry for activating the pull up branch in response to a positive voltage signal and the pull down branch in response to a negative voltage signal.
(18) In an embodiment the biasing circuitry prevents the pull down branch and the pull up branch being activated simultaneously.
(19) In an embodiment the pull up branch comprises a transistor at an output of the pull up branch and the pull down branch comprises a transistor at an output of the pull down branch. The transistor of the pull up branch and the transistor of the pull down branch are connected in series between a first and a second supply voltage. The output of the active gate driver is connected to a node between the transistor of the pull up branch and the transistor of the pull down branch.
(20) In an embodiment the first supply voltage is larger than the second supply voltage.
(21) In an embodiment the active gate driver further comprises an operational amplifier comprising an input. The voltage feedback is from the output of the active gate driver to the input of the operational amplifier. The output out of the active gate driver is connected to a node between the output of the pull up branch and the output of the pull down branch.
(22) In an embodiment the active gate driver further comprises an operational amplifier comprising an input. A current sensing circuitry is configured to sense a current provided at an output of the pull up branch and a current provided at an output of the pull down branch and configured to feed a sensed current back to the input of the operational amplifier.
(23) In an embodiment the operational amplifier comprises first and second inputs. In the embodiment the current feedback is provided to the first input and the voltage feedback is provided to the second input. The first input may be a positive input of the operational amplifier and the second input may be a negative input of the operational amplifier.
(24) The current and voltage feedback may be adaptive or controlled in real time.
(25) In an embodiment the output of the active gate driver is current limited.
(26) In an embodiment at least one of the pull up branch and the pull down branch comprises a current mirror.
(27) In another aspect there is provided an electric motor control system comprising an active gate driver as described herein and a controller. The electric motor control system may comprise a global current feedback from the output of the electronic switch to an input of the controller and the controller may be configured to output a control signal to the input of the active gate driver.
(28)
(29)
(30) Delays in the rise and fall times of the output voltage represent a loss of efficiency. Ideally, V.sub.OUT should replicate a step function (i.e. rise and fall quickly) for maximum efficiency.
(31) In
(32)
(33)
(34) Pulse shaping using variable output resistance gate driver circuits as shown in
(35)
(36) However, much like the active gate driver circuit 301 of
(37)
(38) In
(39) The electronic switch 402 controls the operation of an inductive load 403. Optionally, a freewheeling diode 404 is connected in parallel across the inductive load 403 to provide a path for the current flowing through the inductive load when the electronic switch 402 switches off.
(40)
(41)
(42)
(43) The active gate driver 701 uses a voltage to current converter at the output stage of the active gate driver 701, which is based around an operational amplifier and a MOSFET, this limits the bandwidth.
(44) The active gate driver 701 comprises a voltage to resistance converter using a junction field effect transistor (JFET). The JFET is open loop and will therefore be susceptible to temperature drift and aging.
(45) The feedback for current and voltage is independent (local) for the pull-up and pull-down sections. Combined with the temperature drift of the JFETs, this can lead to current shoot-through where both pull-up and pull-down section can turn on at the same time and a large current can flow through both sections.
(46)
(47) The active gate driver circuit comprises an operational amplifier IC.sub.1 and the pull down branch and the pull up branch. The active gate driver comprises a voltage and current feedback, wherein the voltage and current feedback is common to both the pull down branch and the pull up branch.
(48) The pull down branch and the pull up branch each comprise a first linear amplifier and a second linear amplifier respectively, wherein the two linear amplifiers each comprise a current mirror. The two current mirrors are a current sinking current mirror and a current sourcing current mirror respectively for the first linear amplifier and the second linear amplifier. The use of current mirrors provide a high full power bandwidth.
(49) The pull down branch is turned on in response to a positive voltage signal and the pull up branch is turned on in response to a negative voltage signal. The active gate driver comprises a biasing circuitry for activating the pull down branch in response to the positive voltage signal and the pull up branch in response to the negative voltage signal.
(50) The pull down branch comprises a pull down resistor that pulls down an output voltage of the pull down branch to a negative supply voltage in response to an output transistor of the current sinking current mirror being switched on. The pull up branch comprises a pull up resistor that pulls up an output voltage of the pull down branch to a positive supply voltage in response to an output transistor of the current sinking current mirror. Due to the inductive nature of the load and stray parasitic components of the PCB the drain current, i.sub.D, will experience ringing when the electronic switch 803 switches between states. This effect can be seen in a fourth plot 114 of
(51) An input of the electronic switch 803 is driven by the active gate driver circuit. The electronic switch is configured to drive an inductive load. In an embodiment, the inductive load is a motor winding.
(52) The inductive load could also be an inductor or transformer that is part of a switched-mode power supply (SMPS) or a DC-DC converter.
(53) The electronic switch may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), Isolated Gate Bipolar Transistor (IGBT) or other semiconductor devices.
(54) Embodiments provide a solution to maintain high efficiency whilst complying with EMC regulations by limiting the amount of ringing on the drain current. The input at the electronic switch 803 can be current limited to reduce ringing; however, this could reduce the switching efficiency of the electronic switch 803. Embodiments adjust the output impedance of the linear amplifiers to reduce ringing whilst maintaining high efficiency. Embodiments adjust the output impedance of the linear amplifiers through voltage and current feedback
(55)
(56) In
(57)
(58) The linear amplifiers are activated based on the output of the operational amplifier IC.sub.1. The output of the operational amplifier IC.sub.1 may be controlled by a controller circuit. The controller circuit may be digital and comprise a digital to analogue converter (DAC) to act as an interface to the active gate driver 801, in particular to the operational amplifier IC.sub.1.
(59) When viewed from the output of the operational amplifier IC.sub.1, an anode of the first diode D.sub.1 is connected in series with the output of the operational amplifier IC.sub.1. The cathode of the first diode D.sub.1 is connected to the resistor R.sub.3 and a base of the transistor Q.sub.1, such that the base of the transistor Q.sub.1 is connected between the cathode of the first diode D.sub.1 and the resistor R.sub.3. The resistor R.sub.3 is connected to the positive supply voltage V.sub.DD such that the resistor R.sub.3 is connected between the cathode of the first diode D.sub.1 and the positive supply voltage V.sub.DD.
(60) An emitter of the transistor Q.sub.1 is connected to the resistor R.sub.5. The resistor R.sub.5 is connected to the positive supply voltage V.sub.DD, such that the resistor R.sub.5 is connected between the emitter of the transistor Q.sub.1 and the positive supply voltage V.sub.DD. A collector of the transistor Q.sub.1 is connected to the current sinking current mirror. Specifically, the collector of the transistor Q.sub.1 is connected to a collector of the transistor Q.sub.2.
(61) The collector of the transistor Q.sub.2 is connected to a base of the transistor Q.sub.2. An emitter of the transistor Q.sub.2 is connected to the resistor R.sub.6. The resistor R.sub.6 is connected to the negative supply voltage V.sub.SS, such that the resistor R.sub.6 is connected between the emitter of the transistor Q.sub.2 and the negative supply voltage V.sub.SS. The base of the transistor Q.sub.2 is also connected to a base of the transistor Q.sub.6.
(62) An emitter of the transistor Q.sub.6 is connected to the resistor R.sub.10. The resistor R.sub.10 is connected to the negative supply voltage V.sub.SS, such that the resistor R.sub.10 is connected between the emitter of the transistor Q.sub.6 and the negative supply voltage V.sub.SS.
(63) The collector of the transistor Q.sub.6 is connected to a gate of the electronic switch 803. A voltage output at the collector of the transistor Q.sub.6 is the input to the electronic switch 803, which is depicted as the gate of the MOSFET in
(64) In
(65) When viewed from the output of the operational amplifier IC.sub.1, the cathode of the second diode D.sub.2 is connected in series with the output of the operational amplifier IC.sub.1. The anode of the second diode D.sub.2 is connected to the resistor R.sub.4 and a base of the transistor Q.sub.4, such that the base of the transistor Q.sub.4 is connected between the anode of the second diode D.sub.2 and the resistor R.sub.4. The resistor R.sub.4 is connected to the negative supply voltage V.sub.SS such that the resistor R.sub.4 is connected between the anode of the second diode D.sub.2 and the negative supply voltage V.sub.SS.
(66) An emitter of the transistor Q.sub.4 is connected to the resistor R.sub.8. The resistor R.sub.8 is connected to the negative supply voltage V.sub.SS, such that the resistor R.sub.8 is connected between the emitter of the transistor Q.sub.4 and the negative supply voltage V.sub.SS. A collector of the transistor Q.sub.4 is connected to the current sourcing current mirror. Specifically, the collector of the transistor Q.sub.4 is connected to a collector of the transistor Q.sub.3.
(67) The collector of the transistor Q.sub.3 is connected to a base of the transistor Q.sub.3. An emitter of the transistor Q.sub.3 is connected to the resistor R.sub.7. The resistor R.sub.7 is connected to the positive supply voltage V.sub.DD, such that the resistor R.sub.7 is connected between the emitter of the transistor Q.sub.3 and the positive supply voltage V.sub.DD. The base of the transistor Q.sub.3 is also connected to a base of the transistor Q.sub.5.
(68) An emitter of the transistor Q.sub.5 is connected to the resistor R.sub.9. The resistor R.sub.9 is connected to the positive supply voltage V.sub.DD, such that the resistor R.sub.9 is connected between the emitter of the transistor Q.sub.5 and the positive supply voltage V.sub.DD.
(69) The active gate driver 801 comprises a synthetic output impedance. The synthetic output impedance comprises a resistor R.sub.11, R.sub.12 and R.sub.13. The synthetic output impedance is provided by voltage and current feedback.
(70) The resistor R.sub.13 provides the voltage feedback from the output of the active gate driver 801 to an input of the active gate driver 801. The input of the active gate driver 801 is an input of the operational amplifier IC.sub.1, wherein the input of the operational amplifier comprises a non-inverting input and an inverting input.
(71) Specifically, the collector of the transistor Q.sub.6 is connected to the resistor R.sub.13. The resistor R.sub.13 is connected to the inverting input of the operational amplifier IC.sub.1 and a resistor R.sub.2 is connected to the inverting input of the operational amplifier IC.sub.1, such that the resistor R.sub.13 is connected between the emitter of the transistor Q.sub.6 and a node between the resistor R.sub.2 and the inverting input of the operational amplifier IC.sub.1 to form a potential divider with resistor R.sub.13 and R.sub.2. The resistor R.sub.13 forms a potential divider with resistor R.sub.2 provides voltage feedback from the collector of the transistor Q.sub.6 to the inverting input of the operational amplifier IC.sub.1.
(72) Resistor R.sub.11 and resistor R.sub.12 respectively form a potential divider with resistor R.sub.1 connected to the non-inverting input of IC.sub.1 and provide feedback of the current flowing through Q.sub.5 and Q.sub.6 respectively. R.sub.9 and R.sub.10 are low value resistors that may, for example, have a value in the range of 1-10 Ohms to allow for large currents to flow through Q.sub.5 and Q.sub.6 respectively. R.sub.11 and R.sub.12 in contrast are identical value higher value resistors that serve to sense the current flowing through Q.sub.5 and Q.sub.6 respectively.
(73) The voltage and current feedback of the active gate driver 801 of embodiments is closed loop. This avoids problems with susceptibility to temperature and aging effects found in known active gate drivers.
(74) In an embodiment, the resistors R.sub.5 R.sub.6 R.sub.7 R.sub.8 R.sub.9 and R.sub.10 have a relationship, which can be expressed using the equation below.
R.sub.5=R.sub.6=R.sub.7=R.sub.8=R.sub.9=R.sub.10
(75) Moreover, R.sub.11 and R.sub.12 may have the following relationship in the embodiment.
R.sub.11=R.sub.12
(76) Accordingly, the equation for the output of the active gate driver i.sub.G is derived to be the following:
(77)
(78) The coefficients of v.sub.G, v.sub.2 and v.sub.1 can be simplified with substitution to:
i.sub.G=Av.sub.G+Bv.sub.2−Cv.sub.1
(79) By manipulating both v.sub.2 and v.sub.1, Z.sub.OUT (v.sub.G/i.sub.G) can be manipulated. If either v.sub.1 or v.sub.2 is grounded so that their value is zero, the other exclusively controls Z.sub.OUT. Similarly, either R.sub.1 or R.sub.2 can be an open circuit (high impedance) so that either v.sub.2 or v.sub.1 respectively has exclusive control over Z.sub.OUT.
(80) In another example different resistance values may be adopted. For example, R.sub.7 and R.sub.8 may have a value that is ten times the value of R.sub.9 and R.sub.10, while R.sub.5 and R.sub.6 can be five times as large as R.sub.7 and R.sub.8.
(81)
(82) The global feedback mechanism further ensures that the system is not affected by variations such as temperature, aging, humidity, supply voltage and mechanical load.
(83) The voltage and current feedback may be in real time or adaptive. Where the voltage and current feedback is adaptive, an adaption algorithm may be implemented by the controller or an external adaption algorithm block, wherein the adaptation algorithm generates filter tap coefficients, otherwise known as gain weightings, which improve switching characteristics. In an embodiment, the adaption algorithm is based on any optimisation method including, but not limited to, a generic algorithm (GA) or a mean square error (MSE) optimisation.
(84) While certain arrangements have been described, the arrangements have been presented by way of example only, and are not intended to limit the scope of protection. The inventive concepts described herein may be implemented in a variety of other forms. In addition, various omissions, substitutions and changes to the specific implementations described herein may be made without departing from the scope of protection defined in the following claims.