Method and Circuit Arrangement for Ascertaining a Type and Value of an Input Voltage

Abstract

Circuit arrangement via which a voltage type and value of an input voltage of a. power supply or a switching-mode power supply is ascertained is configured such that the input voltage of the power supply decreases at the input side and includes a differential amplifier for converting the input voltage into a signal rectified by a first rectifier such that a forward voltage of the first rectifier is compensated, includes an inverter which generates an inverted signal rectified by a second rectifier such that a forward voltage of the second rectifier is compensated, includes a mixer via which a first output signal is generated from the useful signals, from which first output signal a second output signal is derived via a filter such that the voltage type is determinable from the first output signal, and a voltage value of the input voltage can be determined from the second output signal.

Claims

1.-8. (canceled)

9. A circuit arrangement for ascertaining a voltage type and a voltage value of an input voltage of a power supply, the circuit arrangement being configured such that the input voltage of the power supply drops at an input side of the circuit arrangement, the circuit arrangement comprising: a differential amplifier for converting the input voltage into a useful signal which is rectified via a first rectifier unit arranged at an output of the differential amplifier and to which a first compensation diode is assigned; an inverter for generating an inverted useful signal from the useful signal, the inverted useful signal being rectified via a second rectifier unit arranged at an output of the inverter and to which a second compensation diode is assigned; a mixer unit for generating a first output signal from the rectified useful signal and the rectified inverted useful signal; and a filter unit which is configured to generate a second output signal from the first output signal.

10. The circuit arrangement as claimed in claim 9, wherein the first output signal and the second output signal are forwarded via a data connection to a control unit for evaluation.

11. The circuit arrangement as claimed in claim 9, wherein the differential amplifier is has a high impedance level on the input side.

12. The circuit arrangement as claimed in claim 9, wherein the first rectifier unit, the assigned first compensation diode, the second rectifier unit and the assigned second compensation diode are each configured as double diodes.

13. The circuit arrangement as claimed in claim 9, wherein the differential amplifier and the inverter are configured to utilize an auxiliary supply of the power supply as an operating voltage for the differential amplifier and the inverter.

14. A method for ascertaining a voltage type of an input voltage of a power supply, a first output signal based on the input voltage of the power supply being detected utilizing a circuit arrangement, the method comprising: awaiting a first threshold value to be undershot after a peak of the first output signal is passed through for a first time, until a predetermined number of repetitions is reached, the method further comprising: storing a time stamp and starting a predetermined dead time when the first output signal undershoots the first threshold value; checking whether the first output signal exceeds a second threshold value after the predetermined dead time has elapsed; and waiting until the first output signal undershoots the first threshold value again when the first output signal has exceeded the second threshold value when the dead time has elapsed, the second threshold value being greater than the first threshold value; wherein a frequency of the input voltage is derived from the stored time stamps after the predetermined number of repetitions has been reached.

15. The method as claimed in claim 14, wherein the method is terminated when the second threshold value is not exceeded within a predeterminable first period after the dead time has elapsed.

16. The method as claimed in claim 13, wherein the method is terminated when the first threshold value is not undershot after a second predeterminable period has elapsed.

17. The method as claimed in claim 14, wherein the method is terminated when the first threshold value is not undershot after a second predeterminable period has elapsed.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The invention is explained below by way of example based on the appended figures, in which:

[0026] FIG. 1 shows an exemplary schematic illustration of a power supply having the circuit arrangement in accordance with the invention for ascertaining a voltage type and a voltage value of an input voltage;

[0027] FIG. 2 shows a schematic illustration of an exemplary embodiment of the circuit arrangement in accordance with the invention;

[0028] FIG. 3 shows an exemplary detailed illustration of the circuit arrangement in accordance with the invention;

[0029] FIG. 4 shows graphical plot of an exemplary profile of a first output signal, generated by the circuit arrangement in accordance with the invention, with a corresponding derivation of the voltage type of the input voltage; and

[0030] FIG. 4 is a flowchart of the method in accordance with the invention.

[0031] DETAILED DESCRIPTOIN OF THE EXEMPLARY EMBODIMENTS

[0032] FIG. 1 shows schematically and by way of example a single-phase power supply or a single-phase switched-mode power supply SV, which comprises the circuit arrangement ME in accordance with the invention for ascertaining a voltage type and a voltage value of an input voltage Ue of the power supply SV or of the switched-mode power supply SV. The exemplary power supply SV is supplied with the input voltage Ue by a supply network, where the input voltage Ue is formed, for example, by a voltage difference between a phase conductor L and the neutral conductor N of the supply network. That is, only one phase conductor L or one phase L of the supply network is used to supply voltage to the power supply SV.

[0033] The input voltage Ue, which may be, for example, a 230 V AC voltage, is converted via a rectifier unit GL as the input stage of the power supply SV to a rectified intermediate circuit voltage U.sub.ZK on an output side of the rectifier unit GL or an input side of an intermediate circuit ZK. The intermediate circuit voltage U.sub.ZK is, in this case, referred to as a reference potential M or a ground potential M. The intermediate circuit ZK may comprise, for example, an optional intermediate circuit capacitor C.sub.ZK. Furthermore, at least two Y capacitors Y1, Y2 are connected in the intermediate circuit ZK, for example, for reasons of electromagnetic compatibility. The Y capacitors Y1, Y2 are arranged in the intermediate circuit ZK between the upper potential and between the reference or ground potential M and a protective ground conductor PE or the so-called protective earth PE.

[0034] The mostly unstabilized input voltage Ue is converted by the power supply SV or the switched-mode power supply SV into a constant output voltage Ua (for example, a DC voltage of 4 to 28 V) at an output side of the power supply SV or the switch-mode power supply SV to supply one or more consumers, where a constancy of the output voltage Ua is achieved through regulation of the flow of energy. To this end, the power supply SV furthermore comprises a switch converter SN, which is arranged on an output side of the intermediate circuit ZK. This switch converter SN has at least one periodically operating electronic switching element and can be formed, for example, as a potential-isolating switch converter SN, which has a DC isolation (for example, transformer), or as a potential-bound (i.e., non-potential-isolating) switching converter SN without DC isolation. The constant output voltage Ua can then be tapped on an output side of the switch converter SN or be provided to one or a plurality of consumers.

[0035] Furthermore, the power supply SV comprises the circuit arrangement ME in accordance with the invention, which can be used to determine a voltage type and a voltage value of the input voltage Ue of the power supply SV or the switched-mode power supply SV. Here, the circuit arrangement ME is arranged such that the input voltage Ue of the power supply SV drops at an input of the circuit arrangement ME. To this end, the circuit arrangement ME is connected, for example, on the input side via high-impedance resistors R1, R2 to the phase conductor L and to the neutral conductor N on the input side of the switched-mode power supply SV. An auxiliary voltage U.sub.H (for example, 13 V) is provided for a voltage supply of the circuit arrangement ME. For example, an auxiliary supply already used in the power supply SV, for example, for control and/or signal units can be used as auxiliary voltage U.sub.H. The circuit arrangement is furthermore connected to the reference potential or ground potential M of the intermediate circuit ZK of the power supply SV.

[0036] Two output signals AS1, AS2 are provided on the output side by the circuit arrangement ME. These output signals AS1, AS2 can be forwarded, for example, via a data connection (for example, process field network or Profinet for short) to a local or central control unit SE. The output signals AS1, AS2 can be evaluated accordingly with the aid of the control unit SE, which may be formed, for example, as a microcontroller. The voltage type of the input voltage Ue can be derived from a first output signal AS1, for example, via the associated method for ascertaining a voltage type of the input voltage Ue of the power supply SV. That is, it is possible to determine from the first output signal AS1 (as is described in more detail below based on FIG. 4) whether the input voltage Ue is an AC voltage or DC voltage. A second output signal AS2 can be used for accurate determination of a voltage value or average value of the input voltage Ue.

[0037] FIG. 2 now schematically shows an exemplary embodiment of the circuit arrangement ME in accordance with the invention for ascertaining the voltage type and a voltage value of the input voltage Ue of the power supply SV, where the circuit arrangement is configured such that the input voltage Ue of the power supply SV is also applied to an input side of the circuit arrangement ME. To this end, the input side of the circuit arrangement is connected, for example, to the phase conductor L and to the neutral conductor N of the single-phase voltage supply of the power supply SV for the switched-mode power supply SV, where the differential voltage between the phase conductor L and the neutral conductor N is applied as input voltage Ue to the input of the circuit arrangement ME or of a differential amplifier DIF of the circuit arrangement ME. The input voltage Ue with a relatively high-voltage level (for example, 84 to 278 V) is converted by the differential amplifier DIF to a useful signal NS with a low voltage level (for example, 0.5 to 12.5 V). The differential amplifier DIF is configured to have a high impedance on the input side.

[0038] A first rectifier unit GL1, in particular a half-wave rectifier GL1 or a rectifier diode GL1, is installed on an output side of the differential amplifier DIF, where the rectifier unit rectifies the useful signal NS generated by the differential amplifier DIF and forwards the useful signal to a mixer unit MS. The first rectifier unit GL1 is assigned a first compensation diode K1, which compensates for a voltage shift caused by the forward direction of the first rectifier unit GL1. Ideally, the first rectifier unit GL1 and the first compensation diode K1 can be configured as a “double diode”. That is, the two units GL1, K1 are installed, for example, in a joint housing and as a result are thermally coupled, as a result of which temperature-dependent forward voltages can be eliminated easily and well.

[0039] The compensation diode is furthermore assigned a first pull-up resistor R3, which connects a (signal) line to a higher voltage potential. The first pull-up resistor is arranged between an anode of the first compensation diode K1 and an auxiliary voltage U.sub.H. The auxiliary voltage U.sub.H (for example, 13 V) which, for example, is already present in the power supply SV for the voltage supply of, for example, internal control and/or signal units, is also used for the voltage supply of the differential amplifier DIF or as operating voltage U.sub.H for the differential amplifier DIF. The differential amplifier DIF furthermore has a connection to a reference or ground potential M.

[0040] The circuit arrangement ME in accordance with the invention furthermore comprises an inverter INV, which likewise uses the internal auxiliary voltage U.sub.H for the voltage supply or as operating voltage and also has a connection to the reference or ground potential M. The useful signal NS generated by the differential amplifier DIF is converted to an inverted useful signal negNS by the inverter INV.

[0041] A second rectifier unit GL2, in particular a half-wave rectifier GL2 or a rectifier diode GL2, is installed on an output side of the inverter INV, where the rectifier unit rectifies the inverted useful signal negNS generated by the inverter INV and forwards the inverted useful signal to the mixer unit MS. The second rectifier unit GL2 is likewise assigned a second compensation diode K2, which compensates for a voltage shift caused by the forward direction of the second rectifier unit GL2. Ideally, the second rectifier unit GL2 and the second compensation diode K2 are also configured as a “double diode”. The second rectifier unit GL2 and the second compensation diode K2 are likewise installed in a joint housing and as a result are thermally coupled, as a result of which temperature-dependent forward voltages can be eliminated easily and well.

[0042] The second compensation diode K2 and the second rectifier unit GL2 are each assigned a second and a third pull-up resistor R4, R5. The second pull-up resistor R4 is arranged between the anode of the second compensation diode K2 and the auxiliary supply U.sub.H. The third pull-up resistor R5 is installed between the anode of the second rectifier unit GL2 and the auxiliary supply U.sub.H.

[0043] In order, for example, to save a negative operating voltage −U.sub.H for the differential amplifier DIF or for the inverter INV or to be able to use the internal auxiliary supply U.sub.H of the power supply SV, a reference voltage Uref (for example, 5 V) is also provided.

[0044] The useful signal NS of the differential amplifier DIF and the inverted useful signal negNS of the inverter INV are then combined in the mixer unit MS to form a first output signal AS1, which is used, for example, to determine the voltage type of the input voltage Ue. That is, it is possible to derive from the first output signal AS1 whether the input voltage Ue as an AC or DC voltage.

[0045] The circuit arrangement ME furthermore has a filter unit. The filter unit is configured, for example, as an RC filter and comprises a resistor R.sub.F and a capacitance C.sub.F. With the aid of the filter unit, a second output signal AS2, which represents, for example, an average value of the first output signal AS1, can be generated from the first output signal AS1. The second output signal AS2 can be used, for example, to determine the input voltage Ue or an input voltage average value relatively accurately.

[0046] The first output signal AS1, like the second output signal AS2, can then be forwarded, for example, via a data connection (Profinet, etc.) to a local or central control unit SE, via which the output signals AS1, AS2 can be evaluated accordingly.

[0047] FIG. 3 likewise schematically illustrates by way of example the circuit arrangement ME in accordance with the invention for ascertaining a voltage type and a voltage value of the input voltage Ue of the voltage supply SV, where especially exemplary embodiments of the differential amplifier DIF and inverter INV can be seen in FIG. 3.

[0048] The differential amplifier DIF of the circuit arrangement ME may be configured, for example, as an operational amplifier circuit. To this end, the differential amplifier DIF comprises an operational amplifier OP1, which uses, for example, the auxiliary voltage U.sub.H as positive operating voltage and the negative operating voltage connection of which is connected to the reference or ground potential M. The differential amplifier DIF furthermore comprises on the input side two input resistors R1, R2, which are formed so as to have a high impedance and, for example, have an equal resistance value. Two further resistors R6, R7 are also provided, which are formed so as to have a low impedance in comparison with the input resistors R1, R2 and, for example, likewise can have the same resistance value. Here, the first resistor R6 of the differential amplifier DIF is connected to the reference voltage Uref and the second resistor R7 is arranged in the feedback system of the differential amplifier DIF. The first rectifier unit GL1 is again arranged on the output side of the differential amplifier DIF or the operational amplifier OP1 of the differential amplifier DIF and the first compensation diode K1 is arranged in the feedback system of the differential amplifier circuit DIF.

[0049] As FIG. 3 illustrates by way of example, the inverter INV can also be configured as an operational amplifier circuit having an operational amplifier OP2. The operational amplifier OP2 also uses, for example, the auxiliary voltage U.sub.H as positive operating voltage and its negative operating voltage connection is connected to the reference or ground potential M. A positive input of the operational amplifier OP2 of the inverter INV is connected, for example, to the reference voltage Uref. The useful signal NS generated by the differential amplifier DIF is fed to a negative input of the operational amplifier OP2 of the inverter INV via a first resistor R8 of the inverter INV. A second resistor R9 of the inverter INV is installed in the feedback system of the operational amplifier OP2 of the inverter INV, where the two resistors R8, R9 of the inverter INV have the same resistance value for inverting the useful signal NS. The second rectifier unit GL2 for rectifying the inverted useful signal negNS is arranged on the output side of the inverter INV or the operational amplifier OP2 and the second compensation diode is arranged in the feedback system of the inverter circuit INV.

[0050] The rectified useful signal NS from the differential amplifier DIF and the rectified inverted useful signal negNS are again fed to the mixer unit MS and mixed to form the first output signal AS1. The second output signal AS2 is then derived from the first output signal AS1 via the RC filter unit R.sub.F, C.sub.F.

[0051] FIG. 4 shows by way of example a graphical plot of a time profile of a first output signal AS1, generated by the circuit arrangement ME in accordance with the invention, from which a voltage type of the input voltage Ue is derived in accordance with the method in accordance with the invention.

[0052] Here, a time t is plotted on a horizontal axis and a voltage −U is plotted on a vertical axis. An intersection of the vertical axis with the horizontal axis is also at a voltage value of the reference voltage Uref (for example at 5 V). Dashed marks for 0 volts, for a first threshold value SW1 and a second threshold value SW2 are also plotted on the vertical axis, where the first threshold value SW1 is closer to the value of the reference voltage Uref than the second threshold value SW2. As an alternative, a threshold value with a hysteresis can also be used. On account of the rectification by the two rectifier units GL1, GL2 of the circuit arrangement ME, the first output signal AS1 has, for example, a time profile of a pulsed DC voltage, where a wave has a peak .Math..

[0053] For the evaluation of the input voltage Ue or the first output signal AS1, after the method in accordance with the invention has begun, there is first a wait for the peak .Math. of the first output signal to be passed through for the first time. Coming from the peak .Math., there is then a wait for the first threshold value SW1 to be undershot. If it is determined that the first threshold value SW1 has been undershot, for example, at a first time t1, then a first time stamp is stored and a predetermined dead time T.sub.t is started. After the predetermined dead time T.sub.t has elapsed, there is at a second time t2 a check to determine whether the second threshold value SW2 has been exceeded or a wait until this has happened. After the second threshold value SW2 has been exceeded, there is a wait until the first output signal AS1 undershoots the first threshold value SW1 again. If the first threshold value SW1 is undershot again at a third time t3, a second time stamp is stored again and the predetermined dead time T.sub.t is then started. After the dead time T.sub.t has elapsed, there is another check at a fourth time t4 to determine whether the second threshold value SW2 has been exceeded. If this is the case, then there is another wait for the undershooting of the first threshold value SW1 and a time stamp is stored when the undershooting of the first threshold value SW1 is determined by the first output signal AS1 at a fifth time t5.

[0054] The steps of “storing a time stamp and starting a predetermined dead time T.sub.t when the first output signal AS1 undershoots the first threshold value SW1”, “checking whether the first output signal AS1 exceeds a second threshold value SW2 after the predetermined dead time T.sub.t has elapsed” and “waiting until the first output signal AS1 undershoots the first threshold value again after the first output signal AS1 has exceeded the second threshold value SW2 when the dead time T.sub.t has elapsed” are repeated until a predetermined number of repetitions, for example, 10 repetitions, has been reached. A frequency of the first output signal AS1 and thus of the input voltage Ue can then be derived from at least two stored time stamps. If this frequency is, for example, in a range of from 45 to 65 Hertz, then the input voltage Ue can be evaluated as an AC voltage.

[0055] If, after the dead time Tt has elapsed, the second threshold value SW2 is never exceeded within a predeterminable first period (for example 100 ms) or if, after a second period has elapsed, for example after the peak .Math. of the first output signal AS1 has been passed through for the first time, the first threshold value SW1 is never undershot, then performance of the method can be terminated or the input voltage Ue can be evaluated as a DC voltage. The input voltage Ue can also be evaluated as a DC voltage when it is not possible to detect a frequency of the first output signal AS1 from the stored time stamps, for example, after the predetermined number of repetitions of the method step. The method for ascertaining a voltage type of an input voltage Ue of a power supply SV can be performed, for example, in the control unit SE. The evaluation of the first and the second output signal AS1, AS2 can then be forwarded, for example, to a local or central control, evaluation and/or display unit, in order, for example, to be displayed or to be further processed accordingly.

[0056] FIG. 5 is a flowchart of the method for ascertaining a voltage type of an input voltage Ue of a power supply, where a first output signal AS1 based on the input voltage Ue of the power supply SV is detected utilizing the circuit arrangement ME in accordance with the disclosed embodiments.

[0057] The method comprises awaiting a first threshold value SW1 to be undershot after a peak .Math. of the first output signal AS1 is passed through for a first time, as indicated in step 510.

[0058] Next, until a predetermined number of repetitions is reached, the method further comprises storing a time stamp and starting a predetermined dead time Tt when the first output signal AS1 undershoots the first threshold value SW1 (step 520), checking whether the first output signal AS1 exceeds a second threshold value SW2 after the predetermined dead time Tt has elapsed (step 530) and waiting until the first output signal AS1 undershoots the first threshold value again when the first output signal AS1 has exceeded the second threshold value SW2 when the dead time Tt has elapsed, as indicated in step 540.

[0059] In accordance with the method of the invention, the second threshold value SW2 is greater than the first threshold value SW1, where the frequency of the input voltage Ue is derived from the stored time stamps after the predetermined number of repetitions has been reached.

[0060] Thus, while there have been shown, described and pointed out fundamental novel features of the invention as applied to a preferred embodiment thereof, it will be understood that various omissions and substitutions and changes in the form and details of the methods described and the devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.