Low-power APD bias controller, bias control method, and photoelectric receiver

Abstract

An avalanche photodiode (APD) bias control method may include acquiring a photocurrent intensity voltage and generating a control signal by superposing the acquired photocurrent intensity voltage and a bias setting signal, wherein the control signal controls a voltage drop between an adjustable power supply output voltage and a voltage of the APD. The APB bias control method may further include adjusting the adjustable power supply output voltage and the bias setting signal simultaneously so that the voltage drop is within a target voltage drop range and the APD bias voltage approaches a bias voltage that corresponds to an APD optical input power. An avalanche photodiode (APD) bias controller and an avalanche photodiode (APD) photoelectric receiver are also provided.

Claims

1. An avalanche photodiode (APD) bias control method, comprising: acquiring a photocurrent intensity voltage; generating a control signal by superposing the acquired photocurrent intensity voltage and a bias setting signal, wherein the control signal controls a voltage drop between an adjustable power supply and the APD; adjusting an adjustable power supply output voltage that is output from the adjustable power supply and the bias setting signal simultaneously so that the voltage drop is within a target voltage drop range and a bias voltage applied across the APD approaches a target bias voltage that corresponds to an optical input power of an incident light that reaches the APD.

2. The method of claim 1, wherein the bias setting signal adjusts the voltage drop independent from the photocurrent intensity voltage, and wherein an increase of the bias setting signal or the photocurrent intensity voltage corresponds to an increase of the voltage drop.

3. The method of claim 1, further comprising: selecting a typical operating temperature point within an operating temperature range of the APD; setting, at the typical operating temperature point, a value of the adjustable power supply output voltage and a value of the bias setting signal, wherein the value of the adjustable power supply output voltage and the APD operating temperature have a first relationship, and the value of the bias setting signal and the APD operating temperature have a second relationship; acquiring a current APD operating temperature point; determining, based on the first and second relationships, an initial value of the adjustable power supply output voltage and an initial value of the bias setting signal at the current APD operating temperature; and controlling the voltage drop based on the initial value of the adjustable power supply output voltage and the initial value of the bias setting signal.

4. The method of claim 3, further comprising: setting the APD optical input power slightly below a sensitivity target; changing the adjustable power supply output voltage; adjusting the bias setting signal to control the voltage drop to a target voltage drop; measuring a bit error rate; identifying the power supply output voltage and bias setting signal corresponding to a lowest bit error rate; and setting the identified power supply output voltage as the initial adjustable power supply output voltage, and the identified bias setting signal as the initial bias setting signal.

5. The method of claim 1, further comprising: generating an undervoltage signal when the voltage drop is smaller than the target voltage drop range; and generating an overvoltage signal when the voltage drop is greater than the target voltage drop range.

6. The method of claim 1, further comprising: connecting an auxiliary power supply to the APD when the voltage drop is lower than a lowest value of the target voltage drop range; and disconnecting the auxiliary power supply when the voltage drop is higher than or equal to the lowest value of the target voltage drop range.

7. An avalanche photodiode (APD) bias controller, comprising: a bias voltage generator configured to generate: a bias voltage that determines the APD bias voltage based on an external photocurrent intensity feedback signal, and a second voltage signal, wherein the bias voltage generator comprises: a comparator configured to compare the second voltage signal to one or more reference voltages to generate an undervoltage or overvoltage indicator, where the undervoltage indicator indicates that a current output voltage of an adjustable power supply is too low, and the overvoltage indicator indicates that the current output voltage of the adjustable power supply is too high.

8. The controller of claim 7, wherein the bias voltage generator comprises a bias setting signal port, and the bias setting signal sets a level of the bias voltage independent from the photocurrent intensity feedback signal.

9. The controller of claim 7, further comprising: a voltage follower with a first port that provides a connection to the adjustable power supply, a second port that provides a voltage to an APD load circuit, and a third port for receiving an input voltage.

10. The controller of claim 7, further comprising: a bias voltage adjuster configured to generate a control signal based the undervoltage indicator or the overvoltage indicator, wherein the control signal controls the output voltage of the adjustable power supply.

11. The controller of claim 10, wherein the control signal controls and stabilizes the bias voltage by controlling the output voltage of the adjustable power supply.

12. The controller of claim 7, further comprising: a power supply switchover circuit configured to connect an auxiliary power supply to the APD and disconnect the auxiliary power supply from the APD based on the undervoltage indicator, wherein the adjustable power supply is the sole power supply for the APD when the auxiliary power supply is disconnected.

13. The controller of claim 7, further comprising: a temperature compensator configured to increase or decrease the bias voltage based on temperature, and to provide temperature compensation to the bias voltage to maintain an optimal bias voltage within an operating temperature range.

14. An avalanche photodiode (APD) photoelectric receiver, comprising: a voltage follower with a first port that provides a connection to an adjustable power supply, a second port that provides a voltage to an APD load circuit, and a third port that receives an input voltage; a bias voltage generator configured to generate: a bias voltage that determines an APD bias voltage based on an external photocurrent intensity feedback signal; and a second voltage signal, wherein the bias voltage generator comprises: a comparator configured to compare the second voltage signal to one or more reference voltages to generate an undervoltage or overvoltage indicator, wherein the undervoltage indicator indicates that a current voltage of the adjustable power supply is too low, and the overvoltage indicator indicates that the current voltage of the adjustable power supply is too high.

15. The receiver of claim 14, wherein the bias voltage generator comprises a bias setting signal port, and the bias setting signal sets a level of the bias voltage independent from the photocurrent intensity feedback signal.

16. The receiver of claim 14, further comprising: a bias voltage adjuster configured to generate a control signal based on the undervoltage or overvoltage indicator, wherein the control signal controls and stabilizes the bias voltage in the process of controlling the voltage of the adjustable power supply.

17. The receiver of claim 14, further comprising: an auxiliary power supply; and a power supply switchover circuit configured to connect the auxiliary power supply to the APD and disconnect the auxiliary power supply from the APD based on the undervoltage indicator, wherein the adjustable power supply is the sole power supply for the APD when the auxiliary power supply is disconnected.

18. The receiver of claim 14, further comprising: a temperature compensator configured to increase or decrease the bias voltage based on temperature, and to provide temperature compensation to the bias voltage that maintains an optimal bias voltage within an operating temperature range.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1a shows a circuit block diagram for the low-power APD bias controller;

(2) FIG. 1b shows an APD characteristic curve, load lines, and operating points;

(3) FIG. 1c shows a logic block diagram for the low-power APD bias controller;

(4) FIG. 2 shows a structural block diagram for the low-power APD bias controller;

(5) FIG. 3a shows a realization block diagram for the bias voltage generating unit with bias voltage setting;

(6) FIG. 3b shows a realization block diagram of the bias voltage generating unit without bias voltage setting;

(7) FIG. 3c shows a circuit diagram for an embodiment of the low-power APD bias controller in an application;

(8) FIG. 4a shows a digital circuit diagram for the low-power APD bias voltage adjusting device; and

(9) FIG. 4b shows a signal processing logic flowchart for the low-power APD bias voltage adjusting device.

DETAILED DESCRIPTION

(10) The text below provides detailed descriptions of embodiments of the disclosure as shown in the drawings. However, these embodiments do not limit the disclosure. The scope of the disclosure covers any changes made to the structure, method, or function by those of ordinary skill in the art based on the embodiments.

(11) FIG. 1a shows a circuit block diagram for the low-power APD bias controller according to embodiments of the present disclosure. Below is a detailed description of the principles of the disclosure in reference to FIG. 1a. It should be noted that modules, units, parts, and any other element described in regard to embodiments of the present disclosure may be implemented by one or more of any sort of circuit, digital signal processor (DSP), application specific integrated circuit (ASIC), digital signal processing device (DSPD), programmable logic device (PLD), field programmable gate arrays (FPGA), controller, micro-controller, micro-processor, computer, or any other electronic component.

(12) The overall circuit of the low-power APD bias controller of embodiments of the present disclosure may comprise an APD bias control device 11, an adjustable power supply 15, an auxiliary power supply 16, a photocurrent detecting unit 18, and peripheral circuitry, wherein the APD bias control device 11 can comprise a photocurrent feedback APD bias controller 12, a bias voltage adjusting unit 13, a temperature compensation module 14, and a power supply switchover unit 17.

(13) Photocurrent feedback bias controller 12 has three input signals: 1) the adjustable power supply output voltage V.sub.0, 2) the photocurrent intensity feedback signal V.sub.fb, and 3) the bias setting signal V.sub.set; and three output signals: 1) the undervoltage state indicator LowV.sub.0, 2) the overvoltage state indicator HighV.sub.0, and 3) the output voltage V.sub.out.

(14) Bias voltage adjusting unit 13 has two input signals: 1) the undervoltage state indicator LowV.sub.0, and 2) the overvoltage state indicator HighV.sub.0; and two output signals: 1) the bias setting signal V.sub.set, which is an output to the photocurrent feedback APD bias controller, and 2) the adjustable power supply voltage setting signal V.sub.0set, which can control the output voltage of the adjustable power source 15.

(15) Power supply switchover unit 17 includes an N-channel MOS transistor Q3, a resistor R4, a P-channel MOS transistor Q2, and a resistor R3. Its input signal that controls the on/off switch is the undervoltage state indicator LowV.sub.0 of the photocurrent feedback APD bias controller 12. The power supply switchover unit 17 is connected to the auxiliary power supply 16, and its output end is connected to the output end of output voltage V.sub.out of the photocurrent feedback APD bias controller 12, which are together connected to the peripheral circuit.

(16) The peripheral circuit includes a precision sampling resistor Rs for optical input detection, a high-frequency filter capacitor C0, an optional filter capacitor C1, an avalanche photodiode (APD), and a trans-impedance amplifier (TIA).

(17) Below is a detailed description of the operating principle of the low-power APD bias controller, with reference to FIG. 1a.

(18) When the APD is reverse biased and the incident light reaches the photosensitive surface of the APD, the APD generates a photocurrent which flows through the sampling resistor Rs. The photocurrent detecting unit 18 detects the average photocurrent signal I.sub.apd on the sampling resistor Rs and generates a photocurrent intensity feedback signal V.sub.fb,
I.sub.apd=Pin**M(1)
where Pin is the optical input power (usually 30-+3 dBm), n is the responsiveness of the APD (usually 0.8-1 mA/mW), and M is the multiplication factor of the APD. The multiplication factor M of the APD is associated with the bias voltage of the APD V.sub.apd and can be approximated as:
M=1/[1(V.sub.apd/V.sub.br).sup.n](2)
where V.sub.apd is the reverse bias voltage of the APD, V.sub.br is the breakdown voltage at a given temperature and increases as the temperature increases, and n is between 1 and 3 and is determined by the semiconductor material, doping profile of the semiconductor, and wavelength of the radiation source. According to Formulas 1 and 2, the operating characteristic curve of the APD (i.e., the curve showing the relationship between the APD's photocurrent I.sub.apd and its reverse bias voltage V.sub.apd at a given optical input power) can be determined by:
I.sub.apd=Pin*/[1(V.sub.apd/V.sub.br).sup.n](3)

(19) In order to obtain optimal sensitivity, V.sub.apd is usually set to be slightly below V.sub.br to make M fall between 10 and 20 when the optical input power is close to the sensitivity level. On the one hand, it is desirable that the APD voltage V.sub.apd is close to V.sub.br to the extent possible in order to increase M and photocurrent signal intensity. On the other hand, when M is too high, it will lead to excessive photocurrent noise, lowering the signal-to-noise ratio, which in turn lowers the sensitivity. In practice, optimal sensitivity is usually achieved when M is between 10 and 20.

(20) A practical concern is damage caused by APD overload. For an optical module with an APD receiver, the optical output power at the emitting end is usually in the order of magnitude of several mW. When the emitting end is directly connected to the receiving end through a fiber optic patch cord or connector loopback, the optical receiving power of the APD suddenly increases from zero to several mW. In this event, if V.sub.apd and M cannot be lowered in a timely manner, a strong photocurrent will emerge within an instance, causing breakdown of and damage to the APD.

(21) A basic function of the photocurrent feedback APD bias controller 12 is overload protection for the APD. Its output stage is serially connected between the output end of the adjustable power supply and the APD, and it generates a voltage drop V.sub.drop that changes with the photocurrent intensity. According to FIG. 1a, the bias voltage of the APD can be expressed as:
V.sub.apd=V.sub.0V.sub.sV.sub.inV.sub.drop(4)

(22) where V.sub.0 is the output voltage of the adjustable power supply, V.sub.s=I.sub.apd*Rs and is the voltage drop across the sampling resistor Rs, and Rs is the resistance of the sampling resistor Rs. V.sub.s can be neglected when a sampling resistor with a small resistance is selected. V.sub.in is the input voltage for the TIA, which is usually around 0.8V and does not change with the photocurrent. The photocurrent feedback APD bias controller 12 is designed to have the output voltage drop V.sub.drop increase as its photocurrent intensity feedback signal V.sub.fb increases, i.e.
V.sub.drop=func(V.sub.fb)(5)
V.sub.fb=I.sub.apd*Rs*Gs,(6)
where func(x) is a monotonically increasing function and Gs is the voltage gain of the photocurrent detecting unit. Usually Rs and Gs are selected so that Rs*Gs is 0.5-1 k ohm, and V.sub.fb is 0-2V.sub.ref, where the reference voltage V.sub.ref is +1.25V. According to Formulas 4-6, the load line of the APD can be determined, i.e.,
V.sub.apd=V.sub.0V.sub.sV.sub.infunc(I.sub.apd*Rs*Gs)(7)

(23) Because func(x) is a monotonically increasing function, the greater the photocurrent I.sub.apd is, the smaller V.sub.apd is, and the smaller the multiplication factor of the APD is. With appropriate configuration of the circuit parameters and selection of func(x), protection of APD is realized as V.sub.apd decreases to several volts and M approaches 1 when the optical power is close to the overload point, i.e., when there is almost no avalanche effect in the APD.

(24) To illustrate, several examples are provided below:

Embodiment 1

(25) Let there be an APD, V.sub.br=+40V, n=2. Further, let V.sub.in=+0.8V; V.sub.s can be neglected; the gain of the sampling circuit (Rs*Gs) is 0.5 k ohm; and the APD responsiveness =1 mA/mW. Set V.sub.0=+40V, and select a linear function for func(x), i.e.
func(V.sub.f)=32*V.sub.fb+0.5=16e3*I.sub.apd+0.5(8)
V.sub.apd=400.8V.sub.drop=38.716 k*I.sub.apd(9)

(26) As shown in FIG. 1b, we can draw the APD load line (a straight line in this case) in an I-V graph according to Formula 9; on the other hand, we can draw the APD operating characteristic curves at optical input powers of 100 uW and 500 uW, respectively, according to Formula 3. In the I-V graph, the voltage and photocurrent at the point of intersection between the APD operating characteristic curve and the load line are the APD's bias voltage and photocurrent at the corresponding input optical power.

(27) Let the sensitivity level be Pin=3.8 uW, it can be determined that at this point I.sub.apd=40 uA according to the I-V graph, V.sub.drop=1.14V and V.sub.apd=38.06V according to Formulas 8 and 9, and M=10.57 according to Formula 2.

(28) When the increase in the optical input power Pin causes I.sub.apd to reach 2 mA, V.sub.drop=32.5 according to Formula 8, V.sub.apd=6.7 according to Formula 9, and M=1.03 according to Formula 2. According to Formula 1, at this time the optical input power Pin=I.sub.apd/(*M)=2/(1*1.029)=1.944 mW.

(29) According to Formulas 6 and 7, when the APD remains under reverse bias voltage, maximum photocurrent is 38.7V/16 k=2.42 mA, and the corresponding optical power is approximately 2.42 mW (+3.8 dBm).

(30) From Embodiment 1, we can see that when a linear function is selected for func(x), V.sub.drop and I.sub.apd have a directly proportional relationship, and with proper selection of its gain (e.g. 16 k ohm) the photocurrent does not exceed 2.42 ma when the optical input power is within its normal operating range (in this example <=+3 dBm). Further, the power consumption of the APD Papd=I.sub.apd*V.sub.apd, and according to Formula 9,
Papd=I.sub.apd*(38.716e3*I.sub.apd)(10)

(31) It reaches its maximum value when I.sub.apd=38.7/16e3*=1.21 mA, and the maximum power consumption is 23.4 mW, which does not exceed the limit for APDs in general.

(32) In practical applications, we may set a power consumption limit for the APD (e.g. 30 mW) based on the requirement of the application and draw it in the I-V graph. FIG. 1b shows the 30 mW power consumption limit curve. The selected APD load line should fall in the safe operating area to the lower left of the curve for the given power consumption limit, so that the APD's operating point does not exceed the given power consumption limit at any optical input power.

(33) It should be noted that even though a linear function is selected for func(x) in the aforementioned Embodiment 1, func(x) can be a different monotonically increasing function based on the requirement of the actual application. For example, V.sub.drop can be a quadratic polynomial function of V.sub.fb (or I.sub.apd), i.e.,
V.sub.drop=V.sub.fb.sup.2*4+V.sub.fb*7+1; or
V.sub.drop=I.sub.apd.sup.2*4e6+I.sub.apd*7e3+1; thus
V.sub.apd=38.2I.sub.apd.sup.2*4e6I.sub.apd*7e3(11)
which is a parabolic load line, as showing by the dash line in FIG. 1b. Comparing the two load lines, we can see: (1) As func(x) is a monotonically increasing function, it can be ensured that there is a monotonically increasing relationship between photocurrent I.sub.apd and optical input power Pin, i.e., for each optical input signal there is a definite value for the photocurrent. (2) A parabolic load line is more conducive to increasing the photocurrent at low optical input power near the sensitivity level. (3) Both load lines fall within the safe operating area. (4) In both cases the maximum operating current is limited to around 2.4 mA.

(34) In embodiments where a microprocessor is used to sample V.sub.fb and control V.sub.drop, the selection of func(x) can be more flexible to achieve a desired APD operating mode.

(35) The method described above can realize overload protection for the APD. However, one issue remains; When the optical input power is close to the overload point, V.sub.apd is very small and V.sub.drop is very large, and the majority of the output power from the adjustable power supply is wasted on V.sub.drop. Assuming the output current from the adjustable power supply mainly supplies the APD, output power P0 from the power supply is;

(36) $\begin{array}{c}P0=I_{\mathrm{apd}}*V_0\\ =I_{\mathrm{apd}}*\left(V_{\mathrm{apd}}+V_{\mathrm{drop}}+V_s+V_{in}\right)\left(\mathrm{according}\mathrm{to}\mathrm{Formula}4\right)\\ =I_{\mathrm{apd}}*\left(V_{\mathrm{apd}}+V_s+V_{in}\right)+I_{\mathrm{apd}}*V_{\mathrm{drop}}\\ =P1+P2\end{array}$$P1=I_{\mathrm{apd}}*\left(V_{\mathrm{apd}}+V_s+V_{in}\right)$$P2=I_{\mathrm{apd}}*V_{\mathrm{drop}}$

(37) where P1 is the power required for the APD to operate and P2 is wasted power. As in the same example given before, when the optical input power Pin=1.94 mW and I.sub.apd=2 mA, V.sub.0=40V, V.sub.drop=32.5V, P2=65 mW, P0=40*2 mA=80 mW, P1=15 mW. We can see that the majority of the power from the power supply is wasted on V.sub.drop; 65 mW is wasted for each channel. If V.sub.0 and V.sub.drop both decrease by 32V to 8V and 0.5V, respectively, APD remains in the same operating state (same V.sub.apd and I.sub.apd) but waste power P2 can be decreased to 0.5V*2 mA=1 mW. For a four-channel optical module with a total power of 3.5 W, the amount of energy saved is (651)*4=256 mW, or 7.3%, which is significant.

(38) In order to decrease P2, V.sub.drop must be decreased, Embodiments of the present disclosure may provide a V.sub.drop feedback control loop to keep V.sub.drop within a predetermined target range, so that the power of the adjustable power supply is minimized under the precondition that the APD operates normally.

(39) The target value V.sub.drop0 for V.sub.drop is usually determined based on the limit that can be reached by the control circuit (e.g., the minimum voltage drop for the emitter follower) in order to minimize power wasted.

(40) The mechanism of the V.sub.drop control loop is: Based on the difference between current V.sub.drop and its target value V.sub.drop0, a control value is obtained from a predetermined control logic; at the same time, the voltage V.sub.0 of the adjustable power supply and V.sub.drop are increased or decreased to maintain V.sub.0V.sub.drop stable; thus, according to Formula 4, V.sub.apd remains unchanged.

(41) As shown in FIG. 1a, the adjustable power supply 15 is usually a DC/DC step-up circuit, whose output voltage V.sub.0 is determined by the control voltage V.sub.0set, i.e.,
V.sub.0=V.sub.0set*A(12)
where A is the fixed gain of the step-up circuit.

(42) In order to control V.sub.drop, a bias setting signal V.sub.set may be introduced. The V.sub.set signal influences V.sub.drop independent from the photocurrent intensity feedback signal V.sub.fb, i.e.,
V.sub.drop=func(V.sub.fb)+B*(V.sub.setV.sub.ref)(13)
where V.sub.ref is the reference signal and B is the gain from V.sub.set to V.sub.drop.

(43) In applications where the power consumption does not need to be optimized for the power supply, V.sub.set can be fixed at V.sub.ref. However, in a low-power APD bias controller, V.sub.set can be adjusted relative to V.sub.ref in order to increase or decrease V.sub.drop. The range of change for V.sub.set is set at 0-2V.sub.ref, and a gain B is chosen so that B*V.sub.ref is no smaller than the maximum value of func(V.sub.fb), i.e.,
B>=max(func(V.sub.fb))/V.sub.ref(14)
Thus V.sub.drop can be decreased to 0 or below through V.sub.set under any V.sub.fb.

(44) FIG. 1c shows a logic block diagram for the V.sub.drop control loop, which has the following operating principles: 1) Acquire V.sub.fb, and calculate V.sub.drop according to Formula 13; or acquire V.sub.drop directly. 2) Calculate the error by deducting the current V.sub.drop from the target voltage drop V.sub.drop0. 3) Generate the control signal V from the integrator by integrating the error. 4) Generate V.sub.set and V.sub.0set by superposing the control signal V to the initial value of V.sub.set, V.sub.set0, and to the initial value of V.sub.0set, V.sub.0set0, in respective corresponding proportions, i.e.,
V.sub.set=V.sub.set0+V,(15)
V.sub.0set=V.sub.0set0+V*B/A(16)

(45) Based on the logic above and according to Formulas 12 and 13,
V.sub.drop=func(V.sub.fb)+B*(V.sub.set0+VV.sub.ref)(17)
V.sub.0=V.sub.0set*A+V*B(18)
V.sub.0V.sub.drop=V.sub.0set0*AB*(V.sub.set0V.sub.ref)func(V.sub.fb)(19)
No association exists between V.sub.0V.sub.drop and V.

(46) As the purpose of the V.sub.drop control loop is to reduce the power consumed when the module is operating in a steady state, an appropriate integral time constant can be selected for the integrator so that the closed loop response time constant of the control loop is relatively large, e.g., 0.1 second-several seconds.

(47) In one embodiment, an interval for the voltage drop V.sub.drop, i.e., [V.sub.drop0_min, V.sub.drop0_max], can be set around the target value V.sub.drop0 and the range can be used to determine if the adjustable power supply is in an overvoltage state (expressed as logic high for the logic signal HighV.sub.0) or undervoltage state (expressed as logic high for the logic signal LowV.sub.0). For example, V.sub.drop0_min can be set to be between the minimum voltage drop V.sub.drop.sub._extreme that can be achieved by the control circuit and V.sub.drop0, and set V.sub.drop.sub._max to be slightly higher than V.sub.drop0, i.e.,
V.sub.drop.sub._extreme<=V.sub.drop.sub._min<=V.sub.drop0(20)
V.sub.drop.sub._max>=V.sub.drop0(21)

(48) As shown in FIG. 1c, when the optical power and photocurrent intensity feedback signal V.sub.fb increase, V.sub.drop can be higher than V.sub.drop0_max, and Comparator 1 generates an output of logic high for the logic signal HighV.sub.0, indicating that the adjustable power supply is in an overvoltage state at this time; power consumption can be reduced by decreasing V.sub.0 and V.sub.drop. Conversely, when the optical power and V.sub.fb decrease, V.sub.drop can be lower than V.sub.drop0_min, and Comparator 2 generates an output of logic high for the logic signal LowV.sub.0, indicating that the adjustable power supply is in an undervoltage state, where the power supply voltage cannot meet the voltage needed for the normal APD bias voltage at the current optical input power and V.sub.0 and V.sub.drop need to be increased to prevent the circuit going into the cut-off mode.

(49) When the photocurrent intensity voltage V.sub.fb continues to decreasing, such that the V.sub.drop computed based on Formula 12 is lower than V.sub.drop0_extreme, the control circuit enters the cut-off mode. In the cut-off mode, due to the physical limitation of the control circuit, the actual voltage drop no longer changes with the V.sub.set. Instead, the actual voltage drop stays at V.sub.drop0_extreme, and the APD bias voltage V.sub.apd only changes with the V.sub.0. Meanwhile, the integrator in V.sub.drop control loop gradually increases the V. On one hand, the increase of the V causes the V.sub.0set and V.sub.0, and thus the V.sub.apd, to increase. On the other hand, the increase of the V causes the V.sub.set to increase, and therefore the control circuit can gradually leave from the cut-off mode and the voltage drop V.sub.drop can re-enter the predetermined target range.

(50) Now an example is provided to illustrate the embodiment described above.

Embodiment 2

(51) Using the same APD characteristic parameters and circuit parameters in Embodiment 1, and let the sensitivity target be 3.8 uW and func(x) be a linear increasing function determined by Formula 5, i.e., func(V.sub.fb)=16 k*I.sub.apd+0.5, and let B=32, V.sub.set0=V.sub.ref=+1.25V, A=32, V.sub.0set0=V.sub.0/A=1.25V. Further, let V.sub.drop0=0.82V, V.sub.drop.sub._min=V.sub.drop.sub._extreme=0.5V, V.sub.drop.sub._max=1.14V. Below is a description of the operating mode of the V.sub.drop control loop when the optical input power increases from the sensitivity point of 3.8 uW (corresponding I.sub.apd=40 uA) to +1.94 mW (corresponding I.sub.apd=2 mA).

(52) According to calculations in Embodiment 1, when the optical input power is 3.8 uW and V.sub.drop is not controlled, according to the load line and characteristic curve shown in FIG. 1b, I.sub.apd=40 uA, V.sub.apd=38.06V, V.sub.drop=1.14V. After the V.sub.drop control loop is enabled, because V.sub.drop is greater than its target value 0.82V, the error integrator will increase V gradually in the negative direction until V=(0.821.14)/B=0.32/32=0.01V, thus
V.sub.set=1.25+(0.01)=1.24V (according to Formula 15)
V.sub.0set=1.25+(0.01)*32/32=1.24V (according to Formula 16)
V.sub.drop=16 k*40 uA+0.5+32*(1.250.011.25)=0.82V (according to Formula 17)
V.sub.0=1.25*32+32*(0.01)=39.68V (according to Formula 18)
V.sub.0V.sub.drop=38.06.

(53) When the optical power rapidly increases to +1.944 mW, I.sub.apd, V.sub.fb, and V.sub.drop will all rapidly increase before the control loop can play a significant role, until I.sub.apd reaches 2 mA. At this time,
V.sub.drop=16 k*2 mA+0.5+32*(1.241.25)=32.18V(Formula 17)
V.sub.0V.sub.drop=39.6832.18=7.5V;

(54) V.sub.apd=7.50.8=6.7V, which falls on the APD characteristic curve as shown in Formula 9. Then the V.sub.drop control loop begins to operate and the integrator continues to increase V in the negative direction until V=0.01+(0.8232.18)/32=0.99V, thus
V.sub.set=1.250.99=0.26V.
V.sub.0set=1.25+(0.99)*32/32=0.26V
V.sub.drop=16 k*2 mA+0.5+32*(0.261.25)=0.82V, which reaches the target value;
V.sub.0=1.25*32+32*(0.99)=8.32V.
V.sub.0V.sub.drop=7.5V, which remains the same.

(55) It should be noted that the characteristics of the APD component changes with the operating temperature T. When the temperature increases, V.sub.br increases as well. If at this time the bias voltage V.sub.apd remains the same, M will decrease; to make sure the value of M remains the same, the APD bias voltage should be increased accordingly as the temperature increases. When the temperature decreases, V.sub.br decreases as well. If at this time the bias voltage V.sub.apd remains the same, M will increase; to make sure the value of M remains the same, the APD bias voltage should be decreased accordingly as the temperature decreases. Therefore, the APD bias controller generally has a temperature compensation function.

(56) Referencing to FIG. 1c, an embodiment of the APD bias controller with temperature compensation function is described. This is realized through determining in advance the set initial value V.sub.0set0 of the adjustable power supply voltage as a function of the temperature and the set initial value V.sub.set0 of the voltage as a function of the temperature, i.e. V.sub.0set0(T) and V.sub.set0(T).

(57) Under a given temperature T0, V.sub.0set0 and V.sub.set0 can be calibrated with the following method: 1) Fix the optical input power Pin of the APD receiver to a value that is close to its sensitivity target, 2) Set V.sub.set=V.sub.ref, gradually increase V.sub.0set and at the same time monitor the output bit error rate of the APD receiver. Record the value of V.sub.0set at the point where the lowest bit error rate is achieved as V.sub.0set_opt. 3) Acquire V.sub.fb at the optimal sensitivity point and record it as V.sub.fb.sub._opt. Then calculate the value of V.sub.drop at this point according to Formula 13, recorded as V.sub.drop.sub._opt=func(V.sub.fb.sub._opt). 4) Compare V.sub.drop.sub._opt and V.sub.drop0 for the purpose of adjusting V.sub.0set0 and V.sub.set0, i.e.,
V.sub.0set0(T0)=V.sub.0set_opt+[V.sub.drop0V.sub.drop.sub._opt]/A,
V.sub.set0(T0)=V.sub.ref+[V.sub.drop0V.sub.dropopt]/B.

(58) V.sub.0set0 and V.sub.set0 obtained from the calibration above can ensure that the sensitivity of the APD at temperature T0 is optimal and the initial V.sub.drop equals its target value.

(59) In general, a number of temperature points within the APD operating temperature range (generally including at least the lowest temperature Tmin, the highest operating temperature Tmax, and a typical middle temperature T0) are selected and calibrated with the procedure described above to obtain the corresponding V.sub.0set0 and V.sub.set0 at each temperature point. Then with piecewise linear interpolation or polynomial fitting, a curve showing the relationship between V.sub.0set0 and the temperature T and a curve showing the relationship between V.sub.set0 and the temperature T can be determined. Based on these curves, parameters can be set for the initial values of the temperature compensation circuit; or, the curves can be saved into the memory of a microprocessor for use in the temperature compensation algorithm.

(60) As shown in FIG. 1c, the mechanism for V.sub.drop control with temperature compensation is built on top of the mechanism for V.sub.drop control without temperature compensation as described above, with the addition of temperature acquisition as well as the determination of V.sub.0set0 and V.sub.set0 under the current temperature based on preset functions V.sub.0set0(T) and V.sub.set0(T). Below is a summary of the mechanism: 1) Acquire the current APD operating temperature T; 2) Obtain V.sub.0set0 and V.sub.set0 based on preset functions V.sub.0set(T) and V.sub.set0(T); 3) Acquire V.sub.fb, and calculate V.sub.drop according to Formula 13; or acquire V.sub.drop directly; 4) Calculate the error by deducting the current V.sub.drop from the target voltage drop V.sub.drop0. 5) Generate the control signal V from the integrator by integrating the error. 6) Generate V.sub.set and V.sub.0set by superposing the control signal V to the initial value V.sub.set0 of V.sub.set and initial value V.sub.0set0 of V.sub.0set in respective corresponding proportions.

(61) It should also be noted that the response speed of V.sub.drop to the photocurrent I.sub.apd and photocurrent intensity signal V.sub.fb should be set in the microsecond order of magnitude in order to achieve APD overload protection. However, the purpose of the V.sub.drop control loop is to reduce power consumption, plus the response speed of the DC/DC step-up circuit is limited in general (usually in the millisecond order of magnitude), thus the response speed T1 of the V.sub.drop control loop to V.sub.fb is generally set at the hundred millisecond order of magnitude or slower. When the adjustable power supply is in an undervoltage state, within the time 1, the APD bias voltage V.sub.apd is lower than the expected operating point, which may cause the signal-to-noise ratio to decrease, reducing the performance of high-speed signal transmission. Under normal conditions, if undervoltage occurs in testing or when the optical fiber link suffers an abnormal impact, the link experiences temporary degradation and recovers, which can still meet the requirement of actual applications. If it is required that the link maintains high performance within the time 1, a more rapid dynamic response from V.sub.apd will be required.

(62) In order to improve the high-speed transmission performance within the time 1, embodiments of the present disclosure may also provide high-speed dynamic response. As shown in FIG. 1a, this is accomplished by the auxiliary power supply 16 and the power supply switchover unit 17. The auxiliary power supply circuit is configured as follows: a) When the adjustable power supply is in an undervoltage state, the auxiliary power supply can provide the bias voltage needed by the APD for normal operation either independently or as an assistance to the adjustable power supply; b) When the adjustable power supply is out of the undervoltage state, the power supply circuit that the auxiliary power supply powers the APD is disconnected, but the auxiliary power supply maintains its output voltage in a standby state, and its power consumption is low because there is no load current.

(63) In one embodiment, the output voltage V2 of the auxiliary power supply 16 can be set based on the output voltage of the adjustable power supply and the setting of the initial value of the voltage in the current temperature, and the output voltage V2 changes as the temperature changes, i.e.,
V2(T)=V.sub.0set0(T)*AB*(V.sub.set0(T)V.sub.ref)C(22a)
or V2(T)=V.sub.0set_opt(T)C(22b)

(64) where A is the gain of the adjustable power supply, B is the gain from V.sub.set to V.sub.drop, C is a constant, V.sub.ref is the reference voltage, T is the APD's operating temperature, and V.sub.0set_opt is the value set for V.sub.0 corresponding to the optimal sensitivity point when V.sub.set0=V.sub.ref according to the calibration steps described before. V2 is set to change only with a change in temperature T and not influenced by V.sub.fb or V.sub.set. The operating principle is described below.

(65) To support the normal operation of the auxiliary power supply and on/off switch, the output stage of the photocurrent feedback APD bias controller 12 can be configured as a emitter follower bipolar junction transistor (BJT; with the collector terminal connected to V.sub.0, the emitter terminal connected to the load, and the base terminal connected to the control voltage). In this way, the output end of the photocurrent feedback APD bias controller 12 is connected directly to the output end of the power supply switchover unit 17, forming a dual-source power supply circuit that provides bias voltage to the APD. Based on the value of V.sub.drop, the dual-source power supply circuit has the following operating states: State 1: V.sub.drop>=V.sub.drop0_min. Now LowV.sub.0 is invalid, and the auxiliary power supply is off. The emitter follower BJT is turned on, and the APD's bias voltage is solely determined by the bias controller 12, i.e.,
V.sub.apd1=(V.sub.0V2V.sub.in)V.sub.drop(23) State 2: V.sub.drop<V.sub.drop0_min. Now LowV.sub.0 is valid, the N-channel MOS transistor Q3 and P-channel MOS transistor Q2 are turned on, the auxiliary power supply is connected, and the auxiliary power supply provides the bias voltage and operating current to the APD through the serially connected resistor R3. The load line function of the auxiliary power supply V2 and R3 is defined as follows:
V.sub.apd2=(V2V.sub.sV.sub.in)I.sub.apd*R3(24)

(66) Thus, based on the value of photocurrent I.sub.apd, there are two substates for State 2: State 2.1: V.sub.apd2<V.sub.apd1. Now the emitter follower BJT is turned on, the APD bias voltage V.sub.apd=V.sub.apd1, but the operating current of the APD is provided by both power supplies simultaneously. State 2.2: V.sub.apd2>=V.sub.apd1. Now the emitter follower BJT is turned off, the APD bias voltage V.sub.apd=V.sub.apd2, and the operating current is provided solely by the auxiliary power supply.

(67) When switching over between State 1 and State 2, if V.sub.apd1 and V.sub.apd2 are not the same, the APD bias voltage may experience a transient change. To avoid any disruption of high-frequency transmission performance caused by instantaneous jump, on the one hand, a capacitor C1 can be configured as shown in FIG. 1a, which is connected between the dual-source power supply output end and the signal ground, and the values of C1, R3, and Rs can be set in a reasonable way to set the switchover time at the required value, e.g., the 100 us order of magnitude. On the other hand, the output voltage of the auxiliary power source can be reasonably set so that V.sub.apd1 equals V.sub.apd2 when the switchover between State 1 and State 2 takes place (i.e., when V.sub.drop=V.sub.drop0_min). According to Formulas 17, 19, 23, and 24, V2I.sub.apd*R3=V.sub.0V.sub.drop=V.sub.0set0*AB*(V.sub.set0V.sub.ref)func(V.sub.fb), or
V2=V.sub.0set0*AB*(V.sub.set0V.sub.ref)(func(V.sub.fb)I.sub.apd*R3)(25)

(68) According to Formula 25, if R3 is reasonably configured so that func(V.sub.fb)I.sub.apd*R3 remains largely unchanged or a constant C in the operating range of the photocurrent, then Formula 25 has the same form of Formula 22a, and the auxiliary power supply voltage can be set based on the initial value V.sub.0set0 of the adjustable power supply output voltage and the set initial value V.sub.set0 of the voltage, in order to stabilize the APD voltage when the auxiliary power supply switchover occurs.

(69) An example is provided below to illustrate the power supply switchover process.

Embodiment 3

(70) Let the APD characteristic parameters, circuit parameters, and V.sub.drop function be the same as in Embodiment 2. Set R3=16 k ohm, according to the calibration steps described before and Formulas 22 and 25, V.sub.0set_opt=1.25V, C=0.5V, V2=400.5=39.5V. Further, let the stabilization time of the V.sub.drop control loop be approximately 500 ms, the current optical input power Pin=1.95 mW, I.sub.apd stabilized at 2 mA, V.sub.drop control loop stabilized, V.sub.drop=0.82V, V.sub.0=8.32V. The table below describes the process of change in the circuit's operating state when the optical power decreases to the sensitivity point Pin=3.8 uW within 10 us.

(71) TABLE-US-00001 TABLE 1 State of load State of dual-source State of control Time Optical power State of APD circuit power supply loop 0 1.95 mW I.sub.apd = 2 mA, V.sub.0 = 8.32 V, State 1, LowV.sub.0 = 0, V.sub.apd = 6.8 V, V.sub.drop = 0.82 V V2 = 39.5 V, V = 0.99, M = 1.029 V.sub.apd1 = 7.82 V V.sub.set = 0.26, Continues 1.918 mW I.sub.apd = 1.98 mA, V.sub.0 remains the Seamless switchover LowV.sub.0 = 1, V.sub.apd = 7.02 V, same V.sub.drop = into State 2.2, V, V.sub.set M = 1.032 0.5 V V.sub.apd1 = 7.82, slightly increase V.sub.apd2 = 7.82, Continues Continues I.sub.apd decreases, V.sub.drop stops Remains in State 2.2, Same as above to decrease V.sub.apd and M at 0.5 V V.sub.apd2 increases increase 10 us 3.8 uW I.sub.apd = 40 uA, Same as above Remains in State 2.2, Same as above V.sub.apd = 38.06, V.sub.apd1 = 7.82, M = 10.57, V.sub.apd2 = 38.86 Continues Remains Remains V.sub.0 continues Remains in State 2.2, V, V.sub.set the same the same to increase, V.sub.apd1 continues to continue to V.sub.drop = 0.5 increase, V.sub.apd2 increase remains the same Approaches Remains Remains V.sub.0 = 39.36, Seamless switchover LowV.sub.0 = 0, 500 ms the same the same V.sub.drop = 0.5 into State 1, V = 0.02, V.sub.apd1 = 38.86 V.sub.set = 1.23 500 ms Remains Remains V.sub.0 = 39.68, Remains V = 0.01, the same the same V.sub.drop = 0.82 the same V.sub.set = 1.24 Continues Remains Stabilized Stabilized Stabilized Stabilized the same and same and same and same and same as above as above as above as above

(72) With the APD bias control method provided by embodiments of the present disclosure, hardware circuits or software algorithms or a combination of both can be conveniently employed in the design of the APD bias controller and bias voltage adjusting device.

(73) FIG. 2 shows a structural block diagram for the low-power APD bias controller.

(74) Low-power APD bias controller 21 includes a bias voltage generating unit 22, which uses an external photocurrent intensity feedback signal V.sub.fb to generate a bias voltage V.sub.bias that determines the output voltage drop, i.e., the voltage drop V.sub.drop between the voltage V.sub.0 of the adjustable power supply and the output voltage V.sub.out (V.sub.drop=V.sub.0V.sub.out), which in turn determines the APD bias voltage V.sub.apd. In addition, a second voltage (V.sub.2nd in FIG. 3a) that corresponds to the voltage drop signal V.sub.drop is generated within the unit, and the second voltage is compared to one or more reference voltages (e.g., V.sub.ref, V.sub.ref2 in FIG. 3a) to determine whether the voltage drop is within the target interval V.sub.drop.sub._minV.sub.drop.sub._max, based on which an undervoltage or overvoltage indicator (i.e., LowV.sub.0, HighV.sub.0 in FIG. 3a) is generated to indicate whether the current voltage V.sub.0 of the adjustable power supply is too low or too high.

(75) Bias voltage generating unit 22 has three input signals: the photocurrent intensity feedback signal V.sub.fb, the bias setting signal V.sub.set, and the adjustable power supply voltage V.sub.0; and three output signals: the bias voltage V.sub.bias, the undervoltage state indicator LowV.sub.0, and the overvoltage state indicator HighV.sub.0. At the same time, input information V.sub.fb and V.sub.set are used to determine whether there is undervoltage or overvoltage, and corresponding output is generated, i.e., the undervoltage state indicator LowV.sub.0 and overvoltage state indicator HighV.sub.0; and V.sub.0 serves as an input for the bias voltage generating unit 22 to generate the bias voltage V.sub.bias, which is an input for a voltage follower unit 23 that determines the level of the load voltage V.sub.out based on this signal. The voltage follower unit 23 also receives input from the adjustable power supply V.sub.0, which supplies the operating power for the unit. In addition, the bias setting V.sub.set may be preferable in embodiments of the present disclosure, and the bias setting signal is used to set the levels of the bias voltage V.sub.bias and voltage drop signal V.sub.drop, independent from the photocurrent intensity feedback signal. The purpose of the bias setting signal is, on the one hand, achieving precise setting of each APD bias voltage for optimum sensitivity, and on the other hand achieving low power consumption through adjusting the APD power supply voltage and voltage drop V.sub.drop. In applications where low-power adjustment and precise setting of the voltage drop are not required, the bias setting signal may not be needed.

(76) Low-power APD bias controller 21 also includes a voltage follower unit 23, which is used to make the load voltage change as the input voltage changes. It comprises a first port that can be connected to the adjustable power supply V.sub.0, a second port that is used to provide the output voltage V.sub.out to the APD load circuit, and a third bias voltage V.sub.bias input port. The purpose of the voltage follower unit 23 is to make the output voltage V.sub.out change as the input voltage changes, i.e., V.sub.out=V.sub.biasV.sub.err, where V.sub.err is the fixed tracking error. For example, in the case where a PNP BJT is used for the output stage, V.sub.err is the voltage drop V.sub.be between the base terminal b and the emitter terminal e, usually 0.5V.

(77) FIG. 3a shows a realization block diagram for the bias voltage generating unit with bias setting signal. The generation of the bias voltage as well as the generation of the undervoltage and overvoltage indicator signals are described in detail below. The two input signals in the figure are the bias set value V.sub.set and the photocurrent intensity feedback signal V.sub.fb, respectively, wherein the voltage of the second voltage V.sub.2nd in the figure is:
V.sub.2nd=V.sub.fb+V.sub.set

(78) Thus:

(79) $V_{\mathrm{bias}}=V_0-\left(V_{2\mathrm{nd}}-V_{\mathrm{ref}}\right)K=V_0-\left(V_{\mathrm{fb}}+V_{\mathrm{set}}-V_{\mathrm{ref}}\right)K$$V_{\mathrm{out}}=V_0-\left(K*V_{\mathrm{fb}}+K*\left(V_{\mathrm{set}}-V_{\mathrm{ref}}\right)+V_{\mathrm{err}}\right)$$V_{\mathrm{drop}}=V_0-V_{\mathrm{out}}=K*V_{\mathrm{fb}}+V_{\mathrm{err}}+K*\left(V_{\mathrm{set}}-V_{\mathrm{ref}}\right)=K*\left(V_{2\mathrm{nd}}-V_{\mathrm{ref}}\right)+V_{\mathrm{err}}$

(80) Compared to Formulas 8 and 13, the function V.sub.drop has the same form.

(81) The undervoltage state indicator LowV.sub.0 is obtained by comparing the second voltage V.sub.2nd with the reference voltage V.sub.ref through Comparator 1. A low-threshold reference voltage V.sub.ref is set; if the value of the second voltage V.sub.2nd is lower than V.sub.ref, the undervoltage state indicator signal LowV.sub.0 is generated as an output. Now the difference between V.sub.drop and its lower target limit V.sub.drop.sub._min=V.sub.err.

(82) The overvoltage state indicator HighV.sub.0 is obtained by comparing the second voltage V.sub.2nd with the reference voltage V.sub.ref2 through Comparator 2. A high-threshold reference voltage V.sub.ref2 is set, V.sub.ref2>V.sub.ref; if the value of the second voltage V.sub.2nd is higher than V.sub.ref, the overvoltage state indicator signal HighV.sub.0 is generated as an output. Now the difference between V.sub.drop and its upper target limit V.sub.drop.sub._max=K*(V.sub.ref2V.sub.ref)+V.sub.err.

(83) Optionally, the bias voltage can be set through the photocurrent intensity feedback V.sub.fb only, without the input of a separate bias setting signal V.sub.set, as shown in FIG. 3b.

(84) FIG. 3b shows a realization block diagram of the bias voltage generating unit without bias voltage setting. This figure is similar to FIG. 3a except that the V.sub.set signal in FIG. 3a is fixed at V. In FIG. 3b, the only input signal is the photocurrent intensity feedback V.sub.fb.

(85) The following can be easily derived:
V.sub.2nd=V.sub.fb+V.sub.ref,
V.sub.bias=V.sub.0K*V.sub.fb,
V.sub.out=V.sub.0K*V.sub.fbV.sub.err,
V.sub.drop=K*V.sub.fb+V.sub.err=K*(V.sub.2ndV.sub.ref)+V.sub.err,

(86) The overvoltage state indicator High V.sub.0 is obtained by comparing the voltage V.sub.2nd with the reference voltage V.sub.ref2 through Comparator 2. A high-threshold reference voltage V.sub.ref2 is set, V.sub.ref2>V.sub.ref; if the value of V.sub.2nd is higher than V.sub.ref, the overvoltage state indicator signal High V.sub.0 is generated as an output. Now the difference between V.sub.drop and its upper target limit V.sub.drop.sub._max=K*(V.sub.ref2V.sub.ref)+V.sub.err.

(87) FIG. 3c shows a circuit diagram for an embodiment of the photocurrent APD feedback bias controller according to embodiments of the present disclosure. A detailed description is provided below in an embodiment. In this figure, input signals include the bias setting signal V.sub.set (0-+2.5V), the photocurrent intensity feedback V.sub.fb (0-+1.25V), the baseline voltage input 3.3V, and power supply V.sub.0. According to the circuit in the figure, we can obtain the following:

(88) Resistor R100 and voltage regulator D form a 1.27V voltage regulator circuit, and a 1.25V reference voltage is generated with voltage dividers R101 and R102, thus:

(89) The low-threshold reference voltage V.sub.ref=1.25V; and

(90) The high-threshold reference voltage V.sub.ref2=1.27V.

(91) Operational amplifier Opamp1 and resistors R12, R13, R14, and R15 form an adder, thus:
V.sub.2nd=V.sub.fb+V.sub.set.

(92) Operational amplifier Opamp3 and PNP BJT Q1 form a V/I converter, and the current through resistors R0 and R1 is approximately equal, thus:

(93) When V.sub.2nd>=1.25V, V.sub.bias=V.sub.0(V.sub.2ndV.sub.ref)*R1/R0, according to the resistance as shown, K=R1/R0=16K/0.5K=32;

(94) When V.sub.2nd<1.25V, Q1 is turned off, V.sub.bias=V.sub.0

(95) The voltage follower unit is realized through PNP BJT Q0, whose output voltage is:

(96) V.sub.out=V.sub.biasV.sub.be, where V.sub.be is the voltage difference between the base terminal and emitter terminal of Q0 and can be considered as a constant; let V.sub.be be 0.5V, V.sub.out changes as V.sub.bias changes.

(97) Further:

(98) $\begin{array}{c}{V}_{\mathrm{drop}}=V_0-V_{\mathrm{out}}\\ =\{\begin{array}{cc}\mathrm{Vfb}*32+0.5+\left(\mathrm{Vset}-1.25\right)*32,& \left(V2\mathrm{nd}1.25V\right)\\ 0.5,& \left(V2\mathrm{nd}<1.25V\right)\end{array},\end{array}$

(99) Comparator 1 compares signal V.sub.2nd with the reference voltage V.sub.ref to generate LowV.sub.0. When V.sub.2nd<1.25V, LowV.sub.0 is valid, and the lower limit of the target V.sub.drop applies, i.e., V.sub.drop.sub._min=V.sub.be=0.5V.

(100) Comparator 2 compares signal V.sub.2nd with the reference voltage V.sub.ref2 to generate High V.sub.0. When V.sub.2nd>1.27V, High V.sub.0 is valid, and the upper limit of the target V.sub.drop applies, i.e., V.sub.drop.sub._max=(1.271.25)*32+V.sub.be=1.14V.

(101) Compared to Embodiment 2 described above, the func(x), V.sub.drop function, and its target interval are the same, i.e., func(x)=32*V.sub.fb+0.5, while V.sub.drop is as described above.

(102) Below is a description of an embodiment of the bias voltage adjusting device employing the APD bias control method described above.

(103) FIG. 4a shows a digital circuit diagram for the low-power APD bias voltage adjusting device with temperature compensation, including: 1) An internally-placed temperature sensor and corresponding analog-to-digital converter (ADC) for the acquisition of the current operating temperature T for the APD. 2) An internally placed memory, comprising a temperature compensation table LUT and variables table. The temperature compensation LUT is used to store the initial value V.sub.0set0(T) of the power supply voltage setting signal and initial value V.sub.set0(T) of the bias setting signal when the temperature T takes different values. The variables table is used to store operating variables, such as the current APD operating temperature T, current bias setting signal deviation V, integration step-length Step, ratio of gains G (i.e. B/A in Formula 16). 3) A digital I/O interface, for the acquisition of overvoltage indicator signal High V.sub.0 and undervoltage indicator signal LowV.sub.0. 4) A digital-to-analog converter (DAC), for outputting the current power supply voltage setting signal V.sub.0set and bias setting signal V.sub.set. 5) Signal processing logic, for the low-power bias voltage adjustment algorithm with temperature compensation.

(104) FIG. 4b shows a flowchart for the low-power APD bias voltage adjustment algorithm with temperature compensation. Initially, set V=0, and set step=(V.sub.drop.sub._maxV.sub.drop.sub._min)/(2*B) based on the target range for V.sub.drop, where B is the gain from V.sub.set to V.sub.drop. Then enter the following loop: At Step 1 (S1), acquire the current temperature and save the result into the temperature variable. At Step 2 (S2), calculate the initial value V.sub.0set0 of the power supply voltage setting signal and the initial value V.sub.set0 of the bias setting signal based on the value of the temperature variable and the temperature compensation LUT. At Step 3 (S3), acquire the undervoltage indicator signal LowV.sub.0. At Step 4 (S4), determine whether LowV.sub.0 is valid. If LowV.sub.0 is valid, i.e. the output is logic high, then go to step 5 (S5). Otherwise, go to Step 6 (S6). At Step 5 (S5), update V=V+step, and proceed to Step 9 (S9). At Step 6 (S6), acquire the overvoltage indicator signal HighV.sub.0, and proceed to Step 7 (S7). At Step 7 (S7), determine whether the overvoltage indicator signal HighV.sub.0 is valid. If HighV.sub.0 is valid, i.e., HighV.sub.0 is logic high, then go to Step 8 (S8). Otherwise, go to Step 10 (S10). At Step 8 (S8), update V=V step, and proceed to Step 9 (S9). At Step 9 (S9), simultaneously update DAC0 and DAC, DAC0=V.sub.0set0+G*V, and DAC=V.sub.set0+V, and proceed to Step 10 (S10). At Step 10 (S10), time delay. Then go to Step 1 (S1).

(105) Multiple low-power APD bias controllers based on embodiments of the present disclosure may be suited to be integrated, for example, into the same integrated circuit (IC), to provide bias control for multiple APDs, and to provide overload protection, independent precise bias setting, low power within the entire range of optical receiving power, fast response, temperature compensation, and other functions to multiple APDs.

(106) As shown in FIG. 1a, the APD bias controller 12 and bias voltage adjusting unit 13, adjustable power supply 15, power supply switchover unit 17, auxiliary power supply 16, photocurrent detecting unit 18 can be independent from one another, or integrated into a whole to form a complete APD bias controller. The APD bias controller, APD, and TIA can be packaged together to form a complete APD photoelectric receiver, whose operating principle is as described above and the details will not be repeated here.

(107) It should be understood that despite the descriptions of embodiments, there is not only one independent technical design for each embodiment. The disclosure is written simply for the purpose of clarity. Technical personnel in the field should treat the disclosure as a whole. The technical designs in various embodiments may be combined in appropriate ways to form other embodiments that can be understood by technical personnel in the field.

(108) The series of detailed descriptions above are only intended to provide specific descriptions of feasible embodiments. The detailed descriptions are not to be construed as limiting the scope of protection for the disclosure. All equivalent embodiments or changes that are not detached from the techniques of the disclosure in essence should fall under the scope of protection of the disclosure.