Three phase converting device and method for estimating capacitance

Abstract

A method for estimating capacitance applied to a three phase converting device is disclosed. The three phase converting device includes a three phase converter and a processor. The processor executes following steps: (a) outputting a non-baseband signal to the three phase converter, such that a bus voltage of the three phase converter generates a non-baseband flutter; (b) obtaining the bus voltage of the three phase converter; (c) obtaining a bus voltage estimating value based on the bus voltage, a bus capacitance estimating value, an input power, and an output power of the three phase converter; (d) respectively outputting a first AC component and a second AC component corresponding to the non-baseband flutter through filtering the bus voltage and the bus voltage estimating value by a filter segment; (e) estimating a bus capacitance based on the first AC component, the second AC component and a bus capacitance initial value.

Claims

1. A method for estimating capacitance applied to a three phase converting device, wherein the three phase converting device comprises a three phase converter and a processor, and the processor is configured to execute the following steps: (a): outputting a non-baseband signal to the three phase converter, such that a bus voltage of the three phase converter generates a non-baseband flutter; (b): obtaining the bus voltage of the three phase converter; (c): obtaining a bus voltage estimating value based on the bus voltage, a bus capacitance estimating value, an input power, and an output power of the three phase converter; (d): respectively outputting a first AC component and a second AC component corresponding to the non-baseband flutter through filtering the bus voltage and the bus voltage estimating value by a filter segment; and (e): estimating a bus capacitance based on the first AC component, the second AC component, and a bus capacitance initial value.

2. The method for estimating capacitance of claim 1, wherein in step (a), the non-baseband signal is a double frequency signal, such that the bus voltage generates a double frequency flutter.

3. The method for estimating capacitance of claim 1, wherein step (c) comprises: step (c1): performing a closed-loop control on the bus voltage estimating value, such that a difference between the bus voltage and the bus voltage estimating value is regulated and is then multiplied by the bus capacitance estimating value to obtain the input power; step (c2): calculating the output power based on an output voltage and an output current of the three phase converter, and subtracting the output power from the input power to obtain a power of the bus capacitor; and step (c3): calculating the bus voltage estimating value based on the power of the bus capacitor, the bus capacitance estimating value, and an average of the bus voltage.

4. The method for estimating capacitance of claim 3, wherein the filter segment comprises a first bandpass filter module configured to output the first AC component and a second bandpass filter module configured to output the second AC component, wherein the first AC component is related to the bus voltage, and the second AC component is related to the bus voltage estimating value.

5. The method for estimating capacitance of claim 4, wherein both the first bandpass filter module and the second bandpass filter module are biquadratic bandpass filters, and both the first AC component and the second AC component are double frequency AC components.

6. The method for estimating capacitance of claim 5, wherein step (e) comprises: step (e1): acquiring a peak value of the first AC component and a peak value of the second AC component, and performing an inverse operation on the peak values to respectively obtain a first signal and a second signal; step (e2): calculating a difference between the first signal and the second signal and regulating the difference so as to obtain a bus capacitance deviation value; and step (e3): adding the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

7. The method for estimating capacitance of claim 6, wherein the bus capacitance estimating value is updated in a real-time manner according to the estimated bus capacitance.

8. The method for estimating capacitance of claim 5, wherein the bus capacitance estimating value is the bus capacitance initial value.

9. The method for estimating capacitance of claim 8, wherein step (e) comprises: step (e1): acquiring a peak value of the first AC component and a peak value of the second AC component, and performing an inverse operation on the peak values to respectively obtain a first signal and a second signal; step (e2): calculating a difference between the first signal and the second signal, and performing a droop control on the difference to obtain a bus capacitance deviation value; and step (e3): adding the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

10. A three phase converting device comprising: a three phase converter, wherein a non-baseband signal is input to the three phase converter, such that a bus voltage of the three phase converter generates a non-baseband flutter; a bus voltage estimator configured to obtain the bus voltage of the three phase converter, and further configured to obtain a bus voltage estimating value based on the bus voltage, a bus capacitance estimating value, an input power, and an output power of the three phase converter; and a bus capacitance estimator configured to filter the bus voltage and the bus voltage estimating value to respectively output a first AC component and a second AC component corresponding to the non-baseband flutter, wherein the bus capacitance estimator is further configured to estimate a bus capacitance based on the first AC component, the second AC component, and a bus capacitance initial value.

11. The three phase converting device of claim 10, wherein the non-baseband signal is a double frequency signal, such that the bus voltage generates a double frequency flutter.

12. The three phase converting device of claim 10, wherein the bus voltage estimator is configured to perform a closed-loop control on the bus voltage estimating value, the bus voltage estimator comprises: a first logical module configured to obtain a difference between the bus voltage and the bus voltage estimating value; a first regulation module configured to regulate the difference between the bus voltage and the bus voltage estimating value to obtain a regulating signal; a bus capacitance acquisition module configured to multiply the regulating signal by the bus capacitance estimating value to obtain the input power; a second logical module configured to obtain the output power, and subtract the output power from the input power to obtain a power of the bus capacitor; and a bus voltage estimating module configured to calculate the bus voltage estimating value based on the power of the bus capacitor, the bus capacitance estimating value, and an average of the bus voltage.

13. The three phase converting device of claim 12, wherein the bus capacitance estimator comprises: a first bandpass filter module configured to output the first AC component; and a second bandpass filter module configured to output the second AC component; wherein the first AC component is related to the bus voltage, and the second AC component is related to the bus voltage estimating value.

14. The three phase converting device of claim 13, wherein both the first bandpass filter module and the second bandpass filter module are biquadratic bandpass filters, and both the first AC component and the second AC component are double frequency AC components.

15. The three phase converting device of claim 14, wherein the bus capacitance estimator further comprises: a peak value acquisition module configured to acquire a peak value of the first AC component and a peak value of the second AC component; an inverse operation module configured to perform an inverse operation on the peak values to respectively obtain a first signal and a second signal; a third logical module configured to calculate a difference between the first signal and the second signal; a second regulation module configured to regulate the difference between the first signal and the second signal to obtain a bus capacitance deviation value; and a fourth logical module configured to add the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

16. The three phase converting device of claim 15, wherein the bus capacitance estimating value is updated in a real-time manner according to the estimated bus capacitance.

17. The three phase converting device of claim 14, wherein the bus capacitance estimating value is the bus capacitance initial value.

18. The three phase converting device of claim 17, wherein the bus capacitance estimator further comprises: a peak value acquisition module configured to acquire a peak value of the first AC component and a peak value of the second AC component; an inverse operation module configured to perform an inverse operation on the peak values to respectively obtain a first signal and a second signal; a third logical module configured to calculate a difference between the first signal and the second signal; a droop control module configured to perform a droop control on the difference between the first signal and the second signal to obtain a bus capacitance deviation value; and a fourth logical module configured to add the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

(2) FIG. 1 depicts a schematic flowchart of a method for estimating capacitance according to one embodiment of the present disclosure;

(3) FIG. 2 depicts a schematic diagram of a three phase converting device according to one embodiment of the present disclosure;

(4) FIG. 3 depicts a control block diagram of part of a circuit of the three phase converting device in FIG. 2 according to another embodiment of the present disclosure;

(5) FIG. 4 depicts a control block diagram of part of a circuit of the three phase converting device in FIG. 2 according to still another embodiment of the present disclosure; and

(6) FIG. 5 depicts a control block diagram of part of a circuit of the three phase converting device in FIG. 2 according to yet another embodiment of the present disclosure.

(7) According to the usual mode of operation, various features and elements in the figures have not been drawn to scale, which are drawn to the best way to present specific features and elements related to the present disclosure. In addition, among the different figures, the same or similar elements symbols refer to similar elements/components.

DESCRIPTION OF THE EMBODIMENTS

(8) To make the contents of the present disclosure more thorough and complete, the following illustrative description is given with regard to the implementation aspects and embodiments of the present disclosure, which is not intended to limit the scope of the present disclosure. The features of the embodiments and the steps of the method and their sequences that constitute and implement the embodiments are described. However, other embodiments may be used to achieve the same or equivalent functions and step sequences.

(9) Unless otherwise defined herein, scientific and technical terminologies employed in the present disclosure shall have the meanings that are commonly understood and used by one of ordinary skill in the art. Unless otherwise required by context, it will be understood that singular terms shall include plural forms of the same and plural terms shall include the singular. Specifically, as used herein and in the claims, the singular forms a and an include the plural reference unless the context clearly indicates otherwise.

(10) As used herein, couple refers to direct physical contact or electrical contact or indirect physical contact or electrical contact between two or more elements. Or it can also refer to reciprocal operations or actions between two or more elements.

(11) FIG. 1 depicts a schematic flowchart of a method 100 for estimating capacitance according to one embodiment of the present disclosure. As shown in FIG. 1, the method 100 for estimating capacitance comprises the steps as follows:

(12) Step 110, outputting a non-baseband signal to a three phase converter, such that a bus voltage of the three phase converter generates a non-baseband flutter;

(13) Step 120, obtaining the bus voltage of the three phase converter;

(14) Step 130, obtaining a bus voltage estimating value based on the bus voltage, a bus capacitance estimating value, an input power, and an output power of the three phase converter;

(15) Step 140, respectively outputting a first alternating current (AC) component and a second AC component corresponding to the non-baseband flutter through filtering the bus voltage and the bus voltage estimating value by a filter segment; and

(16) Step 150, estimating a bus capacitance based on the first AC component, the second AC component, and a bus capacitance initial value.

(17) In order to facilitate the understanding of the steps of the method 100 for estimating capacitance, a description is provided with reference to FIG. 2. FIG. 2 depicts a schematic diagram of a three phase converting device 200 according to one embodiment of the present disclosure. As shown in FIG. 2, the three phase converting device 200 comprises a three phase converter 210, a bus voltage estimator 222, and a bus capacitance estimator 224. As for the structure, both the bus voltage estimator 222 and the bus capacitance estimator 224 are coupled to the three phase converter 210. In addition, the bus voltage estimator 222 and the bus capacitance estimator 224 are coupled to each other.

(18) Additionally, the three phase converter 210 comprises a grid side converter 231, an inductor-capacitor filter 232, an AC fuse 233, a grid side main connector 234, and a soft-start module 235. The inductor-capacitor filter 232 coupled to the grid side converter 231 is used for filtering an output of the grid side converter 231. The AC fuse 233 is coupled between the inductor-capacitor filter 232 and the grid side main connector 234. The grid side main connector 234 is used for connecting a grid. The soft-start module 235 is coupled to the grid side converter 231 and the inductor-capacitor filter 232.

(19) A description is provided with reference to step 110. The non-baseband signal is output to the three phase converter 210, such that the bus voltage of the three phase converter 210 generates the non-baseband flutter. In step 120, the bus voltage of the three phase converter 210 can be obtained by using the bus voltage estimator 222.

(20) In order to facilitate the understanding of step S130, a description is provided with reference to FIG. 3. FIG. 3 depicts a control block diagram of part of a circuit of the three phase converting device 200 in FIG. 2 according to another embodiment of the present disclosure. In step 130, a bus voltage estimating value V.sub.bus.sub._.sub.est can be obtained by using the bus voltage estimator 222 based on a bus voltage V.sub.bus, a bus capacitance estimating value C.sub.dc.sub._.sub.est, an input power P.sub.in.sub._.sub.est, and an output power P.sub.out of the three phase converter 210.

(21) In step 140, the bus capacitance estimator 224 can be used to filter the bus voltage V.sub.bus and the bus voltage estimating value V.sub.bus.sub._.sub.est so as to respectively output a first AC component {tilde over (V)}.sub.bus and a second AC component {tilde over (V)}.sub.bus.sub._.sub.est corresponding to the non-baseband flutter. In step 150, the bus capacitance estimator 224 can be used to estimate the bus capacitance based on the first AC component {tilde over (V)}.sub.bus, the second AC component {tilde over (V)}.sub.bus.sub._.sub.est, and a bus capacitance initial value C.sub.dc0.

(22) In some embodiments, the above non-baseband signal is a double frequency signal, thus causing the bus voltage V.sub.bus to generate a double frequency flutter.

(23) In another embodiment, the above step 130 comprises the flow as follows:

(24) Step 132, performing a closed-loop control on the bus voltage estimating value such that a difference between the bus voltage and the bus voltage estimating value is regulated and is then multiplied by the bus capacitance estimating value to obtain the input power.

(25) Step 134, calculating the output power based on an output voltage and an output current of the three phase converter, and subtracting the output power from the input power to obtain power of the bus capacitor; and

(26) Step 136, calculating the bus voltage estimating value based on the power of the bus capacitor, the bus capacitance estimating value, and an average of the bus voltage.

(27) A description is provided with reference to the step 132. The bus voltage estimator 222 can be used to perform the closed-loop control on the bus voltage estimating value V.sub.bus.sub._.sub.est, and a first logical module 201 of the bus voltage estimator 222 is used to calculate the difference between the bus voltage V.sub.bus and the bus voltage estimating value V.sub.bus.sub._.sub.est. Then, a first regulation module 202 of the bus voltage estimator 222 is used to regulate the difference so as to obtain a regulating signal, and a bus capacitance acquisition module 203 is further used to multiply the regulating signal by the bus capacitance estimating value C.sub.dc.sub._.sub.est so as to obtain the input power P.sub.in.sub._.sub.est. The first regulation module 202 is a proportional integral regulator, but the present disclosure is not limited in this regard. A proportional coefficient k.sub.p2 and an integral coefficient k.sub.i2 can be calculated by the following equations. The first regulation module 202 and the bus capacitance acquisition module 203 constitute a calculation segment of the input power.

(28) In the step 134, an output power P.sub.out is calculated based on the output voltage and the output current of the three phase converter 210, and a second logical module 204 of the bus voltage estimator 222 is used to subtract the output power P.sub.out from the input power P.sub.in.sub._.sub.est so as to obtain the power of the bus capacitor P.sub.c.sub._.sub.est.

(29) In the step 136, the bus voltage estimating value V.sub.bus.sub._.sub.est can be obtained by using a bus voltage estimating module 205 based on the power of the bus capacitor P.sub.c.sub._.sub.est, the bus capacitance estimating value C.sub.dc.sub._.sub.est, and the average V.sub.bus.sub._.sub.ave of the bus voltage V.sub.bus.

(30) In still another embodiment, the filter segment of the bus capacitance estimator 224 comprises a first bandpass filter module 206 and a second bandpass filter module 207. The first bandpass filter module 206 is configured to filter the bus voltage V.sub.bus and output a first AC component {tilde over (V)}.sub.bus. The second bandpass filter module 207 is configured to filter the bus voltage estimating value V.sub.bus.sub._.sub.est and output a second AC component {tilde over (V)}.sub.bus.sub._.sub.est. In yet another embodiment, both the first bandpass filter module 206 and the second bandpass filter module 207 are biquadratic bandpass filters, and both the first AC component {tilde over (V)}.sub.bus and the second AC component {tilde over (V)}.sub.bus.sub._.sub.est are double frequency AC components.

(31) In one embodiment, the above step 150 comprises the steps as follows:

(32) Step 152, acquiring a peak value of the first AC component and a peak value of the second AC component, and performing an inverse operation on the peak values to respectively obtain a first signal {tilde over (V)}.sup.1.sub.busMAX and a second signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.estMAX.

(33) Step 154, calculating a difference between the first signal and the second signal and regulating the difference so as to obtain a bus capacitance deviation value, such as a proportional integral regulation, but the present disclosure being not limited in this regard, wherein a proportional coefficient k.sub.p3 and an integral coefficient k.sub.i3 in the proportional integral regulation may be set and adjusted depending on practical situations, such as obtaining through multiple experiments; and

(34) Step 156, adding the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

(35) A description is provided with reference to the step 152. A peak value acquisition module 208 of the bus capacitance estimator 224 can be used to obtain the peak value of the first AC component {tilde over (V)}.sub.bus and the peak value of the second AC component {tilde over (V)}.sub.bus.sub._.sub.est. An inverse operation module 209 of the bus capacitance estimator 224 is then used to perform the inverse operation on the peak values so as to respectively obtain a first signal {tilde over (V)}.sup.1.sub.busMAX and a second signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.estmAx.

(36) A description is provided with reference to the step 154. A third logical module 211 of the bus capacitance estimator 224 can be used to calculate the difference between the first signal {tilde over (V)}.sup.1.sub.busMAX and the second signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.estMAX. Then, a second regulation module 213 of the bus capacitance estimator 224 is used to regulate the difference so as to obtain the bus capacitance deviation value. The second regulation module 213 may be a proportional integral regulator, but the present disclosure is not limited in this regard.

(37) A description is provided with reference to the step 156. A fourth logical module 214 of the bus capacitance estimator 224 can be used to add the bus capacitance deviation value to the bus capacitance initial value C.sub.dc0 so as to obtain the estimated bus capacitance.

(38) In another embodiment, the bus capacitance estimating value C.sub.dc.sub._.sub.est in the bus voltage estimator 222 is updated in a real-time manner according to the estimated bus capacitance obtained by the bus capacitance estimator 224 until the entire control loop is stable. The bus capacitance estimating value C.sub.dc.sub._.sub.est that is finally obtained is a bus capacitance that is estimated. During the initialization process, the bus capacitance estimating value C.sub.dc.sub._.sub.est is set as the bus capacitance initial value C.sub.dc0 and is updated in a real-time manner in subsequent processes.

(39) The above detailed description of the steps illustrates the scheme corresponding to the closed-loop implementation mode provided by the present disclosure, and is suitable for situations where the accuracy requirement for the on-line estimation of bus capacitance is higher. The present disclosure further provides an open-loop implementation mode. The calculation is simple, and the execution speed is fast, which is suitable for situations where the accuracy requirement for the on-line estimation of bus capacitance is lower.

(40) In another implementation mode, a description is provided with reference to FIG. 4 to facilitate the understanding of the step 150. FIG. 4 depicts a control block diagram of part of a circuit of the three phase converting device 200 in FIG. 2 according to still another embodiment of the present disclosure. The above step 150 comprises the steps as follows:

(41) Step 152, acquiring a peak value of the first AC component and a peak value of the second AC component, and performing an inverse operation on the peak values to respectively obtain a first signal and a second signal.

(42) Step 154, calculating a difference between the first signal and the second signal, and performing a droop control on the difference to obtain a bus capacitance deviation value; and

(43) Step 156, adding the bus capacitance deviation value to the bus capacitance initial value to obtain an estimated bus capacitance.

(44) A description is provided with reference to the step 152. The peak value acquisition module 208 of the bus capacitance estimator 224 can be used to obtain the peak value of the first AC component {tilde over (V)}.sub.bus and the peak value of the second AC component {tilde over (V)}.sub.bus.sub._.sub.est. Then, the inverse operation module 209 of the bus capacitance estimator 224 is used to perform the inverse operation on the peak values so as to respectively obtain the first signal {tilde over (V)}.sup.1.sub.busMAX and the second signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.estMAX.

(45) A description is provided with reference to the step 154. The third logical module 211 of the bus capacitance estimator 224 can be used to calculate the difference between the first signal {tilde over (V)}.sup.1.sub.busMAX and the second signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.estMAX. Then, a droop control module 212 of the bus capacitance estimator 224 is used to perform the droop control on the difference so as to obtain the bus capacitance deviation value. A droop control coefficient k.sub.droop can be obtained through the following equations.

(46) A description is provided with reference to the step 156. The fourth logical module 214 of the bus capacitance estimator 224 can be used to add the bus capacitance deviation value to the bus capacitance initial value C.sub.dc0 so as to obtain the estimated bus capacitance.

(47) As compared with the closed-loop implementation mode, the bus capacitance estimating value C.sub.dc.sub._.sub.est in the bus voltage estimator 222 remains at the bus capacitance initial value C.sub.dc0 in the open-loop implementation mode until the entire control loop is stable. The bus capacitance estimating value C.sub.dc.sub._.sub.est that is finally obtained is a bus capacitance that is estimated.

(48) In yet another implementation mode, feedforward regulation may be added to the bus capacitance estimator 224 to speed up the response. In greater detail, as shown in FIG. 5, the freeforward regulation is implemented by using a droop control module 212. Inputs of the droop control module 212 are the first signal {tilde over (V)}.sup.1.sub.busMAX and a third signal {tilde over (V)}.sup.1.sub.bus.sub._.sub.est2MAX obtained based on an AC component of a second bus voltage estimating value V.sub.bus.sub._.sub.est2. A second bus voltage estimating module is added to the bus voltage estimator 222, such that the second bus voltage estimating value V.sub.bus.sub._.sub.est2 is estimated based on the bus capacitance initial value C.sub.dc0. Since a detailed process has been described above, a description in this regard is not provided. An output of the droop control module 212 is a deviation signal, which is superimposed on an output of the second regulation module 213 to obtain a bus capacitance deviation value. Since other segments of FIG. 5 are similar to those of FIG. 3, a description in this regard is not provided.

(49) For example, after a negative sequence current is injected into the three phase converter, negative sequence power is generated. Hence, the bus voltage generates a double frequency flutter (as shown in step 110 of FIG. 1). A bus capacitance value is estimated based on a flutter amplitude of the bus voltage. The double frequency flutter of the voltage can be calculated through the relation between the capacitive reactance-current-voltage model and power of the capacitor. The equation is as follows:

(50) $\begin{array}{cc}{U}_{dc}^2=\frac{P}{{}_{n}C}& \mathrm{eq}\left(1\right)\end{array}$

(51) where .sub.n=2rad/s.

(52) The design concept of the present disclosure is described as follows. The actual bus voltage comprises two parts, that is, a DC component and an AC component. The estimated bus voltage also comprises two parts, that is, a DC component and an AC component. Therefore, the following method can be used to calculate the desired result step by step:

(53) 1. Utilizing a biquadratic low-pass filter to extract a DC component and a double frequency AC component of the actual bus voltage, see equation (2):

(54) $\begin{array}{cc}{\widetilde{\stackrel{\_}{V}}}_{\mathrm{bus}}=\frac{{}_n^2}{s^2+2{}_{n}s+{}_n^2}{V}_{\mathrm{bus}}={\stackrel{\_}{V}}_{\mathrm{bus}}+\frac{1}{2}{\tilde{V}}_{\mathrm{bus}}& \mathrm{eq}\left(2\right)\end{array}$

(55) 2. Utilizing a biquadratic bandpass filter to extract the double frequency AC component of the actual bus voltage, see equation (3):

(56) $\begin{array}{cc}{\tilde{V}}_{\mathrm{bus}}=\frac{2{}_{n}s}{s^2+2{}_{n}s+{}_n^2}{V}_{\mathrm{bus}}& \mathrm{eq}\left(3\right)\end{array}$

(57) 3. Calculating a total output power to obtain the estimated bus voltage based on the equation (1), and utilizing the biquadratic bandpass filter to extract a double frequency AC component of the estimated bus voltage obtained from equation (1), see equation (4):

(58) $\begin{array}{cc}{\tilde{v}}_{\mathrm{bus}\_\mathrm{est}}^{*}=\frac{2{}_{n}s}{s^2+2{}_{n}s+{}_n^2}\frac{P_{\mathrm{out}}}{2{}_n{C}_{dc\_\mathrm{est}}{V}_{\mathrm{bus}\_\mathrm{ave}}}=\frac{1}{2}{\tilde{v}}_{\mathrm{bus}\_\mathrm{est}}& \mathrm{eq}\left(4\right)\end{array}$

(59) 4. When the double frequency AC component of the estimated bus voltage and the double frequency AC component of the actual bus voltage can cancel each other out, the estimated bus voltage being exactly the same as the actual bus voltage;

(60) 5. When the estimated bus capacitance is consistent with the actual bus capacitance, the double frequency AC component of the estimated bus voltage and the double frequency AC component of the actual bus voltage being able to cancel each other out. See equations (5) and (6) for the mathematical model:

(61) $\begin{array}{cc}{V}_{\mathrm{bus}\_\mathrm{est}}=\frac{2{}_{n}s}{s^2+2{}_{n}s+{}_n^2}{V}_{\mathrm{bus}}+\frac{{}_n^2}{s^2+2{}_{n}s+{}_n^2}{V}_{\mathrm{bus}}-\frac{2{}_{n}s}{s^2+2{}_{n}s+{}_n^2}\frac{P_{\mathrm{out}}}{2{}_n{C}_{dc\_\mathrm{est}}{V}_{\mathrm{bus}\_\mathrm{ave}}}& \mathrm{eq}\left(5\right)\\ V_{\mathrm{bus}\_\mathrm{est}}={\stackrel{\_}{V}}_{\mathrm{bus}}+{\tilde{V}}_{\mathrm{bus}}+\frac{1}{2}{\tilde{V}}_{\mathrm{bus}}-\frac{1}{2}{\tilde{v}}_{\mathrm{bus}\_\mathrm{est}}=V_{\mathrm{bus}}& \mathrm{eq}\left(6\right)\end{array}$

(62) After equation (6) is rearranged, the following equation (7) being obtained:

(63) $\begin{array}{cc}{V}_{\mathrm{bus}\_\mathrm{est}}=\left(V_{\mathrm{bus}}-V_{\mathrm{bus}\_\mathrm{est}}\right)\left(2{}_n{C}_{dc\_\mathrm{est}}{V}_{\mathrm{bus}\_\mathrm{ave}}+\frac{C_{dc\_\mathrm{est}}{V}_{\mathrm{bus}\_\mathrm{ave}}{}_n^2}{s}\right)-P_{\mathrm{out}}\left(\left(V_{\mathrm{bus}}-V_{\mathrm{bus}\_\mathrm{est}}\right)\left(k_{p2}+\frac{k_{i2}}{s}\right)C_{dc\_\mathrm{est}}-P_{\mathrm{out}}\right)\frac{k_{i1}}{C_{dc\_\mathrm{est}}s}=\left(P_{in\_\mathrm{est}}-P_{\mathrm{out}}\right)\frac{k_{i1}}{C_{dc\_\mathrm{est}}s}& \mathrm{eq}\left(7\right)\end{array}$

(64) Where k.sub.i1=1/(V.sub.bus.sub._.sub.ave), k.sub.p2=2.sub.nV.sub.bus.sub._.sub.ave, k.sub.i2=V.sub.bus.sub._.sub.ave.sub.n.sup.2.

(65) It can be seen from the above calculation method that the closed-loop control is performed on the bus voltage estimating value. The input power is obtained through the proportional integral regulator (PI regulator), and the difference between the input power and the output power is calculated to obtain the power of the capacitor. The capacitor current is then obtained based on the power of the capacitor and the average V.sub.bus.sub._.sub.ave of the bus voltage V.sub.bus. According to the characteristics of the capacitor, the estimated bus voltage is obtained by integrating the capacitor current, and the closed-loop control is completed. The above calculation flow can be presented as the circuit control block diagrams shown in FIG. 3 and FIG. 4.

(66) In addition, the design concept of the closed-loop control scheme is described as follows. A negative sequence current is injected to result in a double frequency flutter of the voltage. The power flutter triggers the voltage flutter. The peak voltage of the voltage flutter is extracted to calculate the capacitance according to the following mathematical model.

(67) $\begin{array}{cc}{C}_{dc\_\mathrm{est}}=\frac{P_{\mathrm{out}}}{{}_n{\tilde{v}}_{\mathrm{bus}\_\mathrm{est}}{V}_{\mathrm{bus}\_\mathrm{ave}}}& \mathrm{eq}\left(8\right)\\ C_{dc\_\mathrm{real}}=\frac{P_{\mathrm{out}}}{{}_n{\tilde{V}}_{\mathrm{bus}}{V}_{\mathrm{bus}\_\mathrm{ave}}}& \end{array}$

(68) In the calculation equation, the output power P.sub.out is used to replace the power of the capacitor because the two are basically equal. The difference lies mainly in the power loss caused by the internal impedance of the bus capacitor and can be ignored. Based on theoretical analysis, when the estimated capacitance is consistent with the actual capacitance, amplitudes of double baseband flutters thus generated of the actual bus voltage and the estimated bus voltage are consistent if same negative sequence power is injected. The biquadratic bandpass filters are used to extract the double frequency component of the measured bus voltage and the double frequency component of the estimated bus voltage. Then, peak values are extracted. After the reciprocals are taken, the closed-loop control is performed according to the architecture shown in FIG. 3. Extracting the peak values facilitates digital calculations.

(69) In addition, the design concept of the open-loop control scheme is described as follows. A negative sequence current is injected into the three phase converter to result in a double frequency flutter of the voltage. The power flutter triggers the voltage flutter. The peak value of the voltage flutter is extracted to calculate the capacitance according to the mathematical model of equation (8). Based on theoretical analysis, the biquadratic bandpass filters are used to extract the double frequency component of the measured bus voltage and the double frequency component of the estimated bus voltage. Then, peak values are extracted. After the reciprocals are taken, the open-loop control is performed according to the architecture shown in FIG. 4.

(70) Injecting a double frequency signal is taken as an example to provide a brief description of a signal injection method. The control strategy of a traditional three phase converting device is to use a double closed-loop system that comprises a closed-loop control of the bus voltage and a closed-loop control of the AC side current. An active baseband current is given as the output of the bus voltage control loop. The control objective for the double frequency AC component is to control the double frequency component of current to zero, or control the double frequency flutter of bus voltage to zero. In one embodiment, the double frequency current component is added to the given fixed current to be superposed on the baseband so as to become the double frequency flutter. As a result, the double frequency component is generated in the AC side current. The double frequency flutter is generated in the power on the bus to correspondingly generate the double frequency flutter in the bus voltage. The above description only provides a non-baseband signal injection method, and the present disclosure is not limited in this regard.

(71) In addition, those skilled in the art will appreciate that each of the steps of the method 100 for estimating capacitance named after the function thereof is merely used to describe the technology in the embodiment of the present disclosure in detail but not limited to. Therefore, combining the steps of said method into one step, dividing the steps into several steps, or rearranging the order of the steps is within the scope of the embodiment in the present disclosure.

(72) It can be seen from the above embodiments that the present disclosure has the following advantages, at least. A three phase converting device and a method for estimating capacitance are provided according to the embodiments of the present disclosure to improve the problems that an external device is required and the cost is higher when an independent detection device is adopted to calculate and obtain the bus capacitance of the three phase converting device. In addition, various problems occurring when detection is based on the three phase converter itself, such as the capacitance estimation being combined with some other information, the capacitance value only being detected once during the pre-charge process, the use of high-frequency ripple being difficult to accurately detect and that in turn affects the capacitance estimation accuracy, etc., are improved.

(73) The method for estimating capacitance according to the present disclosure does not rely on an external detection circuit or device. The DC bus capacitance value can be accurately detected in a real-time manner to complete the online detection of the DC bus capacitance, thus being especially suitable for a three phase converting device.

(74) Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.

(75) It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.