Method, circuit configuration and bridge circuit for charging a capacitance effective on main current terminals of semiconductor switch
10164550 ยท 2018-12-25
Assignee
Inventors
Cpc classification
International classification
Abstract
A method, circuit configuration and bridge circuit for charging a capacitance effective on the main current terminals of a semiconductor switch, in particular an intrinsic capacitance, in particular the drain-source capacitance of a MOSFET semiconductor switch or the collector-emitter capacitance of an IGBT semiconductor switch, the precharging, in particular the at least partial charging, of the effective capacitance being forcibly controlled via a charging current path.
Claims
1. A method for charging a capacitance that is present on main current terminals of a semiconductor switch, the semiconductor switch including at least one of (a) a MOSFET semiconductor switch and (b) an IGBT semiconductor switch, the capacitance including at least one of (a) a drain-source capacitance of the MOSFET semiconductor and (b) a collector-emitter capacitance of the IGBT semiconductor switch, comprising: forcibly controlling a precharging of the capacitance via a charging current path; wherein a diode is serially arranged in a main current path of the semiconductor switch to form a series circuit, and a free-wheeling diode is connected in parallel to the series circuit; and wherein the charging current path includes an inductance, and a control semiconductor switch is provided in the charging current path, the inductance and the capacitance forming a series resonant circuit, such that the precharging includes precharging of the capacitance to a higher voltage level than a supply voltage.
2. The method according to claim 1, wherein the precharging includes at least partial charging.
3. The method according to claim 1, wherein the precharging is forcibly controlled by a control signal of the semiconductor switch via the charging current path.
4. The method according to claim 1, wherein an energy for charging is not taken from a main current path.
5. The method according to claim 1, wherein at least one of (a) a diode, (b) a Zener diode, and (c) a Schottky diode is disposed in a main current path.
6. The method according to claim 1, wherein a converter includes signal electronics, and wherein the charging current path is supplied by a same voltage source, from which a driver circuit for producing a control current for the control terminal of the semiconductor switch is supplied and the voltage source is electrically isolated from the signal electronics of the converter.
7. The method according to claim 1, wherein the semiconductor switch is situated in a bridge branch of a bridge circuit.
8. The method according to claim 1, wherein the precharging is at least partially performed at least one of (a) during a dead time and (b) during a period in which both semiconductor switches of a half-bridge of a bridge circuit are switched off.
9. The method according to claim 1, wherein a charging current is already built up in the charging current path, while the semiconductor switch to be switched off is still in a conductive state.
10. The method according to claim 1, wherein the inductance is dimensioned such that the series resonant circuit swings up to a voltage desired as a precharge, reaching a maximum of an upswing of the voltage within a dead time.
11. A circuit configuration, comprising: a semiconductor switch, including at least one of (a) a MOSFET semiconductor switch and (b) an IGBT semiconductor switch; and a capacitance that is present on main current terminals of the semiconductor switch, the capacitance including at least one of (a) a drain-source capacitance of the MOSFET semiconductor switch and (b) a collector-emitter capacitance of the IGBT semiconductor switch; wherein for at least one of (a) precharging and (b) at least partial charging, of the capacitance, a charging current path is provided via which the precharging is forcibly controlled; wherein a diode is serially arranged in a main current path of the semiconductor switch to form a series circuit, and a free-wheeling diode is connected in parallel to the series circuit; and wherein the charging current path includes an inductance, and a control semiconductor switch is provided in the charging current path, the inductance and the capacitance forming a series resonant circuit adapted to precharge the capacitance to a higher voltage level than a supply voltage.
12. The circuit configuration according to claim 11, wherein the capacitance diminishes with increasing voltage.
13. The circuit configuration according to claim 11, wherein the diode is oriented antiparallel with respect to the free-wheeling diode.
14. The circuit configuration according to claim 11, wherein a voltage of the capacitance achieved by precharging reaches at least one of (a) less than 30% and (b) less than 15% of a voltage switchable by the semiconductor switch.
15. A bridge circuit, comprising: a circuit configuration including: a semiconductor switch, including at least one of (a) a MOSFET semiconductor switch and (b) an IGBT semiconductor switch; and a capacitance that is present on main current terminals of the semiconductor switch, the capacitance including at least one of (a) a drain-source capacitance of the MOSFET semiconductor switch and (b) a collector-emitter capacitance of the IGBT semiconductor switch; wherein for at least one of (a) precharging and (b) at least partial charging, of the capacitance, a charging current path is provided via which the precharging is forcibly controlled; wherein the charging current path includes an inductance, the inductance and the capacitance forming a series resonant circuit adapted to precharge the capacitance to a higher voltage level than a supply voltage; wherein a half-bridge includes a first and a second series circuit connected in parallel, which respectively have a first and a second circuit part connected in series, a transverse inductance being provided to connect electrical connection points of the first and second circuit parts of a particular series circuit; wherein the first circuit part of the first series circuit includes the semiconductor switch including a serially connected diode and the second circuit part of the first series circuit includes a first free-wheeling diode connected in parallel to the first series circuit; wherein a first circuit part of the second series circuit includes a second free-wheeling diode connected in parallel to the second series circuit and the second circuit part of the second series circuit includes an additional semiconductor switch including a serially connected diode; and wherein the first circuit parts are connected to a higher potential of a supply voltage and the second circuit parts are connected to a lower potential.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
(4)
DETAILED DESCRIPTION
(5)
(6) By way of example, the unipolar intermediate circuit voltage U.sub.z smoothed by capacitance C.sub.z is produced by a line rectifier. Alternatively, this voltage is also suppliable by a battery, an accumulator or another module producing direct voltage. The intermediate circuit voltage supplies the half-bridge circuit, which in the first bridge branch has a series circuit, in which an upper semiconductor switch S.sub.1 and a lower semiconductor switch S.sub.2 are situated, and in the second bridge branch has a series circuit, in which an upper semiconductor switch S.sub.3 and a lower semiconductor switch S.sub.4 are situated.
(7) In the following, the processes in half-bridge HB.sub.1 are described, the same holding for the second half-bridge made up of S.sub.3 and S.sub.4.
(8) Semiconductor switches S1 and S.sub.2 are controlled such that either a first state 1, in which semiconductor switch S.sub.1 is open and semiconductor switch S.sub.2 is closed, is set, or a second state 2 having the reverse switch positions is set.
(9) In the transition from one state into the other, the initially closed semiconductor switch is always open and only after a so-called dead time is the opposite semiconductor switch closed. This reliably prevents both semiconductor switches from being switched on simultaneously in the transition.
(10) In contrast to IGBT semiconductor switches, MOSFET semiconductor switches have a so-called intrinsic diode (D.sub.i1, D.sub.i2), because the junction construction of the MOSFETs necessitates it. These intrinsic diodes, however, have very high reverse recovery times compared to optimized switching diodes and are thus not very suitable as free-wheeling diodes. In a simple buck converter system this would be less problematic since there no current flows across the intrinsic diode. By contrast, the intrinsic diodes in half-bridge HB1, as shown in
(11) In operation, when there is a state change between states 1 and 2, two fundamentally different commutation processes may occur in the half-bridge, depending on the direction in which load current I.sub.A flows at this point in time. Representatively, the change from state 1 to state 2 will be considered, once as Case 1 at a negative load current, that is, one flowing into the half-bridge, and once as Case 2 at a positive load current, that is, one flowing out of the half-bridge:
(12) Case 1:
(13) In the case of a negative load current I.sub.A, in state 1, the current flows via the closed semiconductor switch S.sub.2 to the negative terminal of supply voltage U.sub.z. If the transition to state 2 is now initiated by switching S.sub.2 off, then drain-source capacitance C.sub.I2 is charged by the load current. The load current shall be assumed as constant during the commutation process. If drain-source voltage on C.sub.I2 reaches the value of the intermediate circuit voltage, then the load current would commutate abruptly and without transient overvoltage to free-wheeling diode D.sub.i1 if parasitic leakage inductances L.sub.S1 and L.sub.S2 did not exist. However, since the load current through L.sub.S2 cannot diminish abruptly to zero, drain-source capacitance C.sub.i2 continues to be charged until the energy stored in the leakage inductances has diminished to zero. The resulting overvoltage on S.sub.2 is thus a function of the magnitude of the load current, which is operationally limited to defined boundaries, however. Using short conductor lengths in the circuit construction achieves low leakage inductances such that the overvoltages in this situation are controllable. By contrast, in the following Case 2, currents that are many times higher occur in the leakage inductances such that there significant overvoltages may occur even in optimized conditions with respect to the leakage inductances of the circuit construction.
(14) Case 2: For this case it shall be assumed by way of simplification that a very low load current flows such that its influence on the ring-back process may be ignored in the following considerations. A great load current does not imply any fundamental change of the conditions, but may be regarded rather as superposed on the processes described in the following.
(15) In the case of a positive load current, in state 1, the current flows via free-wheeling diode D.sub.i2 from the negative terminal of the supply voltage to the load. If the transition to state 2 is now initiated in that S.sub.2 switches off, then the load current initially continues to flow through D.sub.i2. The actual commutation process only begins when semiconductor switch S.sub.1 is switched on following the expiration of the dead time. Together with L.sub.S1 and L.sub.S2, drain source capacitance C.sub.I2 forms a resonant circuit that is connected via S.sub.1 to the intermediate circuit voltage. Assuming a constant drain-source capacitance C.sub.I2, the known sinusoidal current and voltage curve would result, the voltage on the capacitance swinging up to twice the value of the direct voltage of the supply voltage. In actual fact, however, essentially two additional factors influence the magnitude of the overawing, that is, of the transient overvoltage. First, the switching speed of the switched-on semiconductor switch is merely finite, for example between 10 ns and 200 ns or more, depending on the type of semiconductor switch. Thus the semiconductor switch is operated for a considerable time in its linear range, which is similar to an attenuation of the resonant circuit by an ohmic resistance. The shorter the period duration of the resonance frequency of the resonant circuit in comparison to the switching time of the semiconductor switch, the better the resonant circuit will be attenuated and thus the overvoltage reduced. For this reason, in the construction of the circuit, attention is paid to create a circuit trace routing that is as short as possible and low in inductance. Moreover, this also makes it possible to reduce the transient overvoltage further by deliberately decreasing the switching speed, for example by increasing the gate series resistance in the driver circuit of the gate control. This measure, however, results in rising switching losses. Second, the drain-source capacitance of the semiconductor switches is not constant, but rather dependent on the voltage. At a low drain-source voltage, the capacitance is markedly higher than at a high voltage. Preferably, a semiconductor switch is used as described in PCT Published Patent Application No. WO 00/16407. The semiconductor switch thus has a particularly high voltage dependence of the drain-source capacitance. This has indeed a positive effect on the switch-off losses as occur in the process described under Case 1. In the present Case 2, however, this fact results in an overawing of the resonant circuit that is many times greater than at a constant capacitance. Due to the high capacitance at a low voltage, the voltage initially rises more slowly, as a result of which a very high current may build up in the leakage inductance. The energy stored in the inductance must subsequently be restored in a decreasing capacitance, however, which causes an accordingly increased overvoltage on the drain-source capacitance.
(16) With the aid of example embodiments of the present invention, the overvoltages for the process in Case 2 are reduced. At the same time, the respective switching losses are reduced.
(17) The control and charging circuit according to example embodiments of the present invention, as shown in
(18) As shown in
(19) In exemplary embodiments according to the present invention, this circuit part is supplied by a low auxiliary voltage, which is lower than 50 V, for example 24 volts. Ideally, this auxiliary voltage is the same as that from which the control circuit of the gate control is supplied.
(20)
(21) Second, according to example embodiments of the present invention, a diode D.sub.S1 and D.sub.S2 is respectively disposed in series to the semiconductor switch. Diode D.sub.S1 and D.sub.S1 prevents charging current I.sub.L1 and I.sub.L2 from draining off via free-wheeling diodes D.sub.F1 and D.sub.F2, respectively, even when at the time of the charging process the parallel free-wheeling diodes carry the load current and are thus conductive.
(22) If MOSFETs are provided as semiconductor switches, then at the same time their intrinsic diodes are ineffective as free-wheeling diodes since, instead of the intrinsic diodes, separate free-wheeling diodes D.sub.F1 and D.sub.F2 having an optimized switching behavior are provided. When using MOSFET semiconductor switches, diodes D.sub.S1 and D.sub.S2 respectively fulfill a dual purpose since they create the possibility of allowing both for a forcible charging of the drain-source capacitance as well as for using optimized free-wheeling diodes. The blocking capacity of diodes D.sub.S1 and D.sub.S2 must be selected in accordance with the specified charging.
(23) In exemplary embodiments according to the present invention, a semiconductor switch is used, the drain-source capacitance of which diminishes greatly with increasing voltage. The advantage in this regard is that charging to a relatively low voltage suffices to prevent overvoltages, and hence serial diodes D.sub.S1 and D.sub.S2 may be used that have a low blocking capacity and thus likewise a low forward voltage.
(24) In exemplary embodiments according to the present invention, the control of the charging circuit is derived from the signal of the gate control. The advantage in this regard is that only one signal has to be conducted in a potential-separating manner. An exemplary combination of the control and charging circuit for switch S.sub.2 is shown in a simplified manner in
(25) The gate of semiconductor switch S.sub.2 is controlled via gate series resistance R.sub.g2. C.sub.g2 indicates the internal gate capacitance of switch S.sub.2. This circuit part corresponding to the related art is now extended by a circuit part according to example embodiments of the present invention made up of base resistance R.sub.b2, charging transistor T.sub.2, charging diode D.sub.L2, charging inductance L.sub.L2 in combination with serial diode D.sub.S2. If the output voltage of gate drive V.sub.2 changes from U.sub.H+ to U.sub.H, which is similar to S.sub.2 being switched off, then at the same time charging transistor T.sub.2 is switched on since now only a base current is able to flow through R.sub.b2. Via T.sub.2 and D.sub.L2, auxiliary voltage U.sub.H+ is now applied on the series circuit made up of L.sub.D2 and C.sub.i2. A charging process now occurs that proceeds according to the same law as the ring-back process described at the outset, from which the transient overvoltage results in Case 2. Advantageously, when using this type of charging circuit, a semiconductor switch S.sub.2 having a highly voltage-dependent drain-source capacitance may also be used. A relatively low auxiliary voltage supply in combination with a switched charging inductance then suffices to precharge the drain-source capacitance to far above twice the auxiliary voltage supply U.sub.H+ and thus to charge it sufficiently. Charging diode D.sub.L2 prevents the charging current from swinging back. The value of the inductance of L.sub.L2 is dimensioned such that within the dead time, that is, prior to switching on the opposite semiconductor switch S.sub.1, a sufficiently high precharge is achieved. The lower the selected charging inductance, the higher will be the charging current and the faster the charging process will be concluded.
(26) An example embodiment is shown in
(27) In all exemplary embodiments, one must be mindful of the fact that the higher the voltage to which the drain-source capacitance is precharged, the lower will be the subsequent transient overvoltage. Here one must consider that even a precharging to a relative low voltage already greatly reduces the subsequent transient overvoltage. In the MOSFET semiconductor switch from