RADIO COMMUNICATION

Abstract

A digital radio receiver (7) is arranged to receive and process data frames, each data frame comprising (i) a plurality of identical synchronization sequences; (ii) identification data different from the synchronization sequences; and (iii) convolution-encoded message data. An initial-synchronization section of the receiver (7) uses the plurality of synchronization sequences in a received data frame to perform a frequency-synchronization or symbol-timing-synchronization operation. A frame-synchronization section determines frame-synchronization information by correlating at least a part of the received identification data against reference identification data stored in a memory. A convolution-decoding section uses the frame-synchronization information to decode the message data.

Claims

1. A digital radio receiver configured to receive and process data frames, each data frame comprising (i) a plurality of identical synchronization sequences; (ii) identification data different from the synchronization sequences; and (iii) convolution-encoded message data, the receiver comprising: an initial-synchronization section configured to use the plurality of identical synchronization sequences in a received data frame to perform a frequency-synchronization or symbol-timing-synchronization operation; a frame-synchronization section configured to determine frame-synchronization information for the received data frame by correlating at least a part of the received identification data against reference identification data stored in a memory of the receiver; and a convolution-decoding section configured to use said frame-synchronization information to decode the message data of the data frame.

2. The digital radio receiver of claim 1, wherein the stored reference identification data is identical to the identification data transmitted in the received data frame.

3. The digital radio receiver of claim 1, wherein the reference identification data is convolution-encoded, and wherein the frame-synchronization section is configured to correlate convolution-encoded received identification data against the convolution-encoded reference identification data.

4. The digital radio receiver of claim 1, wherein the digital radio receiver comprises a despreader section configured to despread direct-sequence-spread-spectrum-(DSSS-)encoded identification data in the received data frame.

5. The digital radio receiver of claim 4, wherein the despreader section is configured to receive data in complex format, but to output data in real format.

6. The digital radio receiver of claim 4, wherein the frame-synchronization section is configured to correlate at least part of the identification data against the reference identification data after the identification data has been despread.

7. The digital radio receiver of claim 4, configured to use a phase output of the de-spreader section to compensate for carrier frequency drift.

8. The digital radio receiver of claim 1, wherein the initial-synchronization section comprises a correlator configured to repeatedly correlate the received synchronization sequences against all or part of a single synchronization sequence.

9. The digital radio receiver of claim 1, wherein convolution-decoding section comprises a Viterbi decoder.

10. The digital radio receiver of claim 1, configured to pre-initialize the convolution-decoding section with at least a portion of the identification data.

11. A method of radio communication, comprising receiving and processing a data frame comprising (i) a plurality of identical synchronization sequences; (ii) identification data different from the synchronization sequences; and (iii) convolution-encoded message data, the method comprising: using the plurality of identical synchronization sequences in the received data frame to perform a frequency-synchronization or symbol-timing-synchronization operation; determining frame-synchronization information for the received data frame by correlating at least a part of the received identification data against stored reference identification data; and using said frame-synchronization information to decode the message data of the data frame.

12. The method of claim 11, wherein the identification data in the received data frame is an identifier for a link-layer connection between a radio receiver and a radio transmitter.

13. The method of claim 11, wherein the identification data in the received data frame is part or all of a Bluetooth Low Energy Access Address.

14. The method of claim 11, wherein the identification data in the received data frame is convolution-encoded and is located at the beginning of a forward-error-correcting code block.

15. The method of claim 11, wherein the synchronization sequences are located before the identification data in the received data frame, and wherein the identification data is located before the message data.

16. The method of claim 11, wherein the identification data is an address of a radio transmitter or of a radio receiver.

17. The digital radio receiver of claim 1, wherein the received identification data is a link-layer connection identifier.

18. The digital radio receiver of claim 1, wherein the received identification data is an address of a radio transmitter or of the radio receiver.

Description

[0029] Certain preferred embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0030] FIG. 1 is a schematic drawing of a radio communication system including a receiver embodying the invention;

[0031] FIG. 2 is a diagram of a data packet that may be transmitted and received by the radio communication system;

[0032] FIG. 3 is schematic drawing of part of a radio receiver embodying the invention; and

[0033] FIG. 4 is a state diagram for this radio receiver.

[0034] FIG. 1 shows a wireless heart-rate monitor 1 which is in communication with a mobile telephone 7. The mobile telephone 7 embodies the present invention.

[0035] The wireless heart-rate monitor 1 has a heart-rate sensor 2 which is connected to a microprocessor 3 (such as an ARM Cortex M-series). The microprocessor 3 is connected to a radio transmitter 4. The radio transmitter 4 includes an encoder 5 (among other components). Other conventional components, such as memory, a battery, etc. are also present, but are omitted from the drawing for the sake of simplicity. The microprocessor 3 and radio transmitter 4 may be integrated on a single silicon chip. The monitor 1 has a radio antenna 6, which may be integrated on such a chip or external to it.

[0036] The mobile telephone 7 has, among other conventional components (not shown), an antenna 8, suitable for receiving short-range radio communications from wireless-personal-area-network devices, which is connected to a radio receiver 9. The radio receiver 9 includes synchronization and decoding logic 10, among other components. The radio receiver 9 is connected to a microprocessor 11 (such as an ARM Cortex M-series), which can output data for display on a screen 12, possibly via other components, such as a further microprocessor (not shown) running an operating system and appropriate software applications.

[0037] In use, the wireless heart-rate monitor 1 receives periodic heart-rate readings for a human user from the heart-rate sensor 2. The microprocessor 3 processes the readings into a suitable format for transmission, and sends the message data to the radio transmitter 4. In some embodiments, the message data may already be differentially encoded, in order to improve the efficiency of the decoding operation on the radio receiver 9. The radio transmitter 4 determines whether the message data can fit within a single data packet, or if it must be split across two or more data packets. The encoder 5 in the radio transmitter 4 encodes the message data using a convolution-based forward-error-correcting code. It prepends a link-layer Access Address (cAA) and a rate indicator (RI) to the encoded message data to create a payload. It then DSSS-encodes this entire payload using a fixed chip sequence. For example, each 1 bit might be represented by the 4-bit sequence [1 1 0 0] and each 0 bit represented by the sequence [0 0 1 1]. Of course, other lengths of chip sequence may be used, which may or may not be powers of two. The transmitter 4 then prepends a synchronization word to the payload, consisting of 10 repetitions of a predetermined sequence, S1=[0 0 1 1 1 1 0 0] (for example).

[0038] The radio transmitter 4 then transmits the encoded data packet from the antenna 6, modulated on a radio-frequency carrier (e.g. at around 2.4 GHz), using two-level GFSK with a modulation index of 0.5. The data packet may contain additional elements, such as a preamble, if appropriate.

[0039] FIG. 2 shows an exemplary data packet structure, which includes a synchronization word and an FEC-encoded data payload. The data payload contains a coded access address (cAA) and a rate indicator in a first FEC block. The rate indicator contains data about the encoding of a second FEC block containing additional message bits.

[0040] In use, the mobile telephone 7 receives the radio data packet at the antenna 8. The radio receiver 9 processes the GFSK signal using the synchronization and decoding logic 10. The receiver 9 first correlates the received signal with the 8-bit synchronization sequence [0 0 1 1 1 1 0 0], in order to determine symbol timing recovery and frequency offset correction.

[0041] The repetitive synchronization sequence has the advantage that the synchronization logic 10 can qualify on distance in time between correlator matches in addition to the basic match metric (correlator output amplitude).

[0042] This can be exploited to lower the correlator threshold for qualified matches, while maintaining robustness against false detections. This in turn means that an 8-bit correlator can be used to achieve a high level of sensitivity at low receiver complexity. Another advantage of this pulse train synchronization is that, if a correlator frame longer than the repeat sequence is used, as may be the case in some embodiments, the receiver correlator coefficients will also be a repeated sequence. This simplifies the implementation of longer correlators, while maintaining their basic noise averaging qualities.

[0043] The radio receiver 9 then despreads the data payload, using the acquired timing synchronization to do so. This operation is explained in more detail below. The real-valued output of the despreading is sent to a Viterbi decoder for deconvolving the output. However, the Viterbi decoder needs to be initialised correctly in order to be able to remove the FEC-encoding correctly. This is accomplished by also correlating the despread output against a stored representation of the coded Access Address (cAA). Because the Access Address is fixed for a given connection, and because it appears at the beginning of the first FEC block, its FEC-encoded value, cAA, can be determined in advance and stored in the radio receiver 9 for use in this correlation operation. This correlation operation is explained in more detail below. The correlation provides frame synchronization information which is then used to initialise the Viterbi decoder.

[0044] The radio receiver 9 then passes the decoded message data to the microprocessor 11 for processing. The microprocessor 11 may process it in any appropriate way. In some embodiments, heart-rate information may be displayed graphically on the display screen 12 for the user to see.

[0045] The wireless heart-rate monitor 1 and mobile telephone 7 may be configured so that heart-rate message data is transferred from the wireless heart-rate monitor 1 to the mobile telephone 7 substantially according to the Bluetooth Low Energy (BTLE) core specification version 4.0, with the exception of the physical layer. The wireless heart-rate monitor 1 and mobile telephone 7 may be equipped for two-way radio communication, using corresponding components for radio transmission in the opposite direction, although this is not essential.

[0046] FIG. 3 shows detail of a digital baseband processing stage of a radio receiver embodying the invention. This could be the same radio receiver 9 as described above, or it could be a different radio receiver.

[0047] Steps such as filtering and residual frequency offset tracking are not shown for reasons of conciseness. The design of the radio receiver aims to optimize sensitivity while tolerating realistic channel conditions (carrier frequency offset, carrier drift, fading, etc.).

[0048] Complex-valued baseband samples are shown entering from the left side of FIG. 3. These are passed to a CORDIC unit 18, and from there to a despreader unit 19. The despreader unit 19 performs a cross correlation between the incoming data and one or more stored chip sequences. The output of the despreader unit 19 is passed to a bit-level coded-Access-Address correlation unit 20, and then on to a Viterbi decoder unit 21. The incoming samples are also passed to a synchronization unit 22 which performs timing synchronization and initial carrier frequency offset estimation.

[0049] FIG. 3 contains the following abbreviations: [0050] n=chip index; [0051] m=symbol index; [0052] z(n)=complex baseband samples; [0053] z(n)=carrier-frequency offset (CFO) compensated z(n); [0054] h(n)=hard decision bits from despread data; [0055] cAA=replica of expected coded access address; [0056] p(k)=complex values representing the data chip sequence on the phase cylinder after FSK modulation.

[0057] The synchronization is built around a particular kind of correlator. The correlator is a data-aided joint timing and frequency estimator which exploits knowledge of the data in the received symbols to cancel the effect of the modulation on the estimate of a conventional delay-and-correlate type of carrier frequency offset estimator. The principle behind the synchronization is described in WO 2014/167318, by the present applicant, the entire contents of which are hereby incorporated by reference.

[0058] Because a repetitive synchronization word is received, additional checks on the time domain distances between successive magnitude responses can be used to filter out false detections. This means that a shorter correlator with a lower detection threshold can be used to achieve a given level of sensitivity lowering receiver complexity.

[0059] The joint timing & freq. offset sync synchronization unit 22 in FIG. 3 carries out the following cross correlation for every incoming baseband sample z.sub.n=I(n)+jQ(n):

[00001]$.Math..Math.\hat{f}=\frac{1}{2.Math..Math..Math.\mathrm{DT}}.Math.\arg .Math.\left\{\underset{i=0}{\overset{L-1}{.Math.}}.Math.\left[z_{n-i}.Math.z_{n-i-D}^{*}\right].Math.d_i\right\},$

where L is the number of samples representing an up-sampled sync word, which is defined as a number of repetitions of the sequence S1 above; where D is a lag which is decided at design time; and where T is the sample period.

[0060] The coefficients are given as d.sub.i=p.sub.i*p.sub.iD where p are the samples constituting the up-sampled and modulated sync word bits. The correlator should be sampled at the right point in time for the frequency offset estimate to be valid, and this time instant is when a peak is observed in the value of M.sub.n given by:

[00002]$M_n=\frac{.Math.C_n.Math.}{P_n},\mathrm{where}.Math..Math.C_n=\underset{i=0}{\overset{L-1}{.Math.}}.Math.\left[z_{n-i}.Math.z_{n-i-D}^{*}\right].Math.d_i.Math..Math.\mathrm{and}$$P_n=\underset{i=0}{\overset{L-1}{.Math.}}.Math.{.Math.z_{n-i-D}.Math.}^2.$

[0061] A valid peak in M.sub.n is determined against a programmable threshold. A successful synchronization event is defined by the observation of a few valid peaks spaced apart in time by amounts corresponding to the sync word length, plus or minus a value, , to account for noise. This synchronization event furthermore defines the strobe time to be used for subsequent detection of the data symbols.

[0062] The coefficients d.sub.i=p.sub.i*p.sub.iD are calculated at design time.

[0063] The CFO-compensated sequence of complex baseband samples z(n) is processed by the digital-baseband-correlator despreader unit 19. This calculates C.sub.i=.sub.k=1.sup.N2z(nk)pdata.sub.i*(k) and outputs real-valued SoftBits=|C.sub.1|.sup.2|C.sub.0|.sup.2 to the bit-level coded-Access-Address correlation unit 20 and to the Viterbi decoder unit 21.

[0064] The coded-Access-Address correlation unit 20 performs a correlation operation F=.sub.k=1.sup.Nh(nk)cAA(k) using a stored version of the coded Access Address, in order to determine the frame synchronization for the incoming data frame.

[0065] The message data bits are then determined by the Viterbi decoder unit 21, which operates in a conventional manner.

[0066] FIG. 4 shows a finite state machine (FSM) that can orchestrate the synchronization process and outer DSSS decoding in a radio receiver as illustrated in FIG. 3.

[0067] The state of this FSM is given by the variable syncstate. At time t=0 the FSM starts out in syncstate=0. In this state the FSM is to the right side of the dashed line in FIG. 4, and is looking for peaks in the value of M.sub.n computed by the synchronization unit 22. For each peak, the {circumflex over (f)} value is recorded in a vector element cfoVec[MnCnt], and the peak counter MnCnt is incremented by one. When a sufficient minimum number min of such peaks with a certain distance dist between each peak has been observed, initial timing and carrier frequency offset synchronization is achieved and syncstate is incremented by one.

[0068] The average time of the peaks as measured by a counter (which counts modulo the number of samples per symbol) defines the subsequent symbol boundaries (strobe timing). Additionally, an initial carrier frequency offset estimate is computed as the average of the elements in the vector cfoVec. This value, , is then passed to the CORDIC unit 18.

[0069] Now, with syncstate>0, the FSM enters the left side of the dashed line in FIG. 4, for receiving the message. In this state, the message data bits are determined in the decoder unit 21 as described above. Additionally, the residual carrier frequency offset (CFO) is tracked and .sub.CFO is computed. In turn, this value is used to update (by being added to) the value in the CORDIC unit 18.