APPARATUS AND METHOD FOR BI-DIRECTIONAL AC/DC POWER CONVERSION

Abstract

A bi-directional AC/DC power conversion apparatus includes a low frequency switching network, a high frequency switching network, and one or more inductors coupled between the high frequency switching network and an AC voltage. A controller provides bi-directional power transfer between a DC voltage and an AC voltage. The controller receives the DC voltage, the AC voltage, and a total current flowing through the inductors, and produces a duty cycle, a switching frequency, and switch control signals configured to operate the switching networks. The required ZVS current is achieved by varying the switching frequency based on the total current, the duty cycle, and the AC and DC voltages. ZVS operation is ensured by adjusting the switching frequency to create an available charge stored in an inductor at the switching instant equal to the charge stored in an output capacitance of a switching device.

Claims

1. An apparatus (100) comprising: a bi-directional AC/DC power conversion topology (104) comprising a low frequency switching network (106), a high frequency switching network (108), and one or more inductors (L.sub.1, L.sub.2, . . . L.sub.n), wherein the high frequency switching network (108) comprises a plurality of high frequency switching devices (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb), and the power conversion topology (104) is configured to transfer power between a DC voltage (V.sub.dc) and an AC voltage (v.sub.ac); and a controller (102) coupled to the power conversion topology (104) and configured to receive the DC voltage (V.sub.dc), the AC voltage (v.sub.ac), and a total current (i.sub.t) flowing through the one or more inductors (L.sub.1, L.sub.2, . . . L.sub.n), and to produce high frequency switch control signals (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb) configured to operate the high frequency switching devices (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb); wherein the controller (102) is configured to: generate a duty cycle (D) based on a reference signal (120) and a controlled signal (118); determine a switching frequency (f.sub.s) based on the total current (i.sub.t), the duty cycle (D), and one or more of the DC voltage (V.sub.dc) and the AC voltage (v.sub.ac); and generate 116 the high frequency switch control signals (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb) based on the switching frequency (f.sub.s) and the duty cycle (D).

2. The apparatus (100) of claim 1 wherein, when the apparatus (100) is operating as a rectifier, the switching frequency (f.sub.s) is determined based on the DC voltage (V.sub.dc), and when the apparatus (100) is operating as an inverter, the switching frequency (f.sub.s) is determined based on the DC voltage (V.sub.dc) and the AC voltage (v.sub.ac).

3. The apparatus (100) of claim 1 wherein the switching frequency (f.sub.s) is configured to create an available charge (Q.sub.L1) provided by an inductor (L.sub.1) during a dead time (t.sub.dt) equal to a stored charge (Q.sub.ZVS1) in an output capacitance (122) of the high frequency switching devices (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb).

4. The apparatus (100) of claim 1 wherein the switching frequency (f.sub.s) is limited to a predetermined maximum frequency (f.sub.s,max).

5. The apparatus (100) of claim 1 wherein the power conversion topology (104) comprises one or more phases (126).

6. The apparatus (100) of claim 1 wherein the controller (102) is configured to determine an average current (i.sub.tavg) by applying a low pass filter (302) to the total current (i.sub.t), and determine the switching frequency (f.sub.s) based on the average current (i.sub.tavg).

7. The apparatus (100) of claim 1 wherein, when the apparatus (100) is operating as an inverter, the reference signal (120) comprises an AC reference voltage (v.sub.ac,ref), the controlled signal comprises the AC voltage (v.sub.ac), and the controller (102) is configured to: determine a first error signal (e.sub.1) by subtracting the AC voltage (v.sub.ac) from the AC reference voltage (v.sub.ac,ref); and generate the duty cycle (D) by applying a first control algorithm (316) to the first error signal (e.sub.1).

8. The apparatus (100) of claim 1 wherein the first control algorithm (316) comprises a proportional plus integral (PI) control algorithm.

9. The apparatus (100) of claim 1 wherein, when the apparatus (100) is operating as an inverter, the reference signal (120) comprises an AC reference current (i.sub.ac,ref), the controlled signal comprises an AC current (i.sub.ac) corresponding to the AC voltage (v.sub.ac), and the controller (102) is configured to: determine the first error signal (e.sub.1) by subtracting the AC current (i.sub.ac) from the AC reference current (i.sub.ac,ref); and generate the duty cycle (D) by applying the first control algorithm (316) to the first error signal (e.sub.1).

10. The apparatus (100) of claim 1 wherein, when the apparatus (100) is operating as an inverter, the reference signal (120) comprises the AC reference voltage (v.sub.ac,ref), the controlled signal comprises the AC voltage (v.sub.ac), and the controller (102) is configured to: determine the first error signal (e.sub.1) by subtracting the AC voltage (v.sub.ac) from the AC reference voltage (v.sub.ac,ref); generate a second reference signal (404) by applying a voltage loop control algorithm (406) to the first error signal (e.sub.1); determine a second error signal (e.sub.2) by subtracting the AC current (i.sub.ac) from the first error signal (e.sub.1); and generate the duty cycle (D) by applying a current loop control algorithm (402) to the second error signal (e.sub.2).

11. The apparatus (100) of claim 1 wherein, when the apparatus (100) is operating as a rectifier, the reference signal (120) comprises a DC reference voltage (v.sub.ac,ref), the controlled signal comprises the DC voltage (V.sub.dc), and the controller (102) is configured to: determine a DC voltage error signal (e.sub.DC) by subtracting the DC voltage (V.sub.dc) from the DC reference voltage (V.sub.dc,ref); generate a voltage control signal (604) by applying a DC voltage loop control algorithm (606) to the voltage error signal (e.sub.DC); generate an AC current reference signal (i.sub.ac,ref) by multiplying the voltage control signal (604) by an absolute value of the AC voltage (|v.sub.ac|); determine an AC current error signal (608) by subtracting an absolute value of the AC current (|i.sub.ac|) from the AC current reference signal (i.sub.ac,ref); and generate the duty cycle (D) by applying an AC current loop control algorithm (610) to the AC current error signal (608).

12. A method (700) for operating a bi-directional AC/DC power conversion topology (104), the AC/DC power conversion topology (104) comprising a low frequency switching network, a high frequency switching network, and one or more inductors, wherein the high frequency switching network comprises a plurality of high frequency switching devices, and the power conversion topology (104) is configured to transfer power between a DC voltage and an AC voltage, the method (700) comprising: generating (702) a duty cycle based on a reference signal and a controlled signal; determining (704) a switching frequency based on a total current (i.sub.t) flowing through the one or more inductors (L.sub.1, L.sub.2, . . . L.sub.n), the duty cycle (D), and one of the DC voltage (V.sub.dc) and the AC voltage (v.sub.ac); and generating (710) high frequency switch control signals based on the switching frequency and the duty cycle.

13. The method (700) of claim 12 wherein determining the switching frequency comprises adapting (706) the switching frequency to create an available charge provided by an inductor during a dead time equal to the stored charge in an output capacitance of the high frequency switching devices.

14. The method (700) of claim 12 wherein, when the power conversion topology (104) is operating as an inverter (808), generating the duty cycle (702) comprises: determining (802) a first error signal by subtracting the AC voltage from an AC reference voltage; and generating (804) the duty cycle by applying a first control algorithm to the first error signal.

15. The method (700) of claim 12 wherein, when the power conversion topology (104) is operating as a rectifier (810), generating the duty cycle (702) comprises: determining (902) a DC voltage error signal by subtracting the DC voltage from the DC reference voltage; generating (904) a voltage control signal by applying a DC voltage loop control algorithm to the voltage error signal; generating (906) an AC current reference signal by multiplying the voltage control signal by an absolute value of the AC voltage; determining (908) an AC current error signal by subtracting an absolute value of the AC current from the AC current reference signal; and generating (910) the duty cycle by applying an AC current loop control algorithm to the AC current error signal.

16. The method (700) of claim 12 wherein, when the power conversion topology (104) is operating as a rectifier, the switching frequency (f.sub.s) is determined based on the DC voltage (V.sub.dc), and when the power conversion topology (104) is operating as an inverter, the switching frequency (f.sub.s) is determined based on the DC voltage (V.sub.dc) and the AC voltage (v.sub.ac).

17. The method (700) of claim 12, further comprises using the switching frequency (f.sub.s) to create an available charge (Q.sub.L1) provided by an inductor (L.sub.1) during a dead time (t.sub.dt) equal to a stored charge (Q.sub.ZVS1) in an output capacitance (122) of the high frequency switching devices (S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb).

18. The method (700) of claim 12 wherein the switching frequency (f.sub.s) is limited to a predetermined maximum frequency (f.sub.s,max).

19. The method (700) of claim 12 wherein the power conversion topology (104) comprises one or more phases (126).

20. The method (700) of claim 12, further comprises determining an average current (i.sub.tavg) by applying a low pass filter (302) to the total current (i.sub.t), and determine the switching frequency (f.sub.s) based on the average current (i.sub.tavg).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In the following detailed portion of the present disclosure, the invention will be explained in more detail with reference to the example embodiments shown in the drawings, in which like references indicate like elements and:

[0024] FIG. 1 illustrates a schematic block diagram of an exemplary bi-directional AC/DC power conversion apparatus incorporating aspects of the disclosed embodiments.

[0025] FIG. 2 illustrates exemplary graphs showing primary waveforms during inverter operation of a high frequency switching network incorporating aspects of the disclosed embodiments.

[0026] FIG. 3 illustrates a schematic block diagram of an exemplary control scheme for operating a bi-directional AC/DC conversion topology incorporating aspects of the disclosed embodiments.

[0027] FIG. 4 illustrates a schematic block diagram of a dual control loop control scheme for controlling inverter operation of a bi-directional AC/DC conversion topology incorporating aspects of the disclosed embodiments.

[0028] FIG. 5 illustrates exemplary graphs showing primary waveforms during rectifier operation of a high frequency switching network incorporating aspects of the disclosed embodiments.

[0029] FIG. 6 illustrates a schematic block diagram of an exemplary control scheme configured for rectifier operation of a bi-directional AC/DC conversion topology incorporating aspects of the disclosed embodiments.

[0030] FIG. 7 illustrates a flow chart of an exemplary method for controlling a bi-directional AC/DC conversion topology incorporating aspects of the disclosed embodiments.

[0031] FIG. 8 illustrates a flow chart of an exemplary method for generating a duty cycle during inverter operation of a power conversion topology incorporating aspects of the disclosed embodiments.

[0032] FIG. 9 illustrates a flow chart of an exemplary method for generating a duty cycle during rectifier operation of a power conversion topology incorporating aspects of the disclosed embodiments.

DETAILED DESCRIPTION OF THE DISCLOSED EMBODIMENTS

[0033] Referring to FIG. 1, a diagram of an exemplary bi-directional AC/DC power conversion apparatus 100 is illustrated. The apparatus 100 of the disclosed embodiments is directed to an improved bi-directional AC/DC power conversion apparatus 100 incorporating an improved controller 102 configured to efficiently operate an AC/DC power conversion topology 104. The apparatus 100 is appropriate for applications such as converting grid power to conditioned DC power as is done when powering telecom equipment, or for converting DC power to AC power such as for use in photovoltaic systems.

[0034] As is shown in the example of FIG. 1, the apparatus 100 includes a bi-directional AC/DC power conversion topology 104 comprising a low frequency switching network 106, a high frequency switching network 108, and one or more inductors L.sub.1, L.sub.2, . . . L.sub.n. The high frequency switching network 108 includes a plurality of high frequency switching devices S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb. The power conversion topology 104 is configured to transfer power between a DC voltage (V.sub.dc) and an AC voltage (v.sub.ac).

[0035] A controller 102 is coupled to the power conversion topology 104 and is configured to receive the DC voltage (V.sub.dc), the AC voltage (v.sub.ac), and a total current (i.sub.t) flowing through the one or more inductors L.sub.1, L.sub.2, . . . L.sub.n. The controller 102 produces the high frequency switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb configured to operate the high frequency switching devices S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb.

[0036] In one embodiment, the controller 102 is configured to generate a duty cycle (D)) based on a reference signal 120 and a controlled signal 118. The controller 102 is also configured to determine a switching frequency (f.sub.s) based on the total current (i.sub.t), the duty cycle (D), and one or more of the DC voltage (V.sub.dc) and the AC voltage (v.sub.ac); and generate 116 the high frequency switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb based on the switching frequency (f.sub.s) and the duty cycle (D).

[0037] Power flow in the apparatus 100 is provided by the bi-directional AC/DC power conversion topology 104. The bi-directional AC/DC power conversion topology 104 is configured to provide a low component count and efficient power handling capabilities. The conversion topology 104 employs a low frequency switching network 106 coupled in parallel with the DC power V.sub.dc, also referred to herein as the DC voltage v.sub.dc. The low frequency switching network 106 includes two switching devices S.sub.A, S.sub.B, coupled in series between a positive DC bus 128 and a negative DC bus 130 and forming a central node 132. The low frequency switching network 106 typically operates at a frequency corresponding to the AC voltage v.sub.ac and supports conversion between AC and DC power.

[0038] Magnetic components in the power conversion topology 104 are provided by inductors L.sub.1, L.sub.2, . . . L.sub.n coupled between the AC voltage v.sub.ac and each phase 126 of the high frequency switching network 108. A capacitor C.sub.ac, coupled in parallel with the AC voltage v.sub.ac, acts as an output capacitor when the apparatus 100 is operating as an inverter. A high frequency switching network 108 includes one or more pairs of switching devices S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb where each pair, such as the first pair S.sub.1a, S.sub.n1b, is coupled in series between the positive DC bus 128 and the negative DC bus 130 and forms a central node, such as central node 134. Each central node 134, 136, 138 is coupled between a different one of the inductors L.sub.1, L.sub.2, . . . L.sub.n, and the AC voltage v.sub.ac. In this fashion each pair of switching devices S.sub.1a, S.sub.1b with its corresponding inductor L.sub.1 forms a phase 126.

[0039] In the embodiment illustrated in FIG. 1, the power conversion topology 104 is shown as having three phases, however any number of phases may be advantageously employed such as one phase, two phases, ten phases, or twenty phases where the number of phases is a matter of design choice. Use of greater number of phases can aid in reducing ripple currents in the AC voltage v.sub.ac.

[0040] As used herein the term switching network refers to a circuit having one or more pairs of switching devices, where each pair of switching devices is coupled in series between a positive DC rail and a negative DC rail. For example, the low frequency network 104 has one pair of switching devices S.sub.A, S.sub.B coupled in series between the positive DC rail 128 and the negative DC rail 130 forming a central node 132. The exemplary high frequency switching network 108 is shown with at least three pairs of switching devices, namely a first pair S.sub.1a & S.sub.1b, a second pair S.sub.2a & S.sub.2b, and an nth pair S.sub.na, S.sub.nb. Note that while the high frequency switching network 108 is illustrated with three pairs of switching devices S.sub.1a, S.sub.1b, S.sub.1a, S.sub.1b, S.sub.na, S.sub.nb, a switching network may include any desired number of pairs of switching devices, such as one, two, three, ten, or twenty.

[0041] In one embodiment the switching devices S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb are semiconductor switching devices, such as metal oxide semiconductor field effect transistors (MOSFETs). However, any appropriate type of switching device configured to efficiently control current flow at the desired switching frequencies may be advantageously employed without straying from the spirit and scope of the present disclosure. As used herein a switch or switching device is referred to as on or turned on when it is conducting current and a switch or switching device is referred to as off or turned off when it is not conducting current.

[0042] As used herein the term bi-directional AC/DC power conversion topology refers to the bi-directional AC/DC power conversion topology 104 described above and illustrated in FIG. 1. As used herein the term inverter refers to a power conversion apparatus configured to receive DC power and produce AC power, and the term rectifier refers to a power conversion apparatus configured to receive AC power and produce DC power. The apparatus 100 is configured to be bi-directional which means it can operate as either an inverter or a rectifier.

[0043] When desired, a DC link capacitor C.sub.dc may be coupled in parallel with the DC voltage V.sub.dc to provide a more stable DC voltage for the converter. For example, when operating as an inverter, a DC link capacitor C.sub.dc may be employed to remove ripple from the DC input voltage which may have been created by a prior power conversion stage.

[0044] The controller 102 is coupled to the bi-directional AC/DC power conversion topology 104 and configured to operate the switching devices S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb to the facilitate power flow through the power conversion topology 104. Bi-directional power transfer between the DC voltage v.sub.dc and the AC voltage v.sub.ac is managed by the controller 102. The AC and DC v.sub.ac, v.sub.ac voltages coupled to the converter are received by the controller 102 along with the total current i.sub.t flowing through the inductors.

[0045] The controller 102 is configured to receive signals 110 from the power conversion topology 104. The received signals 110 allow the controller 102 to monitor behaviour of the power conversion topology 104 and include the DC voltage v.sub.dc, the AC voltage v.sub.ac, and a total current i.sub.t flowing through the one or more inductors L.sub.1, L.sub.2, . . . L.sub.n. The total current i.sub.t is the sum of all currents flowing through each individual inductor i.sub.L1, i.sub.L2, . . . i.sub.Ln.

[0046] Operation of the switching networks 106, 108 is accomplished by switch control signals S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb generated by the controller 102, where each switch control signal S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb is configured to operate a respective one of the switching devices S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb. In certain embodiments it may be beneficial to employ gate drivers between the controller 102 and the switching networks 106, 108 to amplify and isolate the switch control signals S.sub.A, S.sub.B, S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb.

[0047] Generally, controllers for an AC/DC power conversion stage should achieve optimal and efficient performance while satisfying several important criteria. A controller should operate with a reduced number of power handling components. For example, no additional capacitors or inductors should be required to monitor currents or to achieve zero voltage switching (ZVS) operation. A controller should provide bi-directional power flow capability, allowing the power conversion topology 104 to be operated as either a rectifier or an inverter. For reliability and efficiency, the controller should maintain ZVS operation throughout a wide range of input and output voltage variations. Beneficially, the above criteria should be achieved using a simple and easy to implement control scheme.

[0048] A reference signal 120 is used by the controller 102 as a target value for a desired system output referred to herein as the controlled signal 118. When operating as an inverter, the system output is the AC voltage v.sub.ac, and the controlled signal 118 is a signal corresponding to the AC voltage v.sub.ac. Similarly, when operating as a rectifier, the system output is the DC voltage v.sub.ac, and the controlled signal 118 is a signal corresponding to the DC voltage V.sub.dc.

[0049] The controller is configured to generate 114 a duty cycle D based on the controlled signal 118 and the reference signal 120. As will be discussed further below, in the illustrated embodiment the controller 102 generates 114 the duty cycle D by comparing the controlled signal 118 with the reference signal 120 to determine an error signal and applying a control algorithm to generate the duty cycle D.

[0050] A switching frequency f.sub.s is determined 112 by the controller 102 based on the generated duty cycle D, the total current i.sub.t, and one or more of the DC voltage v.sub.dc, and the AC voltage v.sub.ac. Control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb are generated 116 based on the duty cycle D and the switching frequency f.sub.s, where the frequency f.sub.s is configured to ensure ZVS operation of the switching devices in the high frequency switching network 108.

[0051] FIG. 2 illustrates graphs 200 showing primary waveforms for the first phase 126 of the high frequency switching network 108 while the exemplary apparatus 100 is operating as an inverter. In the graphs 200, time is depicted along the horizontal axis 202 increasing to the right and signal magnitude is depicted along the vertical axis 204 increasing upwards. The graphs 200 depict operation of the high frequency switches S.sub.1a, S.sub.1b during a positive portion of the AC voltage v.sub.ac cycle. During the positive portion of the AC voltage v.sub.ac cycle switching device S.sub.A of the low frequency switching network 106 is turned off and switching device S.sub.B of the low frequency switching network is turned on, and the reference voltage 120 will be positive. The primary waveforms for the first phase 126 are periodic with a single period T marked below graph 210 for reference. The period T equals an inverse of the switching frequency T=1/f.sub.s. The duty cycle corresponds to an amount of time the first switching device S.sub.1a remains on during a period and is shown as an interval DT above graph 206. Dead time is an interval during which both switching devices S.sub.1a and S.sub.1b are turned off and is indicated by intervals t.sub.dt in the graphs 200.

[0052] Graph 206 illustrates the control signals for switching device S.sub.1a and switching device S.sub.1b. The first switching device S.sub.1a is on during the periods indicated by S.sub.1a ON, and the second switching device S.sub.1b is on during the period T indicated by S.sub.1b ON.

[0053] Graph 208 illustrates current I.sub.L1 through the first inductor L.sub.1. The maximum inductor current is indicated as I.sub.L1+, the minimum inductor current is indicated as I.sub.L1?, and the average inductor current is indicated as I.sub.L1ave.

[0054] Graph 210 illustrates voltage across the first switching device v.sub.s1a and the second switching device v.sub.s2a. The voltages across the two switching devices transition from zero (0) to the DC voltage v.sub.dc during the dead time tat. For example, the second switching device S.sub.1b is turned off at time t.sub.5 and the voltage across the second switching device v.sub.s2a transitions to zero during the dead time t.sub.dt between time t.sub.5 and t.sub.6.

[0055] An important consideration for reliable and efficient operation of the apparatus 100 is to maintain ZVS operation of the switching devices S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb in the high frequency switching network 108. The graphs 200 illustrate converter 100 operation during the desired ZVS operation. In order to achieve ZVS operation, the charge Q.sub.L1 stored on an output capacitance C.sub.oss off one switching devices, such as switching device S.sub.1b, must be removed prior to turning on the next switching device, such as switching device S.sub.1a. This transition is illustrated as time interval t.sub.5-t.sub.6 in the graphs 200.

[0056] During the positive AC cycle, as depicted in the graphs 200, the switching device S.sub.1b naturally achieves ZVS operation due to the higher value of inductor current I.sub.L1+ at its turn on instant t.sub.4. However, for the other switching device S.sub.1a the lower value of inductor current I.sub.L1? available at the switching instant t.sub.5 may not be sufficient to guarantee ZVS operation and may require a change in frequency to achieve ZVS operation.

[0057] The stored charge Q.sub.ZVS1 that needs to be removed across the switching device S.sub.1a and added to the switching device S.sub.1b to achieve ZVS operation can be calculated as shown in equation (1):

[00001]$\begin{array}{cc}{Q}_{ZVS1}=2C_{\mathrm{oss}}{V}_{dc}& \left(1\right)\end{array}$

where C.sub.OSS is the output capacitance of a switching device, such as switching device S.sub.1a. The output capacitance C.sub.OSS can typically be obtained from data sheets of the switching devices being used. The available negative charge Q.sub.L1 stored in the inductor L.sub.1 is given by equation (2):

[00002]$\begin{array}{cc}{Q}_{L1}=\frac{-t_{dt}{I}_{L1-}}{2}& \left(2\right)\end{array}$

where t.sub.dt is the dead-time between turn off of the switching device S.sub.1b and the turn on of the switching device S.sub.1a, and I.sub.L1? is the inductor L.sub.1 current at the time at or just before the turn on instant of Sla. The value of I.sub.L1? is given by equation (3):

[00003]$\begin{array}{cc}{I}_{L1-}=\frac{.Math.i_{tavg}.Math.}{n}-\frac{\left(1-D\right).Math.v_{ac}.Math.}{2L_1{f}_s}& \left(3\right)\end{array}$

where i.sub.tavg is the average total current through all the inductors L.sub.1, L.sub.2, . . . L.sub.n, n is the number of phases, D is the duty cycle, v.sub.ac is the AC voltage, f.sub.s is the switching frequency of the high frequency switching network 108, and L.sub.1 is the inductor value of the first phase 126.

[0058] To achieve ZVS operation, the available charge Q.sub.L1 needs to be equal to the stored charge Q.sub.ZRS1. Setting Q.sub.L1=Q.sub.ZRS1 results in a switching frequency as shown in equation

[00004]$\begin{array}{cc}{f}_s=\frac{\left(1-D\right).Math.v_{ac}.Math.}{2L_1\left(\frac{.Math.i_{tavg}.Math.}{n}+\frac{4C_{oss}{V}_{dc}}{t_{dt}}\right)}& \left(4\right)\end{array}$

As will be discussed in more detail below, the switching frequency f.sub.s can then be used along with the duty cycle D, to generate switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb for the high frequency switching network 108. The example illustrated above is based on a time period during which the AC voltage v.sub.ac is positive. During the inverse period where the AC voltage v.sub.ac is negative, the switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb will be inverted.

[0059] When multiple phases are employed, such as the three phases illustrated in the exemplary power conversion topology 104, each phase will be spaced equally apart in phase by 360/n degrees, where n is the number of phases.

[0060] FIG. 3 illustrates a block diagram of an exemplary control scheme 300 for operating a bi-directional AC/DC conversion topology incorporating aspects of the disclosed embodiments. The exemplary control scheme 300 is appropriate for use in the controller 102 of the exemplary apparatus 100 described above and illustrated in FIG. 1, and is configured to control inverter operation of the exemplary apparatus 100 where power is flowing from the DC voltage v.sub.dc to the AC voltage v.sub.ac.

[0061] When operating as an inverter the reference signal 120 is an AC reference voltage v.sub.ac,ref corresponding to a desired AC voltage v.sub.ac to be produced by the apparatus 100 while operating as an inverter, and the controlled signal 118 corresponds to the AC voltage v.sub.ac being produced by the apparatus 100. A voltage control loop 114 compares a reference voltage v.sub.ac,ref to the AC voltage v.sub.ac to determine a first error signal e.sub.1. A control algorithm 316 is applied to the error signal e.sub.1 to generate the duty cycle D required to drive the AC voltage v.sub.ac toward its desired value. In one embodiment, the control algorithm 316 includes a proportional plus integral control algorithm. Alternatively, any appropriate loop compensation may be advantageously employed,

[0062] As described above the switching frequency f.sub.s of the high frequency switching network 108 is configured to maintain ZVS operation. ZVS operation is achieved by adjusting 112 the switching frequency f.sub.s to create to create an available charge Q.sub.L1 provided by the inductor L.sub.1 during the dead time tar equal to the charge Q.sub.ZXS1 stored in an output capacitance 122 of any one the high frequency switching devices S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb., as described by equation (4) above. During inverter operation the switching frequency is configured based on the duty cycle D generated by the voltage control loop 114, the AC voltage v.sub.ac produced by the power conversion topology 104, the DC voltage v.sub.dc input to the power conversion topology 104, and the total current flowing to the AC voltage i.sub.t. In the example embodiment illustrated in FIG. 3, equation (4) is used to calculate 112 the switching frequency f.sub.s needed to achieve ZVS operation.

[0063] In one embodiment, a low pass filter 302 is applied to the total current i.sub.t to produce an average total current i.sub.tavg and the switching frequency is configured based on the average total current i.sub.tavg. In certain embodiments, it may be desirable to use a limiter 306 to limit the switching frequency f.sub.s to a maximum switching frequency f'.sub.s. The limited switching frequency f'.sub.s is applied to a voltage-controlled oscillator 304 to produce a frequency reference signal 308. The frequency reference signal 308 may be a triangle signal, a sawtooth waveform or any desired type of frequency reference signal appropriate for generating the desired switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb.

[0064] The frequency reference signal 308 is compared 312 with the duty cycle D generated by the voltage control loop 114, and the resulting modulated frequency reference signal 320 is provided to a dead-time and phase shift generator to create the switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb used to operate the high frequency switching network 108.

[0065] In one embodiment of the exemplary power conversion topology 104 the low frequency switching network 106 operates at the same frequency as the AC voltage v.sub.ac. Control signals S.sub.A, S.sub.B for the low frequency switching network 106 are generated by comparing 314 the AC reference voltage v.sub.ac,ref with an analog ground 318. The resulting modulated AC voltage signal 322 is fed to a dead-time and phase shift generator to produce control signals S.sub.A, S.sub.B for the low frequency switching network 106.

[0066] FIG. 4 illustrates a block diagram of a dual control loop inverter control scheme 400 incorporating aspects of the disclosed embodiments. In certain inverter applications it may be desirable to control both the AC voltage v.sub.ac as well as the AC current lac. The exemplary dual control scheme 400 incorporates an outer voltage control loop 410 similar to the voltage control loop 114 described above where the controlled signal 118 is the AC voltage v.sub.ac and the reference signal 120 is an AC voltage reference signal v.sub.ac,ref. Subtracting the controlled signal 118 from the reference signal 120 provides a first error signal e.sub.1.

[0067] Applying a voltage loop control algorithm 406 to the first error signal e.sub.1 generates a second reference signal 404. The inner control loop 408 receives the second control signal 404 and subtracts the ac current i.sub.ac from the second reference signal 404 to produce a second error signal e.sub.2. Applying a current loop control algorithm 402 to the second error signal e.sub.2 produces the duty cycle D, and the duty cycle D is used to adapt the switching frequency f.sub.s and modulate the switch control signals S.sub.1a, S.sub.1b, . . . S.sub.na, S.sub.nb as shown in the exemplary control scheme 300.

[0068] FIG. 5 illustrates graphs 500 showing primary waveforms for the first phase 126 of the high frequency switching network 108 while the exemplary apparatus 100 is operating as a rectifier. In the graphs 500 time is depicted along the horizontal axis 502 increasing to the right and signal magnitude is depicted along the vertical axis 504 increasing upwards.

[0069] The graphs 500 depict operation of the high frequency switches S.sub.1a, S.sub.1b during a positive portion of the AC voltage v.sub.ac cycle. During the positive portion of the AC voltage v.sub.ac cycle switching device S.sub.A of the low frequency switching network 106 is turned off and switching device S.sub.B of the low frequency switching network is turned on, and the reference voltage 120 will be positive.

[0070] The primary waveforms for the first phase 126 of the high frequency switching network 108 are periodic and have a period T, marked with an arrow below graph 510. The period T is equal to an inverse of the switching frequency T=1/f.sub.s. The duty cycle D corresponds to an amount of time the first switching device S.sub.1a remains on during a period and is illustrated by an interval DT above graph 506. Dead time is an interval during which control signals for both switching devices S.sub.1a and S.sub.1b are off and is indicated by intervals t.sub.dt in the graphs 500.

[0071] Graph 506 illustrates the control signals for the switching device S.sub.1a and the switching device S.sub.1b. The first switching device S.sub.1a is on during the periods indicated by S.sub.1aON, and the second switching device S.sub.1b is on during the period indicated by S.sub.1b ON.

[0072] Graph 508 illustrates current I.sub.L1 through the first inductor L.sub.1. The maximum inductor current is indicated as I.sub.L1+, the minimum inductor current is indicated as I.sub.L1?, and the average inductor current is indicated as I.sub.L1ave.

[0073] Graph 510 illustrates voltage across the first switching device v.sub.s1a and the second switching device v.sub.s2a. The voltages across the two switching devices transition between zero (0) and the DC voltage v.sub.dc during the dead time t.sub.dt. For example, the second switching device S.sub.1b is turned on at time t.sub.5 and the voltage across the second switching device v.sub.s2a transitions from zero to the DC Voltage V.sub.dc during the following dead time t.sub.dt between time t.sub.5 and t.sub.6.

[0074] During rectifier operation, power is flowing from the AC voltage v.sub.ac to the DC voltage v.sub.ac within the power conversion topology 104. The available charge Q.sub.L1 and stored charge Q.sub.ZVS1 during rectifier operation are the same as described above with reference to inverter operation and are given by equation (1) and equation (2). The inductor current I.sub.L1? at the instant before turn on of the switching device S.sub.1a is shown in equation (5):

[00005]$\begin{array}{cc}{I}_{L1-}=\frac{.Math.i_{tavg}.Math.}{n}-\frac{\left(1-D\right)D{V}_{dc}}{2L_1{f}_s}& \left(5\right)\end{array}$

where the symbols in equation (5) are the same as described above with reference to equations (1) through (4).

[0075] To achieve ZVS operation, the available charge Q.sub.L1 provided by the inductor during the dead time must be equal to the charge Q.sub.ZVS1 stored on the output capacitance of the switching device S.sub.1a. Setting the available charge Q.sub.L1 from equation (2) equal to the stored charge Q.sub.ZVS1 given by equation (1), substituting equation (5) for the inductor current I.sub.L1?, and solving for the switching frequency yields the switching frequency f.sub.s required for ZVS operation during rectifier operation as shown in equation (6):

[00006]$\begin{array}{cc}{f}_s=\frac{\left(1-D\right)D{V}_{dc}}{2L_1\left(\frac{.Math.i_{tavg}.Math.}{n}+\frac{4C_{oss}{V}_{dc}}{t_{dt}}\right)}& \left(6\right)\end{array}$

[0076] Note that in contrast with the inverter operation shown in equation (4) above, the switching frequency f.sub.s for rectifier operation shown in equation (6) is independent of the AC voltage v.sub.ac.

[0077] FIG. 6 illustrates a block diagram of an exemplary control scheme 600 configured for rectifier operation of a bi-directional AC/DC power conversion topology incorporating aspects of the disclosed embodiments. The exemplary control scheme 600 is appropriate for use in the controller 102 of the exemplary apparatus 100 described above and illustrated in FIG. 1, and is configured to control rectifier operation of the exemplary apparatus 100 where power is flowing from the AC voltage v.sub.ac to the DC voltage V.sub.dc. It should be noted that certain elements of the exemplary control scheme 600 are similar to corresponding elements in the exemplary control scheme 300 described above and with reference to FIG. 3 where like references indicate like elements.

[0078] The exemplary control scheme 600 employs a dual control loop structure with an outer voltage control loop 616 and an inner current control loop 618. During rectifier operation, the controlled signal 118 corresponds to the DC voltage v.sub.dc, and the reference signal 120 is a desired DC voltage V.sub.dc,ref. The outer voltage control loop subtracts the DC voltage V.sub.dc from the reference signal V.sub.dc,ref. to determine a DC voltage error signal enc. A voltage loop control algorithm 606 is applied to the voltage error signal e.sub.DC to produce the voltage control signal 604. In the illustrated embodiment the voltage loop control algorithm 606 includes a proportional plus integral control algorithm, however any appropriate loop compensation may be advantageously employed. The voltage control signal 604 is then multiplied 612 by an absolute value of the AC voltage |v.sub.ac| to generate a current reference signal i.sub.ac,ref.

[0079] The current control loop subtracts an absolute value of the AC current |i.sub.ac| from the current reference signal i.sub.ac,ref. to determine a current error signal 608. Applying a current loop control algorithm 622 to the current error signal 608 generates the duty cycle to be used to calculate the switching frequency f.sub.s and to generate the modulated frequency reference signal 320. The switching frequency f.sub.s for rectifier operation is generated by applying the relationship of equation (6) to the average total current i.sub.tavg, the DC voltage V.sub.dc, and the duty cycle D. Any appropriate loop compensation may be advantageously employed for the current loop control algorithm 622, such as a proportional plus integral control algorithm.

[0080] The control schemes described above, including control schemes 300, 400, and 600, may be implemented using any appropriate hardware, software, or combination thereof and may include both analog and digital circuitry as desired. For example, the controller 102 may be implemented using a microcontroller (MCU) or other computing or processing device, or the controller 102 may be implemented based on any appropriate combination of digital and/or analog circuitry as desired.

[0081] FIG. 7 illustrates a flow chart of an exemplary method 700 for controlling a bi-directional AC/DC power conversion topology, such as the exemplary power conversion topology 104 described above and with reference to FIG. 1. The exemplary method 700 of the disclosed embodiments is directed to a method for controlling bi-directional power flow through, and ensuring ZVS operation of high frequency switching devices incorporated within, a bi-directional AC/DC power conversion topology. Included in the bi-directional AC/DC power conversion topology are a low frequency switching network, a high frequency switching network, and one or more inductors, wherein the high frequency switching network comprises a plurality of high frequency switching devices, and the power conversion topology is configured to transfer power between a DC voltage and an AC voltage. The exemplary method 700 is appropriate for use in the controller 102 of the exemplary apparatus 100 described above and with reference to FIG. 1.

[0082] The method 700 begins by generating 702 a duty cycle based on a reference signal and a controlled signal. In one example, the power conversion topology may be operating as an inverter and the duty cycle is generated based on a reference signal corresponding to a desired AC voltage and controlled signal corresponding to an AC voltage produced by the power conversion topology. Alternatively, when the power conversion topology is operating as a rectifier, the reference signal may correspond to a desired DC voltage and the controlled signal may be the DC voltage produced by the power conversion topology. The duty cycle is generated by applying a control algorithm to an error signal determined by subtracting the controlled signal from the reference signal.

[0083] A switching frequency is determined 704 based on a total current (i.sub.t), such as the total current i.sub.t flowing through the one or more inductors L.sub.1, L.sub.2, . . . L.sub.n as described above, the duty cycle D, and one or more of the DC voltage v.sub.dc and the AC voltage v.sub.ac. When operating as an inverter both the DC voltage v.sub.dc and the AC voltage v.sub.ac are used in conjunction with equation (4) to determine the switching frequency. Alternatively, when operating as a rectifier the DC voltage is used in conjunction with equation (6) to determine the switching frequency.

[0084] In the exemplary method 700, the switching frequency is configured to provide an available charge Q.sub.L1 produced by current through an inductor during the dead time equal to the charge Q.sub.ZVS1 stored in the output capacitance of a high frequency switching device, such as one of the high frequency switching devices incorporated in the high frequency switching network 108 described above. Ensuring an available charge equal to the stored charge promotes ZVS operation of the high frequency switching network 108.

[0085] In certain embodiments it is beneficial to limit 708 the switching frequency to a pre-determined maximum value. This is useful for example to avoid exceeding design limits of the high frequency switching devices selected for a particular power converter implementation.

[0086] The resulting switching frequency is then used along with the duty cycle D to generate switch control signals configured to operate the high frequency switching devices in the high frequency switching network.

[0087] FIG. 8 illustrates a flow chart of an exemplary method for generating a duty cycle D incorporating aspects of the disclosed embodiments. The exemplary method 800 is appropriate for determining 702 the duty cycle in the exemplary method 700 described above when the bi-directional AC/DC power conversion topology is operating as an inverter.

[0088] In the illustrated embodiment the exemplary method 800 determines 802 whether the power conversion topology is operating as an inverter 808 or as a rectifier 810. When the power converter is operating as an inverter 808 the method 800 determines 804 a first error signal by subtracting the AC voltage from the AC reference voltage. During inverter operation, the AC voltage is the output of the power conversion topology and the AC reference voltage corresponds to a desired AC output voltage.

[0089] A first control algorithm is applied 806 to the first error signal to generate the duty cycle D. The first control algorithm may be any appropriate type of control loop compensation or algorithm, such as a proportional plus integral control algorithm.

[0090] FIG. 9 illustrates a flow chart of an exemplary method 900 for generating a duty cycle D incorporating aspects of the disclosed embodiments. The exemplary method 900 is appropriate for determining 702 the duty cycle in the exemplary method 700 of FIG. 7 described above when the bi-directional AC/DC power conversion topology is operating as rectifier. In the example of FIG. 9, the exemplary method 900 may be used as a continuation of the exemplary method 800 when it is determined 802 that the bi-directional power conversion topology is operating as a rectifier 810.

[0091] As illustrated in FIG. 9, in one embodiment, a DC voltage error signal is determined 902 by subtracting the DC voltage, which is the output of the power conversion topology when operating as a rectifier, from a DC reference voltage. The DC reference voltage corresponds to the desired DC voltage to be produced by the power conversion topology.

[0092] A voltage control signal is generated 904 by applying a DC voltage loop control algorithm to the voltage error signal. Any desired type of control loop compensation may be advantageously employed, such as a proportional plus integral control algorithm or other appropriate type of control algorithm. An AC current reference signal is then determined 908 by multiplying the voltage control signal by an absolute value of the AC voltage being output by the power conversion topology.

[0093] The duty cycle is generated 910 by applying a current loop control algorithm to the AC current error signal. Similar to the other control algorithms described herein, any appropriate type of loop compensation may be advantageously employed for the current loop control algorithm, such as a proportional plus integral control algorithm or other control algorithm as desired.

[0094] When compared with prior art solutions, the control schemes and methods disclosed herein require less sensory equipment to achieve ZVS operation while maintaining minimum RMS current. Less sensory equipment translates to fewer components thereby improving cost and power density. The wide-range ZVS operation of the high frequency switches provided by the improved control schemes and methods result in lower switching losses thereby allowing higher switching frequencies which often translates to higher power densities. The bi-directional power flow provided by the apparatus 100 provides the opportunity to use the same hardware for a wide range of applications such as inverter applications rectifier applications and applications requiring bi-directional power flow.

[0095] Thus, while there have been shown, described and pointed out, fundamental novel features of the invention as applied to the exemplary embodiments thereof, it will be understood that various omissions, substitutions and changes in the form and details of devices and methods illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit and scope of the presently disclosed invention. Further, it is expressly intended that all combinations of those elements, which perform substantially the same function in substantially the same way to achieve the same results, are within the scope of the invention. Moreover, it should be recognized that structures and/or elements shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.