Printed Circuit Board And Method For Soldering A Chip Housing In A Process-Reliable Manner

Abstract

The present disclosure relates to a method for the process-reliable soldering of a chip package onto a printed circuit board for the process-reliable soldering of a chip package. The printed circuit board has a metallic cooling surface, a plurality of metallic contact surfaces surrounding the cooling surface, and, on a side opposite the cooling surface, a rear metallic mating surface, the mating surface being connected to the cooling surface by open vias, and lanes of solder resist being arranged on the cooling surface, which lanes both divide the cooling surface into a plurality of partial surfaces and enclose the vias.

Claims

1. A printed circuit board configured for process-reliable soldering of a chip package, the printed circuit board comprising: a metallic cooling surface, a multiplicity of metallic contact surfaces surrounding the cooling surface, and a rear metallic mating surface on a side opposite the cooling surface, wherein the mating surface is connected to the cooling surface by open vias, and lanes of solder resist are arranged on the cooling surface, which lanes both divide the cooling surface into a plurality of partial surfaces and enclose the vias.

2. The printed circuit board according to claim 1 wherein the partial surfaces are arranged in a grid-like distribution over the cooling surface.

3. The printed circuit board according to claim 1, wherein the vias are arranged distributed in a grid-like manner over the cooling surface.

4. A method for process-reliable soldering of a chip package onto a printed circuit board, the method comprising the steps of: in a providing step, of providing a printed circuit board comprising a metallic cooling surface, a multiplicity of metallic contact surfaces surrounding the cooling surface and, on a side opposite the cooling surface, a rear metallic mating surface, the mating surface being connected to the cooling surface by open vias, and lanes of solder resist arranged on the cooling surface, which lanes both divide the cooling surface into a plurality of partial surfaces and enclose the vias; in a dispensing step, dispensing solder paste onto the partial surfaces and contact surfaces; in a mounting step, arranging a central heat dissipation surface of the chip package over the cooling surface and arranging peripheral contact feet of the chip package over the contact surfaces; in a soldering step, heating the printed circuit board with the chip housing to a soldering temperature, wherein at the soldering temperature the solder paste melts to form solder, the solder bonds to the contact feet and, the contact surfaces, the heat dissipation surface, and the partial surfaces of the cooling surface, and placing the contact feet are placed on the contact surfaces so as to define a distance between the heat dissipation surface and the cooling surface, whereby the solder outgasses through the lanes, excess solder flows off through the vias onto the mating surface, connects to the mating surface and runs on the mating surface; and in a cooling step, enabling the solder to solidify at the contact surfaces and contact feet, between the heat dissipation surface and the partial surfaces, and on the mating surface.

5. The method according to claim 4, further comprising the step of dosing the solder paste onto the partial surfaces with a greater layer thickness than onto the contact surfaces.

6. The method according to claim 4, wherein in the step of dispensing, further comprises the step of dispensing the solder paste onto the partial surfaces with a layer thickness greater than a maximum distance between the heat dissipation surface and the cooling surface.

7. The method according to one claim 4, wherein the step of dispensing further comprises the step of dispensing a template with cut-outs mapping the contact surfaces and the partial surfaces, wherein the solder paste is squeegeed through the cut-outs.

8. The method according to claim 7, wherein the step of dispensing further comprises the step of using a stepped template with a greater material thickness is used in the region of the cut-outs for the partial surfaces than in the region of the cut-outs for the contact surfaces.

9. The method according to claim 8, wherein the step of dispensing further comprises the step of using a thinned squeegee.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0028] Further advantages, features, and details of the various embodiments of this disclosure will become apparent from the ensuing description of a preferred exemplary embodiment and with the aid of the drawings. The features and combinations of features recited below in the description, as well as the features and feature combination shown after that in the drawing description or in the drawings alone, may be used not only in the particular combination recited, but also in other combinations on their own, without departing from the scope of the disclosure. An advantageous embodiment of the present invention is set out below with reference to the accompanying figures, wherein:

[0029] FIG. 1 depicts an illustration of a printed circuit board according to an embodiment example;

[0030] FIG. 2 depicts an illustration of dispensing solder paste onto a printed circuit board according to an embodiment example; and

[0031] FIG. 3 depicts an illustration of a chip package soldered onto a printed circuit board according to an embodiment example.

[0032] The figures are merely schematic representations and serve only to explain the invention. Identical or similarly acting elements are consistently provided with the same reference signs.

DETAILED DESCRIPTION OF THE INVENTION

[0033] As used throughout the present disclosure, unless specifically stated otherwise, the term or encompasses all possible combinations, except where infeasible. For example, the expression A or B shall mean A alone, B alone, or A and B together. If it is stated that a component includes A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Expressions such as at least one of do not necessarily modify an entirety of the following list and do not necessarily modify each member of the list, such that at least one of A, B, and C should be understood as including only one of A, only one of B, only one of C, or any combination of A, B, and C.

[0034] FIG. 1 shows an illustration of a printed circuit board 100 according to an embodiment example. The printed circuit board 100 is configured for the process-safe soldering of a chip package onto a front side of the printed circuit board. The front side can be referred to as the mounting side. The printed circuit board 100 has a metallic cooling surface 102 on the front side. The cooling surface 102 is provided to dissipate heat from the chip package. A plurality of metallic contact surfaces 104 surround the cooling surface 102. On a rear side opposite the front side, the printed circuit board 100 has a rear-side metallic mating surface. The mating surface is connected to the cooling surface 102 by open vias 106. The mating surface is essentially as large as the cooling surface and has a similar contour. The vias 106 extend from the front side to the rear side. Heat can be dissipated from the cooling surface 102 to the mating surface via the vias 106 and radiated to the rear via the mating surface. The vias 106 each have a channel 108 extending from the front to the rear. Excess solder can flow through the channels 108 to the opposite side during soldering. The channels 108 also allow outgassing flux to escape via the rear side. Lanes 110 made of solder resist are arranged on the cooling surface 102. The lanes 110 divide the cooling surface 102 into several partial surfaces 112. The lanes 110 also enclose the vias 106. No solder resist is arranged on the opposite surface.

[0035] In one embodiment, the cooling surface 102 is approximately square and is connected to the mating surface via nine vias 106 arranged in a grid pattern. The vias 106 are each arranged in the corners of the cooling surface 102, at the centers of side edges of the cooling surface 102 and at an intersection of diagonals of the cooling surface 102. The lanes 110 are aligned at right angles to the side edges. The lanes 110 intersect at the intersection of the diagonals and divide the cooling surface 102 into four partial surfaces 112 arranged in a grid pattern. Each partial surface 112 is thus surrounded by four of the vias 106.

[0036] In one embodiment example, each via 106 is surrounded by a surface 114 covered with solder resist. The channels 108 are centered in the surfaces 114. The surfaces 114 are approximately circular. A distance between an edge of the respective channel 108 and an edge of the partial surface 112 essentially corresponds to a width of the lanes 110.

[0037] FIG. 2 shows an illustration of a dispensing of solder paste 200 onto a printed circuit board 100 according to an embodiment example. The printed circuit board 100 essentially corresponds to the illustration in FIG. 1. The solder paste 200 has been dispensed onto the contact surfaces 104 and onto the partial surfaces 112 of the cooling surface 102. No solder paste 200 has been dispensed onto the lanes 110.

[0038] In one embodiment example, four portions 202 of solder paste 200 have been dispensed onto each partial surface 112. The portions 202 are arranged at a slight distance from one another on each partial surface 112. Strips 204 of the partial surfaces 112 are thus exposed between the portions 202. The strips 204 are arranged in a cross shape.

[0039] In one embodiment, a stencil 206 is used for dispensing. The stencil 206 is arranged on the printed circuit board 100 for dispensing and covers it at least in some areas. The solder paste 200 is placed on a rear side of the stencil 206 for dispensing and pushed over the rear side using a squeegee. The stencil 206 has cutouts 208 where the solder paste 200 is to pass through the stencil 206 onto the front side of the printed circuit board 100.

[0040] The cut-outs 208 are located here in the area of the contact surfaces 104 and the cooling surface. The stencil 206 has webs 210 between the individual cut-outs 208. The webs 210 mask the printed circuit board 100 locally and prevent the solder paste 200 from being applied. Webs 210 are arranged between all contact surfaces 104. Similarly, webs 210 are arranged above all lanes 110 and vias. The strips 204 are also kept free by webs 210.

[0041] In one embodiment example, the solder paste 200 has been dispensed with a greater layer thickness on the partial surfaces 112 than on the contact surfaces 104. As a result, more solder paste 200 is stored per surface in the area of the cooling surface than in the area of the contact surfaces 104.

[0042] In one embodiment example, the solder paste 200 is dispensed onto the partial surfaces 112 thicker than a maximum distance provided by the design between the chip housing and the printed circuit board 100. As a result, the solder paste 200 forms a solder paste deposit 212 in the area of the cooling surface to compensate for component tolerances. If the actual distance between the chip housing and the printed circuit board is greater than the maximum distance intended by the design, a gap between the heat dissipation surface of the chip housing and the cooling surface can nevertheless be prevented, since additional solder paste 200 is stored in the solder paste depot 212 to fill the gap.

[0043] If the actual distance is within the range of the maximum distance specified in the design, excess solder flows through the vias 106 to the rear and runs along the mating surface.

[0044] When using a stencil 206 for dispensing, the different layer thicknesses are specified by stencil areas of different thicknesses. The stencil 206 is then referred to as a stepped stencil. In this case, the stencil 206 has a greater material thickness in the area of the cooling surface than in the area of the contact surfaces 104. A thinned squeegee with a flexible edge is used so that the squeegee can follow the differences in material thickness of the stencil 206.

[0045] FIG. 3 shows a representation of a chip package 300 soldered onto a printed circuit board 100 according to an embodiment example. The printed circuit board 100 essentially corresponds to the illustration in FIGS. 1 and 2. The chip housing 300 has a metallic heat dissipation surface 302 and a plurality of metallic contact feet 304 all around. The heat dissipation surface 302 is thermally conductively connected to the cooling surface 102 of the printed circuit board 100 by solder 306. The contact feet 304 are electrically conductively connected to the contact surfaces 104 of the printed circuit board 100 by the solder 306.

[0046] The chip housing 300 has been soldered to the printed circuit board 100 using a reflow soldering process. For this purpose, the chip housing 300 has been placed on the solder paste dispensed as shown in FIG. 2 in such a way that the heat dissipation surface 302 is arranged above the cooling surface 102, while the contact feet 304 are arranged above the contact surfaces 104.

[0047] The circuit board 100, the solder paste and the chip housing are then heated to the soldering temperature of the solder paste. The solder paste melts into liquid solder 306 and the flux contained in the solder paste prepares the metal surfaces for wetting by the liquid solder 306. The flux evaporates in the process. Vaporization can be described as outgassing.

[0048] In the approach presented here, the gaseous flux in the area of the heat dissipation surface 302 can escape to the side or through the open vias 106 to the rear of the printed circuit board 100 to a predominant extent through the solder-free lanes 110 held in place with solder resist. Only a small proportion of the flux forms pores 308 enclosed in the solid solder 306. The gaseous flux can escape so well from the space between the cooling surface 102 and the heat dissipation surface 302 that a porosity of less than 20 percent is achieved in the area of the heat dissipation surface 302.

[0049] When the solder paste has melted, the chip housing 300 sinks so far onto the printed circuit board 100 that the contact feet 304 rest on the associated contact surfaces 104. The contact feet 304 thereby define an adjusting distance between the heat dissipation surface 302 and the cooling surface 102. If excess liquid solder 306 is present in the space between the cooling surface 102 and the heat dissipation surface 302, the excess solder 306 flows down the alleys 110 and through the open vias 106 where it runs on the mating surface since no solder resist is applied there. The excess solder 306 fills up the vias 106 through which it flows.

[0050] In other words, a high void content of solder joints can lead to poor and unreliable solder connections on QFP components with a large gap between the component and the PCB (standoff tolerances 50 to 150 ?m). This means that consistent and reproducible soldering results cannot be achieved.

[0051] In the approach presented here, so-called Solder Mask Defined Pads are used as an array. These solder mask-defined pads promote the outgassing of the flux. A stepped stencil and a thinned squeegee allow solder paste to be applied in different thicknesses. A mating surface is connected via vias for heat dissipation. Excess solder is absorbed by the mating surface.

[0052] Although some contactable copper surface is lost by rasterizing into smaller individual pads, consistently high-quality and reproducible soldering results are achieved. The achievable low void percentage of the solder joints is important, as there are strict specifications here. For example, the void percentage can be kept below 20% using the approach presented here.

[0053] Since the devices and methods described in detail above are examples of embodiments, they can be modified to a wide extent by a person skilled in the art without departing from the scope of the invention. In particular, the mechanical arrangements and the proportions of the individual elements to one another are merely exemplary.