Frequency down-converter with high immunity to blocker and method thereof
10158387 ยท 2018-12-18
Assignee
Inventors
- Serkan Sayilir (San Jose, CA, US)
- Poh Boon Leong (Pleasanton, CA, US)
- Chia-Liang (Leon) Lin (Fremont, CA, US)
Cpc classification
H03D7/1458
ELECTRICITY
H03F1/34
ELECTRICITY
H03F2203/45526
ELECTRICITY
H03D7/1491
ELECTRICITY
International classification
H04B1/10
ELECTRICITY
Abstract
An frequency down-converter includes a mixer configured to receive a RF (radio frequency) signal having a first end and a second end and output an intermediate signal comprising a first end and a second end in accordance with a LO (local oscillator) signal having a first end and a second end, wherein the first end and the second end of the LO signal jointly form a two-phase periodic signal of a fundamental frequency approximately equal to a mean frequency of a desired component of the RF signal. The down-converter further includes an opamp (operational amplifier) configured to receive the intermediate signal and output an output signal having a first end and a second end; a first feedback network configured to couple the second end of the output signal to the first end of the intermediate signal; a second feedback network configured to couple the first end of the output signal to the second end of the intermediate signal; and an auxiliary mixer configured to receive the RF signal and provide a supplemental signal added to the output signal in accordance with the LO signal. Preferably, the auxiliary mixer is based on using the same circuit as the mixer but replacing each switch in the mixer with a switch in series with a capacitor.
Claims
1. A frequency down-converter comprising: a mixer configured to receive a RF (radio frequency) signal comprising a first end and a second end and output an intermediate signal comprising a first end and a second end in accordance with a LO (local oscillator) signal comprising a first end and a second end, wherein the first end and the second end of the LO signal jointly form a two-phase periodic signal of a fundamental frequency approximately equal to a mean frequency of a desired component of the RF signal; an opamp (operational amplifier) configured to receive the intermediate signal and output an output signal comprising a first end and a second end; a first feedback network configured to couple the second end of the output signal to the first end of the intermediate signal; a second feedback network configured to couple the first end of the output signal to the second end of the intermediate signal; and an auxiliary mixer configured to receive the RF signal and provide a supplemental signal added to the output signal in accordance with the LO signal, wherein: the auxiliary mixer is based on using the same circuit topology as the mixer but replacing each switch in the mixer with a switch in series with a capacitor.
2. The frequency down-converter of claim 1, wherein the mixer comprises: a first switch configured to connect the first end of the RF signal to the first end of the intermediate signal when the first end of the LO signal is asserted; a second switch configured to connect the second end of the RF signal to the first end of the intermediate signal when the second end of the LO signal is asserted; a third switch configured to connect the first end of the RF signal to the second end of the intermediate signal when the second end of the LO signal is asserted; and a fourth switch configured to connect the second end of the RF signal to the second end of the intermediate signal when the first end of the LO signal is asserted.
3. The frequency down-converter of claim 1, wherein the auxiliary mixer comprises: a first switch in series with a first capacitor configured to capacitively couple the first end of the RF signal to the second end of the output signal when the first end of the LO signal is asserted; a second switch in series with a second capacitor configured to capacitively couple the second end of the RF signal to the second end of the output signal when the second end of the LO signal is asserted; a third switch in series with a third capacitor configured to capacitively couple the first end of the RF signal to the first end of the output signal when the second end of the LO signal is asserted; and a fourth switch in series with a fourth capacitor configured to capacitively couple the second end of the RF signal to the first end of the output signal when the first end of the LO signal is asserted.
4. The frequency down-converter of claim 1, wherein the first feedback network comprises a parallel connection of a feedback resistor and a feedback capacitor.
5. The frequency down-converter of claim 1, wherein the second feedback network comprises a parallel connection of a feedback resistor and a feedback capacitor.
6. The frequency down-converter of claim 1 further comprising an integrator configured to receive the output signal and output a filtered signal comprising a first end and a second end, a first feedback resistor configured to provide a feedback from the second end of the filtered signal to the first end of the intermediate signal, and a second feedback resistor configured to provide a feedback from the first end of the filtered signal to the second end of the intermediate signal.
7. The frequency down-converter if claim 6, wherein the integrator comprises another opamp, two feed-in resistors, and two feedback capacitors.
8. The frequency down-converter of claim 1, wherein the LO signal is approximately a square wave of an approximately 25% duty cycle.
9. The frequency down-converter of claim 1, wherein the LO signal is approximately a square wave of an approximately 50% duty cycle.
10. The frequency down-converter of claim 1, wherein the frequency down-converter is incorporated in a zero-IF (intermediate frequency) receiver.
11. A method comprising: receiving a RF (radio frequency) signal comprising a first end and a second end; receiving a LO (local oscillator) signal comprising a first end and a second end, wherein the first end and the second end of the LO signal jointly form a two-phase periodic signal of a fundamental frequency approximately equal to a mean frequency of a desired component of the RF signal; mixing the RF signal with the LO signal using a mixer to output an intermediate signal comprising a first end and a second end; converting the intermediate signal into an output signal comprising a first end and a second end using an opamp (operational amplifier) with a negative feedback via a first feedback network and a second feedback network; and mixing the RF signal with the LO signal using an auxiliary mixer to establish a supplementary signal added to the output signal as a supplement, wherein: the auxiliary mixer is based on using the same circuit topology as the mixer but replacing each switch in the mixer with a switch in series with a capacitor.
12. The method of claim 11, wherein the mixer comprises: a first switch configured to connect the first end of the RF signal to the first end of the intermediate signal when the first end of the LO signal is asserted; a second switch configured to connect the second end of the RF signal to the first end of the intermediate signal when the second end of the LO signal is asserted; a third switch configured to connect the first end of the RF signal to the second end of the intermediate signal when the second end of the LO signal is asserted; and a fourth switch configured to connect the second end of the RF signal to the second end of the intermediate signal when the first end of the LO signal is asserted.
13. The method of claim 11, wherein the auxiliary mixer comprises: a first switch in series with a first capacitor configured to capacitively couple the first end of the RF signal to the second end of the output signal when the first end of the LO signal is asserted; a second switch in series with a second capacitor configured to capacitively couple the second end of the RF signal to the second end of the output signal when the second end of the LO signal is asserted; a third switch in series with a third capacitor configured to capacitively couple the first end of the RF signal to the first end of the output signal when the second end of the LO signal is asserted; and a fourth switch in series with a fourth capacitor configured to capacitively couple the second end of the RF signal to the first end of the output signal when the first end of the LO signal is asserted.
14. The method of claim 11, wherein the first feedback network comprises a parallel connection of a feedback resistor and a feedback capacitor.
15. The method of claim 11, wherein the second feedback network comprises a parallel connection of a feedback resistor and a feedback capacitor.
16. The method of claim 11 further comprising using an integrator configured to receive the output signal and output a filtered signal comprising a first end and a second end, a first feedback resistor configured to provide a feedback from the second end of the filtered signal to the first end of the intermediate signal, and a second feedback resistor configured to provide a feedback from the first end of the filtered signal to the second end of the intermediate signal.
17. The method if claim 16, wherein the integrator comprises another opamp, two feed-in resistors, and two feedback capacitors.
18. The method of claim 11, wherein the LO signal is approximately a square wave of an approximately 25% duty cycle.
19. The method of claim 11, wherein the LO signal is approximately a square wave of an approximately 50% duty cycle.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THIS INVENTION
(6) The present invention relates to frequency down-converters. While the specification describes several example embodiments of the invention considered favorable modes of practicing the invention, it should be understood that the invention can be implemented in many ways and is not limited to the particular examples described below or to the particular manner in which any features of such examples are implemented. In other instances, well-known details are not shown or described to avoid obscuring aspects of the invention.
(7) Persons of ordinary skill in the art understand terms and basic concepts related to microelectronics that are used in this disclosure, such as signal, network, capacitor, resistor, switch, feedback, negative feedback, opamp (operational amplifier), buffer, and integrator. Terms and basic concepts like these are apparent and understood to those of ordinary skill in the art and thus will not be explained in detail here.
(8) Throughout this disclosure, a switch is a device used for conditionally connecting a first signal to a second signal in accordance with a state of a control signal. The control signal has two states: an asserted state and a de-asserted state. When the control signal is asserted, the switch is turned on and the first signal and the second signal are effectively connected by the switch. When the control signal is de-asserted, the switch is turned off and the first signal and the second signal are not connected by the switch.
(9) Throughout this disclosure, a differential signal is a composite signal that comprises a first constituent signal and a second constituent signal. The first constituent signal is referred to as a first end, while the second constituent signal is referred to as a second end.
(10) A functional block diagram of a frequency down-converter 200 in accordance with an embodiment of the present invention is shown in
(11) V.sub.LO+ and V.sub.LO form a 2-phase periodic signal that mathematically satisfies the following equation:
V.sub.LO(t)=V.sub.LO+(tT/2)(1)
(12) Here, t denotes a time variable, T is a fundamental period of the 2-phase periodic signal, and 1/T is approximately equal to a mean frequency of a desired component of the RF signal. In an embodiment, both V.sub.LO+(t) and V.sub.LO(t) are approximately a square wave cyclically toggling back and forth between a first level and a second level. When V.sub.LO+(t) is at the first level, it is said to be asserted, otherwise it is said to be de-asserted. The same thing can be said about V.sub.LO(t). A duty cycle of V.sub.LO+(t) is a percentage of time that V.sub.LO+(t) is asserted. The same thing can be said about V.sub.LO(t). In an embodiment, both V.sub.LO+(t) and V.sub.LO(t) have approximately a 25% duty cycle. In another embodiment, both V.sub.LO+(t) and V.sub.LO (t) (t) have approximately a 50% duty cycle. In a yet another embodiment, both V.sub.LO+(t) and V.sub.LO(t) (t) have approximately a 33% duty cycle.
(13) In an embodiment, mixer 210 is embodied by using the circuit shown in callout box COB110 in
(14) In an embodiment shown in callout box COB210A, auxiliary mixer 210A comprises: a first (second, third, fourth) switch SW1 (SW2, SW3, SW4) configured to connect V.sub.RF+ (V.sub.RF-, V.sub.RF+, V.sub.RF-) to the V.sub.B (V.sub.B, V.sub.B+, V.sub.B+) via a first (second, third, fourth) capacitor C1 (C2, C3, C4) when V.sub.LO+ (V.sub.LO-, V.sub.LO-, V.sub.LO+) is asserted. As far as circuit topology is concerned, auxiliary mixer 210A is of the same circuit topology as mixer 210 except for further including capacitors C1, C2, C3, and C4 for a purpose of capacitive coupling. As far as signal interaction is concerned, mixer 210 is configured to couple the RF signal (V.sub.RF+ and V.sub.RF) to the intermediate signal (V.sub.A+ and V.sub.A), while auxiliary mixer 210A is configured to coupling the RF signal (V.sub.RF+ and V.sub.RF) to the output signal (V.sub.B and V.sub.B+).
(15) In an embodiment, both feedback networks 230 and 240 are embodied using the circuit shown in callout box COB130 in
(16) In an optional embodiment, frequency down-converter 200 further includes an additional network 250 comprising an integrator 251, a first resistor R1, and a second R2. Integrator 251 comprises an opamp 252, two feed-in resistors RP and RN, and two feedback capacitors CP and CN. The purpose of using the additional network 250 will be explained later. Excluding the additional network 250, frequency down-converter 200 is the same as the conventional frequency converter 100 of
(17) In addition, unlike the conventional N-path 150 in
(18) The additional network 250 is configured to receive the output signal (i.e. V.sub.B+ and V.sub.B) and output a filtered signal comprising a first end V.sub.C+ and a second end V.sub.C using integrator 251. Opamp 220, integrator 251, along with feedback networks 230 and 240 and resistors R1 and R2 form a biquad filter that can provide a second order low-pass filtering function. Biquad filters are well known to those of ordinary skills in the art and thus not described in detail here. It is well known to persons stilled in the art that an integrator (such as integrator 251) can be embodied using an opamp (such as opamp 252) along with two feed-in resistors (such R1 and R2) and two feedback capacitors (such as CP and CN). Therefore, this is not described in detail herein.
(19) A functional block diagram of a zero-IF receiver 300 is shown in
(20) Both the first frequency down-converter 330 and the second frequency down-converter 340 are embodied using frequency down-converter 200 of
V.sub.LOQ+(t)=V.sub.LOI+(tT/4)(2)
V.sub.LOI(t)=V.sub.LOQ+(tT/4)(3)
V.sub.LOQ(t)=V.sub.LOI(tT/4)(4)
(21) Here, t denotes a time variable, T is a fundamental period of the 4-phase periodic signal, and 1/T is approximately equal to a mean frequency of a desired component of the input RF signal. In an embodiment, V.sub.LOI+(t), V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ(t) are all approximately a square wave cyclically toggling back and forth between a first level and a second level. When V.sub.LOI+(t) is at the first level, it's said to be asserted, otherwise it's said to be de-asserted. The same thing can be said about V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ(t). A duty cycle of V.sub.LOI+(t) is a percentage of time that V.sub.LOI+(t) is asserted. The same thing can be said about V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ(t). In an embodiment, V.sub.LOI+(t), V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ all have approximately a 25% duty cycle. In another embodiment, V.sub.LOI+(t), V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ all have approximately a 50% duty cycle. In a yet another embodiment, V.sub.LOI(t), V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ all have approximately a 33% duty cycle.
(22) Buffers 310 and 320 provide an isolation between frequency down-converters 330 and 340, but they are optional. When buffers 310 and 320 are not used, both V.sub.RFI+ and V.sub.RFQ+ are the same as V.sub.I+, while V.sub.RFI and V.sub.RFQ are the same as V.sub.I. It is preferred that buffers 310 and 320 are used when V.sub.LOI+(t), V.sub.LOQ+(t), V.sub.LOI(t), and V.sub.LOQ(t) have approximately a 50% duty cycle to avoid a potentially adverse coupling between frequency down-converters 330 and 340. A buffer is a circuit that provides a good reverse isolation and is well understood by those of ordinary skills in the art and thus not described in detail here.
(23) As illustrated by a flow diagram shown in
(24) Embodiments of the present invention can also be applied to a low-IF receiver, wherein a frequency difference between a LO signal and a desired component of a RF signal is not zero, but substantially smaller than a fundamental frequency of the LO signal.
(25) Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.