METHOD AND SYSTEM FOR DEMODULATING HIGH-ORDER QAM SIGNALS
20180351776 ยท 2018-12-06
Inventors
- Aijun CAO (Kista, SE)
- Juquan MAO (Kista, SE)
- Mhamoud Alfa ABDULLAHI (Kista, SE)
- Pei XIAO (Kista, SE)
- Yonghong GAO (Kista, SE)
- Jan JOHANSSON (Kista, SE)
Cpc classification
H04L25/067
ELECTRICITY
H03M13/3905
ELECTRICITY
International classification
H04L25/06
ELECTRICITY
Abstract
A method and system for demodulating high-order Quadrature Amplitude Modulation (QAM) signals is disclosed. In one embodiment, the system includes a cyclic prefix (CP) removal unit for removing a CP from a received signal to provide a first intermediate signal, wherein the first intermediate signal comprises a plurality of bits; a fast Fourier transform (FFT) unit configured to convert the first intermediate signal into a frequency domain; a soft de-mapper configured to derive a plurality of soft bits based on log-likelihood estimates of the plurality of bits, wherein the soft de-mapper derives each soft bit by using a single linear function to approximate each soft bit; and a decoder configured to decode a signal derived from the soft de-mapper into information.
Claims
1. A system for demodulating high-order Quadrature Amplitude Modulation (QAM) signals, comprising: a cyclic prefix (CP) removal unit for removing a CP from a received signal to provide a first intermediate signal, wherein the first intermediate signal comprises a plurality of bits; a fast fourier transform (FFT) unit configured to convert the first intermediate signal into a frequency domain; a soft de-mapper configured to derive a plurality of soft bits based on log-likelihood estimates of the plurality of bits, wherein the soft de-mapper derives each soft bit by using a single linear function to approximate each soft bit; and a decoder configured to decode a signal derived from the soft de-mapper into information.
2. The system of claim 1 further comprising a parallel-to-serial (P/S) converter coupled between the FFT unit and the soft de-mapper, wherein the P/S converter is configured to convert the output of the FFT unit from a plurality of parallel bits to a serial bit stream.
3. The system of claim 2 further comprising an equalizer coupled between the P/S converter and the soft de-mapper, wherein the equalizer is configured to equalize the serial output of the P/S converter to mitigate a channel effect on the serial output.
4. The system of claim 1 further comprising a de-interleaver coupled between the soft de-mapper and the decoder, wherein the de-interleaver is configured to de-interleave the output of the soft de-mapper and provide de-interleaved soft estimates of the plurality of bits to the decoder.
5. The system of claim 1 wherein the plurality of soft bits comprise eight soft bits c.sub.0, c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.5, c.sub.6 and c.sub.7, wherein c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are associated with a real part of a complex symbol and c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are associated with an imaginary part of the complex symbol.
6. The system of claim 5 wherein the single linear function for soft bits c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are provided as follows:
(c.sub.0)=Z.sub.r; LLR(c.sub.0)=|H.sub.k|.sup.2 Z.sub.r
(c.sub.1)|Z.sub.r|+8A;
(c.sub.2)Z.sub.r|8A|+4A;
(c.sub.3)|Z.sub.r|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=1,2,3 wherein Z.sub.r is the real part of Z(k), wherein Z(k)=Y(k)/H(k), Y(k) is the k.sup.th sample of a received OFDM symbol, H(k) is the channel frequency response (CFR) at the k.sup.th subcarrier, A is a constellation normalization factor, and LLR is a log likelihood ratio indicative of a confidence level of each respective soft bit c.sub.0, c.sub.1, c.sub.2 and c.sub.3.
7. The system of claim 6 wherein the single linear function for soft bits c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are provided as follows:
(c.sub.4)Z.sub.r;
(c.sub.5)|Z.sub.i|+8A;
(c.sub.6)Z.sub.i|8A|+4A;
(c.sub.7)|Z.sub.i|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=4,5,6,7. wherein Z.sub.i is the imaginary part of Z(k).
8. A method of demodulating high-order Quadrature Amplitude Modulation (QAM) signals, comprising: removing a cyclic prefix (CP) from a received signal to provide a first intermediate signal, wherein the first intermediate signal comprises a plurality of bits; converting the first intermediate signal into a frequency domain; deriving a plurality of soft bits based on log-likelihood estimates of the plurality of bits, wherein each soft bit is derived by using a single linear function to approximate each soft bit; and decoding a signal derived from the soft de-mapper into information.
9. The method of claim 1 further comprising converting the first intermediate signal from a plurality of parallel bits to a serial bit stream.
10. The method of claim 2 further comprising equalizing the serial bit stream to mitigate a channel effect on the serial bit stream.
11. The method of claim 1 further comprising de-interleaving the plurality of soft bits prior to decoding.
12. The method of claim 1 wherein the plurality of soft bits comprise eight soft bits c.sub.0, c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.5, c.sub.6 and c.sub.7, wherein c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are associated with a real part of a complex symbol and c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are associated with an imaginary part of the complex symbol.
13. The method of claim 12 wherein the single linear function for soft bits c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are provided as follows:
(c.sub.0)=Z.sub.r; LLR(c.sub.0)=|H.sub.k|.sup.2 Z.sub.r
(c.sub.1)|Z.sub.r|+8A;
(c.sub.2)Z.sub.r|8A|+4A;
(c.sub.3)|Z.sub.r|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=1,2,3 wherein Z.sub.r is the real part of Z(k), wherein Z(k)=Y(k)/H(k), Y(k) is the k.sup.th sample of a received OFDM symbol, H(k) is the channel frequency response (CFR) at the k.sup.th subcarrier, A is a constellation normalization factor, and LLR is a log likelihood ratio indicative of a confidence level of each respective soft bit c.sub.0, c.sub.1, c.sub.2 and c.sub.3.
14. The method of claim 13 wherein the single linear function for soft bits c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are provided as follows:
(c.sub.4)Z.sub.r;
(c.sub.5)|Z.sub.i|+8A;
(c.sub.6)Z.sub.i|8A|+4A;
(c.sub.7)|Z.sub.i|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=4,5,6,7. wherein Z.sub.i is the imaginary part of Z(k).
15. A non-transitory computer-readable medium storing computer-executable instructions that when executed perform a method of demodulating high-order Quadrature Amplitude Modulation (QAM) signals, the method comprising: removing a cyclic prefix (CP) from a received signal to provide a first intermediate signal, wherein the first intermediate signal comprises a plurality of bits; converting the first intermediate signal into a frequency domain; deriving a plurality of soft bits based on log-likelihood estimates of the plurality of bits, wherein each soft bit is derived by using a single linear function to approximate each soft bit; and decoding a signal derived from the soft de-mapper into information.
16. The non-transitory computer-readable medium of claim 15, wherein the method further comprises converting the first intermediate signal from a plurality of parallel bits to a serial bit stream.
17. The non-transitory computer-readable medium of claim 15, wherein the method further comprises de-interleaving the plurality of soft bits prior to decoding.
18. The non-transitory computer-readable medium of claim 15, wherein the plurality of soft bits comprise eight soft bits c.sub.0, c.sub.2, c.sub.3, c.sub.4, c.sub.5, c.sub.6 and c.sub.7, wherein c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are associated with a real part of a complex symbol and c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are associated with an imaginary part of the complex symbol.
19. The non-transitory computer-readable medium of claim 18 wherein the single linear function for soft bits c.sub.0, c.sub.1, c.sub.2 and c.sub.3 are provided as follows:
(c.sub.0)=Z.sub.r; LLR(c.sub.0)=|H.sub.k|.sup.2 Z.sub.r
(c.sub.1)|Z.sub.r|+8A;
(c.sub.2)Z.sub.r|8A|+4A;
(c.sub.3)|Z.sub.r|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=1,2,3 wherein Zr is the real part of Z(k), wherein Z(k) =Y(k)/H(k), Y(k) is the k.sup.th sample of a received OFDM symbol, H(k) is the channel frequency response (CFR) at the k.sup.th subcarrier, A is a constellation normalization factor, and LLR is a log likelihood ratio indicative of a confidence level of each respective soft bit c.sub.0, c.sub.1, c.sub.2 and c.sub.3.
20. The non-transitory computer-readable medium of claim 18 wherein the single linear function for soft bits c.sub.4, c.sub.5, c.sub.6 and c.sub.7 are provided as follows:
(c.sub.4)Z.sub.r;
(c.sub.5)|Z.sub.i|+8A;
(c.sub.6)Z.sub.i|8A|+4A;
(c.sub.7)|Z.sub.i|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=4,5,6,7. wherein Z.sub.i is the imaginary part of Z(k).
Description
BRIEF DESCRIPTION OF THE DRAWING
[0008]
[0009]
[0010]
[0011]
[0012]
DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS
[0013] The following disclosure describes various exemplary embodiments for implementing different features of the subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting.
[0014]
[0015] At the receiver chain 120, the CP is removed from the OFDM symbol by CP removal unit 122, and then a fast Fourier transform (FFT) is performed by FFT unit 124 to convert the signal back to the frequency domain, leading to a deformed version of the original symbols. The output of the FFT unit 124, y[1], y[2], . . . , y[n], is parallel-to-serial converted by PIS converter 126 and then passed through a one-tap equalizer 128 to mitigate the channel effect. The output of the equalizer 128 is fed into a soft de-mapper 130 to derive soft estimates of the transmitted bits which are subsequently de-interleaved by de-interleaver 132 and decoded by channel decoder 134 to recover the information bit. The invention provides low-complexity soft de-mapping algorithms for 256-QAM which can benefit future wireless network digital modulation implementations, in accordance with various embodiments of the invention.
[0016] Referring still to
Y(k)=X(k)H(k)+W(k),
where H(k) is the channel frequency response (CFR) at the k.sup.th subcarrier, Y(k) is the k.sup.th sample of the received OFDM symbol, X(k) is the k.sup.th sample of the transmitted symbol, and W(k) is the complex additive white Gaussian noise (AWGN) with variance .sub.0.sup.2. After performing a zero-forcing (ZF) frequency equalization and phase correction, one can obtain the following expressions:
[0017] Where V(k) is the complex AWGN with variance .sup.2=.sub.0.sup.2/|H (k)|.sup.2. In the case of 256-QAM modulation, the complex symbols X(k)=a.sub.r+ja.sub.i takes on values of a.sub.r={A3A5A7A9A11A13A}; a.sub.i={A3A5A7A9A11A13A}; where the normalisation factor A=1/{square root over (170)} is chosen to keep the average symbol power at unity.
[0018] As shown in
[0019] Let us denote Z(k)=Z.sub.r+jZ.sub.i. It can be seen from the
[0020] As shown in
[0021] In accordance with some embodiments, the soft information of the first bit c.sub.0 is derived, since the first bit is only relevant to In-phase dimension as illustrated in the
[0022] The above equation (4) is complex due to the fact that there are eight terms in both numerator and denominator. A sub-optimal simplified LLR value can be obtained by the approach of log-sum-exponential approximation provided by: log .sub.iexp(.sub.i)=max.sub.i(.sub.i) which enables finding one dominant term in the numerator or denominator by taking the nearest points in the one dimensional constellation. Thus, the equation (4) can be approximated as:
[0023] With Z.sub.r falls into different interval of x-axis, (c0) can be written as a piecewise function of Z.sub.r
[0024] Since the common factor
appears in all the above equations, without loss of generality, it can be neglected, which results in a more compact equation for (c.sub.0) as follows:
[0025] In the exemplary embodiment described above, the piecewise function (c.sub.0) has fifteen sub functions, where each sub function applies to a certain interval. In accordance with some embodiments, it can be further approximated to one linear function (c.sub.0)=Z.sub.r; LLR(c.sub.0)=|H.sub.k|.sup.2 Z.sub.r.
[0026]
(c.sub.1)|Z.sub.r|+8A;
(c.sub.2)Z.sub.r|8A|+4A;
(c.sub.3)|Z.sub.r|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=1,2,3 (22)
[0027] To compare with LLR values of c.sub.0, c.sub.1, c.sub.2, c.sub.3 which are only in connection with the real part of the received complex symbol, the LLR values of c.sub.4, c.sub.5, c.sub.6, c.sub.7 are merely linked with the imaginary part of the received complex symbol. Performing the same work which is done with a one-dimensional mapping constellation, gives rise to the following equations:
(c.sub.4)Z.sub.r;
(c.sub.5)|Z.sub.i|+8A;
(c.sub.6)Z.sub.i|8A|+4A;
(c.sub.7)|Z.sub.i|8A|4A|+2A;
LLR(c.sub.i)=|H.sub.k|.sup.2 (c.sub.i); i=4,5,6,7. (23)
[0028] The developed algorithm was demonstrated in a MATLAB simulation. The outputs of the de-mapper are soft bits, which can be used by soft input decoders. In this simulation, the Viterbi decoder was selected. The adopted corresponding convolutional encoder has the polynomial generator (133, 171) and constraint length of 7. The FFT size of 1024 and a CP (cyclic prefix) length of 64 were used. The fading channel chosen was the one adopted by the IEEE 802.11 working group as follows:
h.sub.k=N(0, 0.5.sub.k.sup.2)+jN(0, 0.5.sub.k.sup.2);
.sub.k.sup.2=.sub.0.sup.2 exp(kT.sub.s/T.sub.RMS);
.sub.0.sup.2=1exp(T.sub.s/T.sub.RMS), (24)
where h.sub.k is the complex channel gain of the k.sup.th tap, T.sub.RMS is the RMS delay spread of the channel, T.sub.s is the sampling period, .sub.0.sup.2 was chosen so that the condition .sub.k.sub.k.sup.21 is satisfied to ensure a same average received power. The number of samples to be taken in the impulse response should ensure sufficient decay of the impulse response tail, e.g. k.sub.max=10T.sub.RMS/T.sub.s. The RMS delay spread was set to be T.sub.RMS=50 ns and the sampling rate was set to f.sub.s=1/T.sub.s=100 MHz.
[0029]
[0030] While various embodiments of the invention have been described above, it should be understood that they have been presented by way of example only, and not of limitation. Likewise, the various diagrams may depict an example architectural or other configuration for the invention, which is done to aid in understanding the features and functionality that can be included in the invention. The present invention is not restricted to the illustrated example architectures or configurations, but can be implemented using a variety of alternative architectures and configurations. Additionally, although the invention is described above in terms of various exemplary embodiments and implementations, it should be understood that the various features and functionality described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment with which they are described, but instead can be applied, alone or in some combination, to one or more of the other embodiments of the invention, whether or not such embodiments are described and whether or not such features are presented as being a part of a described embodiment. Thus the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments.
[0031] One or more of the functions described in this document may be performed by one or more appropriately configured units. The term unit as used herein, refers to software that is stored on computer-readable media and executed by one or more processors, firmware, hardware, and any combination of these elements for performing the associated functions described herein. Additionally, for purpose of discussion, the various units may be discrete units; however, as would be apparent to one of ordinary skill in the art, two or more units may be combined to form a single unit that performs the associated functions according embodiments of the invention.
[0032] Additionally, one or more of the functions described in this document may be performed by means of computer program code that is stored in a computer program product, computer-readable medium, and the like, which is used herein to generally refer to media such as, memory storage devices, or storage unit. These, and other forms of computer-readable media, may be involved in storing one or more instructions for use by processor to cause the processor to perform specified operations. Such instructions, generally referred to as computer program code (which may be grouped in the form of computer programs or other groupings), which when executed, enable the computing system to perform the desired operations.
[0033] It will be appreciated that, for clarity purposes, the above description has described embodiments of the invention which can be implemented with one or more functional units and/or processors. However, it will be apparent that any suitable distribution of functionality between different functional units, processors or domains may be used without detracting from the invention. For example, functionality illustrated to be performed by separate units, processors or controllers may be performed by the same unit, processor or controller. Hence, references to specific functional units are only to be seen as references to suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organization.