POWER MODULE WITH IMPROVED ELECTRICAL AND THERMAL CHARACTERISTICS

Abstract

A power module (1) includes a group of at least three rectangular electrical power components (11, 12, 13, 14, 23, 24, 25, 26) arranged on a substrate (2), wherein in that at least one side (31) of at least one of the rectangular electrical power components (11, 14) is not orthogonal or parallel to a line (3) that passes through the geometric centres of the remaining rectangular electrical power components (12, 13) of the group.

Claims

1. A power module comprising a group of at least three rectangular electrical power components arranged on a substrate, wherein in that at least one side of at least one of the rectangular electrical power components is not orthogonal or parallel to a line that passes through the geometric centres of the remaining rectangular electrical power components of the group.

2. The power module according to claim 1, wherein the geometric centres of all of the rectangular electrical power components that comprise the group are disposed along a straight line.

3. The power module according to claim 1, wherein the group of rectangular electrical power components are electrically connected in parallel.

4. The power module according to claim 1, wherein the rectangular electrical power components are semiconductor switches.

5. The power module according to claim 4, wherein the power module provides a half bridge circuit.

6. The power module according to claim 5, wherein the substrate further comprises an inner load track, two intermediate load tracks and two outer load tracks, each of which load tracks is elongated and extends substantially across the substrate in a first direction; wherein the two intermediate load tracks are arranged adjacent to the inner load track, and each outer load track is arranged on the opposite side of one of the two intermediate load tracks to that of the inner load track with respect to a second direction substantially orthogonal to the first direction; wherein the power module comprises two first sets of semiconductor switches, each first set of semiconductor switches being mounted on the inner load track and electrically connected to an intermediate load track, such that the first sets of semiconductor switches form a first arm of the half bridge circuit; wherein the power module comprises two second sets of semiconductor switches, each second set of semiconductor switches being mounted on an intermediate load track and electrically connected to an outer load track, such that the second sets of semiconductor switches form a second arm of the half bridge circuit.

7. The power module according to claim 4, wherein the external DC power terminals are arranged at one end of the module in the first direction, and one or more AC power terminals are arranged at the opposite end of the module in the first direction.

8. The power module according to claim 1, wherein the angle between a side of at least one of the rectangular electronic power components and a line that passes through the geometric centres of the remaining rectangular electrical power components of the group is within the range 30-60°.

9. The power module according to claim 1, wherein the angle between a side of at least one of the rectangular electronic power components and a line that passes through the geometric centres of the remaining rectangular electrical power components of the group is 45°.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The invention will become more fully understood from the detailed description given herein below. The accompanying drawings are given by way of illustration only, and thus, they are not limitative of the present invention. In the accompanying drawings:

[0027] FIG. 1 shows a plan view of a substrate layout forming part of a first embodiment of the invention;

[0028] FIG. 2 illustrates the relationship between the distribution of semiconductor switches and the line which runs through the geometric centres of semiconductor switches;

[0029] FIG. 3 shows a cross section through an embodiment of the current invention;

[0030] FIG. 4 shows a prior art layout of wirebonds and semiconductor switches;

[0031] FIG. 5 shows a modified version of the layout shown in FIG. 4;

[0032] FIG. 6 shows a second embodiment of the current invention;

[0033] FIG. 7 shows the track layout and semiconductor switch placement of a third embodiment of the current invention;

[0034] FIG. 8 shows a fourth embodiment of the current invention;

[0035] FIG. 9 shows a fifth embodiment of the current invention;

[0036] FIG. 10 shows another representation of the fifth embodiment of the current invention showing the DC and AC terminals, together with control terminals;

[0037] FIG. 11 shows a perspective view of the fifth embodiment of the current invention, and

[0038] FIG. 12 shows a representation of the pad area on the upper surface of a semiconductor switch together with the area required for bonding a wirebond.

DETAILED DESCRIPTION

[0039] Referring now in detail to the drawings for the purpose of illustrating preferred embodiments of the present invention, a first embodiment of the inventive module comprises the substrate, layout of tracks and distribution of semiconductors shown in FIG. 1.

[0040] Here, the substrate 2 comprises an inner load track 4, two intermediate load tracks 5, 6 and two outer load tracks 7, 8, each of which load tracks is elongated and extends substantially across the substrate 2 in a first direction 9. The two intermediate load tracks 5, 6 are arranged adjacent to the inner load track 4, and each outer load track 7, 8 is arranged on the opposite side of one of the two intermediate load tracks 5, 6 to that of the inner load track 4 with respect to a second direction 10, which is substantially orthogonal to the first direction 9. Also shown are two first sets of semiconductor switches 15-18, 19-22, each first set of semiconductor switches being mounted on the inner load track 4 and electrically connected to an intermediate load track 5, 6, such that the first sets of semiconductor switches form a first arm of a half bridge circuit. The module also comprises two second sets of semiconductor switches 11-14, 23-26, each second set of semiconductor switches being mounted on an intermediate load track 5, 6 and electrically connected to an outer load track 7, 8, such that the second sets of semiconductor switches form a second arm of the half bridge circuit.

[0041] The two second sets of semiconductor switches 11-14, 23-26, are shown distributed into two groups in such a way that the semiconductor switches 11, 14, 23, 26, which lie at the ends of the linear distribution of semiconductor switches, are rotated with respect to the other semiconductor switches in the linear distribution so that their sides are at a non-orthogonal and non-parallel angle a to a line 3 that passes through the geometric centres of the remaining semiconductor switches 12, 13, 24, 25 of the group.

[0042] FIG. 2 illustrates the relationship between the distribution of semiconductor switches 11, 12, 13, 14 and the line 3, which runs through the geometric centres of semiconductor switches 12 and 13. Here the angle a between the sides of the outer semiconductor switches 11, 14 and the line 3 is shown.

[0043] FIG. 3 shows a cross section through an embodiment of the current invention showing in more detail the structure on the substrate 2. Here, the substrate 2 is a direct bonded copper (DBC) substrate comprising a lower copper layer 34, a ceramic core 35 and an upper copper layer 33. The upper copper layer 33 has been formed as individual conducting tracks which form the circuitry connecting components which form the electronics of the semiconductor power module. Connections between a semiconductor switch 36 and an adjacent track are made here by a wirebond 37. Also shown is a lead frame 39 which connects one of the tracks to the outside of the module. Such a lead frame connection may be used for power and/or control connections in and out of the power module. In this embodiment the power module is encased in a mould compound 38 which protects the circuitry and components within the module from humidity, dust or physical damage.

[0044] One characteristic of the of the first embodiment shown in FIG. 1 is that the terminations of the wirebonds which connect the semiconductor switches 11, 12, 13, 14 and 23, 24, 25, 26 to the outer load tracks 7, 8 are closer together than the opposite terminations of the wirebonds where they are connected to the semiconductor switches 11, 12, 13, 14 and 23, 24, 25, 26.

[0045] FIG. 4 shows a prior art layout wherein a set of semiconductor switches 40 are mounted on a positive load track 41 and are electrically connected to a negative load track 42 via a set of wire bonds 43. The landing area 44 of the wirebonds 43 has a similar extent to that of the opposite ends of wirebonds, which that of the semiconductor switches 40 themselves.

[0046] In FIG. 5 is shown a modified layout of FIG. 4 where a set of semiconductor switches 40 are mounted on a positive load track 41 and are electrically connected to a negative load track 42 via a set of wirebonds 43. Here, however, the landing area 45 of the wirebonds 43 a substantially smaller than the extent of the semiconductor switches 40 themselves. This feature is also present in the first embodiment of the current invention shown in FIG. 1. The distribution of the wirebonds in this way improves performance, since the difference between the length of the commutation loops through the semiconductor switches in the extreme positions is greatly reduced. This can be seen by the arrows describing the shortest 46 and longest 47 commutation loops shown in FIG. 4 (where there is a significant difference between the two commutation loop path lengths) and FIG. 5 (where the difference is greatly reduced).

[0047] It is very difficult to reliably place wirebonds at an angle shown in FIG. 5, particularly for the outer semiconductor switches, since there is a limit the angle that a wirebond may have to the pad on a semiconductor switch. This is illustrated in FIG. 12 where 48 shows the pad area on the upper surface of a semiconductor switch 59 and 49 the area required for bonding a wirebond. The angle (3 is the maximum deviation of the axis 60 of the wirebond to the axis 61 of the pad 48 for the reliable bonding of the wirebond. It is therefore an advantage to rotate the semiconductor switches themselves if wirebonds need to the placed at an angle as a shown in the first embodiment and in FIG. 5.

[0048] FIG. 6 shows a second embodiment of the invention, where the layout shown in FIG. 1 is slightly modified by the introduction of a split in the inner load track 4 into two arms, 4′, 4″. Such a split between the two arms of the inner load track allows the placing of a gate track in close proximity to all of the inner semiconductor switches 15, 16, 17, 18, 19, 20, 21, 22.

[0049] FIG. 7 illustrates the track layout and semiconductor switch placement of a third embodiment of the invention. In essence, this embodiment is similar to that shown in the second embodiment (FIG. 6) but shows, in addition, the presence of gate tracks 50 and sense tracks 51, positioned between the intermediate load tracks 5, 6 and the inner load track 4′, 4″, and also between the two arms of the inner load track 4′, 4″. Landing pads for connection of external terminals are also shown here. Those for the positive terminal 52 are placed on the inner load track 4, and a single landing pad for positive terminal 53 is placed on the track connecting the two outer load tracks 7, 8. A landing pad for the AC terminal is shown on the track connecting the two intermediate load tracks 5,6.

[0050] FIG. 8 illustrates a fourth embodiment of the invention. Here the polarity of the DC connectors is reversed, but the layout of the mounted tracks and of the semiconductor switches is largely unchanged from the layout shown in FIG. 6. In FIG. 8 the AC terminal 55 is at one end of the substrate 2, and the positive 57 and negative 56 terminals are at the opposite end.

[0051] FIG. 9 shows a fifth embodiment of the invention, here illustrating the placement of gate tracks 50 and sense tracks 51.

[0052] FIG. 10 is a representation of the fifth embodiment, based on that shown in FIG. 8, here showing the DC 56, 57 and AC terminal 55, together with control terminals 58.

[0053] FIG. 11 shows a perspective view of the fifth embodiment with the substrate 2, semiconductor switches 11-14, load terminals 56, 57, 55 and control terminals 58 attached.

[0054] While the present disclosure has been illustrated and described with respect to a particular embodiment thereof, it should be appreciated by those of ordinary skill in the art that various modifications to this disclosure may be made without departing from the spirit and scope of the present disclosure.