METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING CONDUCTIVE ADHESIVE AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME
20180342653 ยท 2018-11-29
Inventors
Cpc classification
H01L2924/15787
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L33/44
ELECTRICITY
H01L2224/32238
ELECTRICITY
H01L33/0095
ELECTRICITY
H01L2224/81893
ELECTRICITY
H01L2224/94
ELECTRICITY
H01L2924/15787
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L24/94
ELECTRICITY
H01L2224/04026
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2224/16013
ELECTRICITY
H01L2224/05571
ELECTRICITY
H01L2224/05571
ELECTRICITY
H01L33/507
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/06151
ELECTRICITY
H01L2224/33151
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/16151
ELECTRICITY
H01L2224/97
ELECTRICITY
H01L2224/94
ELECTRICITY
H01L23/49805
ELECTRICITY
H01L2224/83893
ELECTRICITY
International classification
H01L23/498
ELECTRICITY
H01L33/44
ELECTRICITY
H01L33/00
ELECTRICITY
Abstract
A semiconductor device including a first lead electrode and a second lead electrode on a lead frame; a semiconductor stack structure disposed on the lead frame, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a conductive adhesive configured to bond the semiconductor stack structure to the lead frame; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.
Claims
1. A semiconductor device, comprising: a lead frame, the lead frame comprising a housing forming a recess dimensioned to accommodate a light emitting diode (LED) and a first lead electrode and a second lead electrode disposed in the recess; the LED comprising a semiconductor stack structure disposed on the lead frame, the semiconductor stack structure comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a conductive adhesive configured to bond the semiconductor stack structure to the lead frame; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure, wherein the conductive adhesive comprises a first conductive adhesive configured to bond the first electrode to the first lead electrode, and a second conductive adhesive configured to bond the second electrode to second lead electrode, and wherein the first wavelength converter extends to a space between the semiconductor stack structure and the lead frame and covers the semiconductor stack structure.
2. The device of claim 1, wherein the first electrode comprises a first electrode pad and a first additional electrode disposed on the first electrode pad, and wherein the second electrode comprises a second electrode pad and a second additional electrode disposed on the second electrode pad.
3. The device of claim 2, wherein the conductive adhesive comprises a first conductive adhesive configured to bond the first additional electrode to the first lead electrode, and a second conductive adhesive configured to bond the second additional electrode to the second lead electrode.
4. The device of claim 1, wherein an inner wall of the recess comprises a reflection surface.
5. The device of claim 1, comprising a second wavelength converter disposed on first conductive semiconductor layer opposite the active region.
6. The device of claim 1, wherein the semiconductor stack structure is divided into at least two cells having inclined side walls, wherein the first electrode is electrically connected to the first conductive semiconductor layer of a first cell and the second electrode is electrically connected to the second conductive semiconductor layer of a second cell; and at least one interconnector is configured to connect the first conductive semiconductor layer of the second cell with the second conductive semiconductor layer of the first cell.
7. A method of fabricating a semiconductor device, the method comprising: forming a member comprising a plurality of first lead electrodes and second lead electrodes by: punching a copper plate to form the plurality of first lead electrodes and second lead electrodes electrically connected to one another; and molding a plurality of plastic housings on each respective pair of first lead electrode and second lead electrode so as to position one end of the first lead electrode and second lead electrode within a recess dimensioned to accommodate a light emitting diode (LED); forming a plurality of LEDs comprising a plurality of semiconductor stack structures on a first surface of a support substrate, wherein each of the semiconductor stack structures comprises a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; adhesively bonding the plurality of semiconductor stack structures to the member while maintaining the plurality of semiconductor stack structures on the support substrate; and dividing the member after the plurality of semiconductor stack structures are bonded to the member.
8. The method of claim 7, wherein the first conductive semiconductor layer and the second conductive semiconductor layer of each of the semiconductor stack structures comprises a respective first electrode and second electrode that are electrically connected to the member by bonding with conductive adhesive.
9. The method of claim 8, wherein the first and second electrodes are bonded to the first and second lead electrodes of the member, respectively.
10. The method of claim 9, wherein each of the first and second electrodes comprises an electrode pad and an additional electrode.
11. The method of claim 9, wherein the member further comprises a plurality of spacer electrodes, wherein spacer electrodes of the plurality of spacer electrodes are respectively formed on the first and second lead electrodes.
12. The method of claim 7, further comprising: forming a first wavelength converter comprising a uniform thickness on a surface of the semiconductor stack structures opposite to the member, after the plurality of semiconductor stack structures are bonded to the member.
13. The method of claim 12, wherein the support substrate comprises a growth substrate, and the first wavelength converter is formed on the growth substrate.
14. The method of claim 13, wherein when the member is divided, the support substrate is divided together with the member.
15. The method of claim 13, further comprising: removing the support substrate before the first wavelength converter is formed.
16. The method of claim 12, further comprising: forming second wavelength converter on the support substrate, the second wavelength converter covering at least side surfaces of the plurality of semiconductor stack structures.
17. The method of claim 12, further comprising: disposing a resin molding portion in a space between the support substrate and the member, wherein the resin molding portion comprises a phosphor.
18. The method of claim 17, wherein the first wavelength converter is formed at the same time as the resin molding portion.
19. The method of claim 12, wherein the support substrate comprises a carrier substrate comprising a plurality of semiconductor chips bonded thereto, and each of the semiconductor chips comprises a semiconductor stack structure of the plurality of the semiconductor stack structures.
20. The method of claim 19, wherein each of the semiconductor chips further comprises a second wavelength converter that covers at least side surfaces of the semiconductor stack structure.
21. The method of claim 19, further comprising: removing the carrier substrate after the semiconductor stack structures are bonded to the member; and disposing a second wavelength converter in a space among the plurality of semiconductor chips, wherein the first wavelength converter is formed at the same time as the second wavelength converter.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0039]
[0040]
[0041]
[0042]
[0043]
[0044]
[0045]
[0046]
[0047]
[0048]
[0049]
[0050]
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DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS
[0053] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided only for illustrative purposes so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the following embodiments but may be implemented in other forms. In the drawings, the widths, lengths, thicknesses and the like of elements are exaggerated for convenience of illustration. Like reference numerals indicate like elements throughout the specification and drawings.
[0054] In the following embodiments, a method for fabricating a light emitting diode (LED) package is mainly described, but the present invention is not limited thereto and may be applied to a method for fabricating a different kind of semiconductor device.
[0055]
[0056] Referring to
Preparation of Substrate Assembly 20
[0057] The substrate assembly 20 may comprise a substrate 21, semiconductor stack structures 30, a first electrode 36a, a second electrode 36b and a first wavelength converter 40a. Each of the semiconductor stack structures may comprise a first conductive semiconductor layer 25, an active layer 27 and a second conductive semiconductor layer 29. The first electrode 36a may comprise a first electrode pad 35a and a first additional electrode 37a, and the second electrode 36b may comprise a second electrode pad 35b and a second additional electrode 37b. The substrate assembly 20 may comprise an ohmic contact layer 31, and a buffer layer (not shown) may be interposed between the first conductive semiconductor layer 25 and the substrate 21.
[0058] The substrate 21 may be a growth substrate such as sapphire, silicon carbide or spinel, on which a nitride semiconductor layer can be grown.
[0059] The semiconductor stack structures may be fabricated by an ordinary process of fabricating an LED chip. That is, the plurality of the semiconductor stack structures are formed on the substrate 21 by growing epitaxial layers comprising the first conductive semiconductor layer 25, the active layer 27 and the second conductive semiconductor layer 29 on the substrate 21 and then patterning these epitaxial layers. Portions of the second conductive semiconductor layer 29 and the active layer 27 may also be removed to expose a partial region of the first conductive semiconductor layer 25.
[0060] The active layer 27 and the first and second conductive semiconductor layers 25 and 29 may be formed of a III-N-based compound semiconductor, e.g., an (Al, Ga, In)N semiconductor. Each of the first and second conductive semiconductor layers 25 and 29 may have a single- or multi-layered structure. For example, the first conductive semiconductor layer 25 and/or the second conductive semiconductor layer 29 may include a contact layer and a clad layer, and may further include a superlattice layer. In addition, the active layer 27 may have a single or multiple quantum well structure. For example, the first and second conductive semiconductor layers may be n-type and p-type semiconductor layers, respectively, but the present invention is not limited thereto, and the opposite may be possible. The buffer layer 23 reduces lattice mismatch between the substrate 21 and the first conductive semiconductor layer 25, thereby reducing the defect density generated in the semiconductor layers 25, 27 and 29.
[0061] Meanwhile, the ohmic contact layer 31 may be formed on the second conductive semiconductor layer 29, and the first and second electrode pads 35a and 35b may be formed on the first and second conductive semiconductor layers 25 and 29, respectively. Although the ohmic contact layer 31 may be formed of, for example, a transparent conductive layer such as Ni/Au, ITO, IZO, ZnO, the present invention is not limited thereto. The first and second electrode pads 35a and 35b may include, for example, Ti, Cu, Ni, Al, Au or Cr, and may be formed of two or more materials among them. The second electrode pad 35b may electrically come in contact with the second conductive semiconductor layer 29 through the ohmic contact layer. An insulating layer 33 that covers the semiconductor stack structures 30 may also be formed before the electrode pads 35a and 35b are formed. The insulating layer 33 may be formed of, for example, a silicon oxide or silicon nitride.
[0062] The first and second additional electrodes 37a and 37b may be further formed on the first and second electrode pads 35a and 35b, respectively. When the first wavelength converter 40a is formed, the first and second additional electrodes 37a and 37b provide electrical contact point portions to the outside of the first wavelength converter 40a. The first and second additional electrodes 37a and 37b may have widths narrower than those of the first and second electrode pads 35a and 35b, respectively.
[0063] Meanwhile, the first wavelength converter 40a is formed on the substrate 21 having the semiconductor stack structures 30 formed thereon. The first wavelength converter 40a may be formed using a screen printing technique using squeeze. Accordingly, the first wavelength converter 40a can be formed to cover side and top surfaces of the semiconductor stack structures 30. The first wavelength converter 40a may be formed using epoxy or silicone containing a phosphor. Alternatively, the first wavelength converter 40a may be formed by attaching a wavelength conversion sheet to the second conductive semiconductor layer 29. The additional electrodes 37a and 37b may be exposed to the outside passing through the first wavelength converter 40a. As shown in these figures, the top surface of the first additional electrode 37a may be positioned at the same height as that of the second additional electrode 37b, and may be parallel to the surface of the first wavelength converter 40a. However, the present invention is not limited thereto. That is, the top surfaces of the first and second additional electrodes 37a and 37b may be protruded through the surface of the first wavelength converter 40a, or may be positioned inside the surface of the first wavelength converter.
[0064] Meanwhile, the thickness of the growth substrate 21 may be decreased through backside grinding, and scribing grooves 21a may be formed in the growth substrate through a scribing process. The scribing grooves 21a may be formed on a back or front side of the substrate 21. In a case where the scribing grooves 21a are formed on the front side of the substrate 21, the first wavelength converter 40a may be divided into individual semiconductor stack structures 30 by the scribing grooves.
Preparation of Packaging Member 50
[0065] A printed circuit board (PCB) 50 having the lead electrodes 53a and 53b printed thereon may be used as the packaging member 50. For example, the PCB may include various general PCBs such as a FR4-PCB, a metal-PCB, a metal core PCB and a ceramic substrate.
[0066] The PCB 50 has a substrate 51 and the lead electrodes 53a and 53b printed on the substrate 51. In a case where the substrate 51 is a conductive substrate such as a metal PCB, the lead electrodes 53a and 53b may be insulated from the conductive substrate by an insulating layer (not shown).
[0067] The lead electrodes 53a and 53b may have internal terminals formed on the top of the substrate 51, and may have external terminals connected to an external power source at the bottom of the substrate. These terminals are connected through conductive traces.
[0068] The substrate 51 may have through-holes 51a formed in a line shape along substrate surfaces, and the traces may connect the internal and external terminals through the through-holes 51a. However, the through-holes 51a of line shapes are not essential, and the trace may connect the internal and external terminals through a cylindrical through-hole.
[0069] Meanwhile, first and second spacer electrodes 55a and 55b may be formed on the lead electrodes 53a and 53b. The spacer electrodes 55a and 55b may be formed by performing plating with nickel, copper or the like. The spacer electrodes 55a and 55b are protruded from the lead electrodes 53a and 53b, respectively.
Bonding Process
[0070] As shown in
[0071] The first and second spacer electrodes 55a and 55b are disposed close to the first and second electrodes 36a and 36b, respectively. In order to provide a path through which ions in a plating bath can move, the substrate assembly 20 and the PCB 50 are disposed so that a space is formed between the first wavelength converter 40a and the anti-plating layer 57. At this time, the first and second spacer electrodes 55a and 55b may come in contact with first and second electrodes 36a and 36b, respectively.
[0072] Referring to
[0073] The plurality of semiconductor stack structures 30 are bonded and electrically connected to the PCB 50 by the plating layers 60a and 60b.
Formation of Second Wavelength Converter 40b
[0074] Referring to
Division Process
[0075] The substrate 21 and the PCB 50 are divided together so that an LED package is completed as shown in
[0076] Referring to
[0077] In the LED package according to this embodiment, the second wavelength converter 40b formed on the backside of the growth substrate 21 and the first wavelength converter 40a that covers the semiconductor stack structure 30 are disposed to be spaced apart from each other, and side surfaces of the first wavelength converter 40a, the growth substrate 21 and the second wavelength converter 40b are formed in parallel to one another.
[0078] Although it has been described in this embodiment that the second wavelength converter 40b is formed after the bonding process, the present invention is not limited thereto. That is, the second wavelength converter may be formed before the bonding process is performed.
[0079] In this embodiment, the first and second lead electrodes 53a and 53b and/or the first and second electrodes 36a and 36b are put in the same negative potential state in the electroplating process. This will be described with reference to
[0080]
[0081] Referring to
[0082] Meanwhile, a metal frame layer 35c is formed along the edge of the substrate 21, and the first and second electrode pads 35a and 35b are electrically connected to each other through the metal frame layer 35c.
[0083] Although it has been illustrated in
[0084] Meanwhile, although it has been illustrated in this figure that the substrate 21 has a quadrangular shape, the shape of the substrate 21 is not limited thereto and may be a circular shape.
[0085] Referring to
[0086] In a case where the electroplating is performed, a voltage may be applied to any one or both of the substrate assembly 20 and the PCB 50.
[0087]
[0088] Referring to
[0089] Referring to
[0090] Referring to
[0091] The first wavelength converter 70a may be formed by injecting a resin containing a phosphor, e.g., silicone or epoxy. Meanwhile, the second wavelength converter 70b may be formed using a wavelength conversion layer or wavelength conversion sheet, separately from the first wavelength converter 70a, as described with reference to
[0092] Referring to
[0093]
[0094] Referring to
[0095] Subsequent processes are performed identically to those described with reference to
[0096]
[0097] The method of fabricating the LED package according to this embodiment is almost identical to that of fabricating the LED package according to the third embodiment described with reference to
[0098] Meanwhile, a roughened surface R may be formed on the exposed surface of the first conductive semiconductor layer 25. The roughened surface R may be formed by wet etching such as photo electro chemical (PEC) etching. Meanwhile, the second wavelength layer 40b is formed on the surface of the first conductive semiconductor layer 25.
[0099] The process of removing the growth substrate 21 may be applied to the first embodiment described with reference to
[0100]
[0101] Referring to
[0102] The conductive adhesives 80a and 80b such as silver paste may be disposed on the respective lead electrodes by coating, screen printing, or the like.
[0103] Meanwhile, in this embodiment, the anti-plating layer 57 described with reference to
[0104] Referring to
[0105] Referring to
[0106] Referring to
[0107]
[0108] Referring to
[0109] Subsequently, as described with reference to
[0110] Referring to
[0111] Referring to
[0112]
[0113] Referring to
[0114] The LED chips 100 may be provided by attaching the substrate assembly 20 of
[0115] These LED chips 100 are classified into superior and inferior LED chips through optical and electrical performance tests, and the superior LED chips 100 are aligned on the carrier substrate 201. Meanwhile, a PCB 50 may be prepared identically to the PCB 50 described with reference to
[0116] Referring to
[0117] Referring to
[0118] Referring to
[0119] In this embodiment, the LED chips 100 are divided to be separate from one another, and thus the LED package can be completed by dividing the PCB 50.
[0120] In this embodiment, the PCB 50 may be formed to have a final size relatively larger than that of the LED chip 100.
[0121] Although it has been described in this embodiment that the LED chips 100 are provided by dividing the substrate assembly 20 of
[0122]
[0123] The method of fabricating the LED package according to this embodiment is almost similar to that according to the seventh embodiment, but is different in that LED chips do not comprise a first wavelength converter 240a. That is, the LED chips according to this embodiment may be provided, for example, by dividing the substrate assembly 20c described with reference to
[0124] As described with reference to
[0125] Subsequently, the anti-plating layer 67 described with reference to
[0126] Subsequently, the LED package of
[0127]
[0128] The method of fabricating the LED package according to this embodiment is identical in that the substrate assembly 200 of
[0129] The first and second electrodes 36a and 36b of each LED chip are bonded to the PCB 50a by the conductive adhesives 80a and 80b, respectively.
[0130] Then, the support substrate 201 is removed, and the second wavelength converter 240b is formed as described with reference to
[0131]
[0132] The method of fabricating the LED package according to this embodiment is almost identical to that according to the ninth embodiment, but is different in that LED chips do not comprise the first wavelength converter 240a. That is, the LED chips according to this embodiment may be provided, for example, by dividing the substrate assembly 20c described with reference to
[0133] Subsequently, the first and second electrodes 36a and 36b of each of the LED chips are bonded to the PCB 50a by the conductive adhesives 80a and 80b, respectively. Then, the support substrate 201 is removed, and the first and second wavelength converters 270a and 270b are formed as described with reference to
[0134]
[0135] Referring to
[0136] That is, the lead frame 501 through which a plurality of lead electrodes are electrically connected to one another is provided by performing a punching process on a copper plate. A plurality of housings 503 that respectively provide a recess for accommodating the LED chip 100 may be provided on the lead frame 501. The housings 503 may be formed by molding plastic, and the inner wall of each of the recesses may be provided as a reflection surface.
[0137] Meanwhile, first and second conductive adhesives 280a and 280b are formed on the lead electrodes in the recess, respectively.
[0138] Referring to
[0139] Referring to
[0140] Referring to
[0141] Although it has been described in this embodiment that the LED chips are bonded using the conductive adhesives 80a and 80b, the present invention is not limited thereto. That is, the LED chips 100 may be bonded to the lead frame using the electroplating bonding technique described above. In this case, since the lead frame 501 is conductive, a separate means for electrically connecting the lead electrodes is not required. Meanwhile, an anti-plating layer may be formed using photoresist so that electroplating can be performed only on specific parts of the lead electrodes.
[0142] In this embodiment, the LED chip 100 having the first wavelength converter 240a has been described as an example, but the first wavelength converter 240a may be omitted.
[0143] Meanwhile, although it has been described in the aforementioned embodiments that the semiconductor stack structure 30 or LED chip 100 is formed of one diode element, the present invention is not limited thereto. That is, the individual semiconductor stack structure or LED chip 100 corresponding to a unit chip may have a plurality of light emitting cells spaced apart from one another.
[0144]
[0145] Referring to
[0146] The light emitting cells S1 and S2 may be electrically connected to each other by an interconnector 83. The interconnector 83 may connect the first conductive semiconductor layer 25 of one light emitting cell to the second conductive semiconductor layer 29 of another light emitting cell adjacent to the one light emitting cell, thereby forming a serial array. Such serial arrays may be connected in parallel or reverse parallel. The interconnector 83 may be electrically connected to the second conductive semiconductor layer 29 through the ohmic contact layer 31 formed on the second conductive semiconductor layer 29. Side surfaces of the light emitting cells S1 and S2 may be formed inclined to facilitate the formation of interconnectors 83.
[0147] Meanwhile, the insulating layer 33 covers the ohmic contact layer 31, and covers the side surfaces of the light emitting cells S1 and S2 in order to prevent the first and second conductive semiconductor layers 25 and 29 of the light emitting cells S1 and S2 from being short-circuited by the interconnector 83.
[0148] Meanwhile, the first electrode 36a may be positioned on the light emitting cell S1, and the second electrode 36b may be positioned on the light emitting cell S2. However, in this embodiment, the positions at which the first and second electrodes 36a and 36b are formed, respectively, are not limited particularly. For example, both the first and second electrodes 36a and 36b may be formed on the substrate 21, and may be connected to the light emitting cells S1 and S2 through interconnectors 83, respectively. The first and second electrodes 36a and 36b may be formed on the first conductive semiconductor layers 25 or second conductive semiconductor layers 29 of the light emitting cells S1 and S2, respectively. In a case where the first and second electrodes 36a and 36b are formed on the same plane, top surfaces of the first and second electrodes may be positioned on the same plane by forming the first and second electrodes 36a and 36b to have the same height.
[0149] The interconnectors 83 and the insulating layer 33 may be covered by a second insulating layer 85. The second insulating layer 85 may be formed of the same material as that of the insulating layer 33, and protects the interconnectors 83 and the light emitting cells S1 and S2. In this case, the second insulating layer 85 may be relatively thinner than the insulating layer 33 in order to prevent the second insulating layer 85 from being exfoliated from the insulating layer 33.
[0150] A first wavelength converter 340a covers the plurality of light emitting cells S1 and S2, and the first and second electrodes 36a and 36b are exposed to the outside through the first wavelength converter 340a.
[0151] Here, the LED chip 100a having the first wavelength converter 340a previously formed therein has been described as an example. However, the first wavelength converter 340a may be omitted.
[0152] Here, the LED chip 100a having the plurality of light emitting cells has been described as an example. However, as described with reference to
[0153] While the present invention has been described in connection with the preferred embodiments, it will be understood by those skilled in the art that various modifications and changes can be made thereto without departing from the spirit and scope of the invention defined by the appended claims.