Two-Dimensional Transition Metal Dichalcogenide Alloys and Electronic Devices Incorporating the Same

Abstract

New alloys of Group VI transition metal dichalcogenides having the chemical formula MX.sub.2-xX.sub.x, produced using a chalcogen-substitution approach, wherein M is a Group VI transition metal (Cr, Mo, W, or Sg); X is a chalcogen (O, S, Se, Te, or Po); and X is a group 15 (N, P, As, Sb, or Bi) or a group 17 (F. Cl, Br, I, or At); and where x ranges from 0 to 2. The stability of different structural phases of such MX.sub.2-xX.sub.x Group VI 2D TMD alloy materials can be tuned via the choice of the chalcogen used. The MX.sub.2-xX.sub.x Group VI 2D TMD alloy materials produced in accordance with the chalcogen-substitution approach of the present invention can be used as components of phase-change based devices such as memory elements, field-effect transistors (FETs), or gas sensors.

Claims

1. A two-dimensional transition metal dichalgoenide (2D TMD) material having the formula MX.sub.2-xX.sub.x, wherein M is a Group VI transition metal comprising Cr, Mo, W, or Sg; X is a chalcogen comprising O, S, Se, Te, or Po; X is a group 15 element comprising N, P, As, Sb or Bi or is a group 17 element comprising F, Cl, Br, I, or At; and x ranges from 0 to 2.

2. The 2D TMD material according to claim 1, wherein M comprises a first Group VI transition metal comprising one of Cr, Mo, W, or Sg and a second Group transition metal comprising one of, wherein the material has the formula M.sub.yM.sub.1-yX.sub.2-xX.sub.x, where y ranges from 0 to 1

3. A memory element, comprising: a substrate; a dielectric material layer disposed on the substrate; a two-dimensional transition metal dichalcogenide (2D TMD) alloy layer disposed on the dielectric layer, the 2D TMD alloy layer being a MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, where M is a Group VI transition metal comprising Cr, Mo, W, or Sg; X is a chalcogen comprising O, S, Se, Te, or Po; X is a group 15 element comprising N, P, As, Sb or Bi or is a group 17 element comprising F, Cl, Br, I, or At; and x ranges from 0 to 2; the memory element further comprising: at least one electrode connected to the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, each of the electrodes being connected to an electrical source via a corresponding conductive channel; and means for inducing a strain to the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer; wherein the applied strain induces a phase change in the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer from a low conductivity H phase to a high conductivity T phase; wherein the H phase corresponds to a 0 state in the memory device and the T phase corresponds to a 1 state; and wherein information can be written into the memory device when the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer is in H phase and read out of the memory device when the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer is in the T phase.

4. The memory element according to claim 3, wherein the substrate comprises a piezoelectric material, the memory element further comprising at least one electrode connected to the substrate, the electrode being configured to apply an electric field to the substrate so as to expand or contract the substrate, thereby inducing the strain in the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, a degree of the induced strain being tunable by tuning a strength of the applied electric field.

5. The memory element according to claim 3, wherein the substrate comprises a material having a thermal expansion coefficient different from a thermal expansion coefficient of the dielectric material layer, the memory element further comprising a heating/cooling element coupled to the substrate, the heating/cooling element being configured to change the temperature of the substrate so as to expand or contract the substrate, thereby inducing the strain in the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, a degree of the induced strain being tunable by tuning a temperature applied by the heating/cooling element.

6. A field effect transistor, comprising: a dielectric material layer disposed on a substrate; a two-dimensional transition metal dichalcogenide (2D TMD) alloy layer disposed on the dielectric layer, the 2D TMD alloy layer being a MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, where M is a Group VI transition metal comprising Cr, Mo, W, or Sg; X is a chalcogen comprising O, S, Se, Te, or Po; X is a group 15 element comprising N, P, As, Sb or Bi or is a group 17 element comprising F, Cl, Br, I, or At; and x ranges from 0 to 2; the field effect transistor further comprising source, gate, and drain electrodes connected to the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer; wherein an injection of carriers into the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer via the gate induces a phase change in the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer from a low conductivity H phase to a high conductivity T phase; wherein the transistor is in the nonconducting OFF state when the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer is in the H phase and is in the conducting ON state when the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer is in the T phase.

7. A gas sensor, comprising: a dielectric material layer disposed on a substrate; a two-dimensional transition metal dichalcogenide (2D TMD) alloy layer disposed on the dielectric layer, the 2D TMD alloy layer being a MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer, where M is a Group VI transition metal comprising Cr, Mo, W, or Sg; X is a chalcogen comprising O, S, Se, Te, or Po; X is a group 15 element comprising N, P, As, Sb or Bi or is a group 17 element comprising F, Cl, Br, I, or At; and x ranges from 0 to 2; the gas sensor further comprising source and drain electrodes connected to the MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer; wherein the MX.sub.2-xX.sub.x Group VI 2D TMD alloy exhibits a first conductivity when no gas is present on a surface of the MX.sub.2-xX.sub.x Group VI 2D TMD alloy and a second conductivity when gas is present on its surface; and wherein a presence of a gas incident on the MX.sub.2-xX.sub.x Group VI 2D TMD alloy can be detected by a change in current traveling through the source and drain electrodes.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] FIGS. 1A and 1B are block schematics illustrating aspects of the crystal structure of the H phase (FIG. 1A) and T phase (FIG. 1B) of a conventional Group VI transition metal dichalcogenide (TMD) phase change material.

[0020] FIG. 2 is a block schematic illustrating aspects of an exemplary memory element incorporating a MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present disclosure.

[0021] FIG. 3 is a block schematic illustrating aspects of an exemplary field effect transistor incorporating a MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present disclosure.

[0022] FIG. 4 is a block schematic illustrating aspects of an exemplary gas sensor incorporating a MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present disclosure.

[0023] FIGS. 5A and 5B illustrate aspects of gas detection by an exemplary gas sensor according to principles illustrated in FIG. 4.

DETAILED DESCRIPTION

[0024] The aspects and features of the present invention summarized above can be embodied in various forms. The following description shows, by way of illustration, combinations and configurations in which the aspects and features can be put into practice. It is understood that the described aspects, features, and/or embodiments are merely examples, and that one skilled in the art may utilize other aspects, features, and/or embodiments or make structural and functional modifications without departing from the scope of the present disclosure.

[0025] Monolayers of conventional Group VI MX.sub.2 2D TMDs consist of a plane of M atoms covalently bonded to planes of X atoms above and below it, and display high structural flexibility and unique electronic properties owing to their atomic thickness.

[0026] The block schematics in FIGS. 1A and 1B illustrate the crystal structure of certain phases of these materials.

[0027] The crystal structure of an exemplary conventional Group VI MX.sub.2 2D TMD, in which the M atom is Mo and the X atoms are Te, is illustrated in the schematic shown in FIGS. 1A and 1B.

[0028] All but one of such Group VI MX.sub.2 2D TMDs display the so-called H phase shown in FIG. 1A under standard conditions, in which the material has a trigonal prismatic configuration of the transition metal M and a semiconducting band gap ranging from 1 to 2 eV.

[0029] The planes of the X chalcogen atoms in this structure can readily shift relative to one another. Such a shift will transform the structure to one of several different polymorphs, each having a corresponding set of different electrical, optical, and mechanical properties. For example, a relative shift of one X plane so as to octahedrally coordinate the M atoms results in the metallic T phase. Alternating contractions and expansions then lead to the T phase, depicted in FIG. 1B, which has distorted octahedral coordination and exhibits semimetallic behavior.

[0030] The H and T phase in pure MoTe.sub.2 monolayers are known to be close in energy, and therefore are close in their stability. See Duerloo, supra. The inventors of the present invention have discovered that by combining a 2D TMD with an appropriate species and concentration of another anion, a new 2D TMD alloy having the structure MX.sub.2-xX.sub.x can be formed, where the H and T phases exhibited by the original 2D TMD material can be stabilized.

[0031] Thus, the present invention provides new Group VI two-dimensional transition metal dichalcogenide (2D TMD) material having controllable H and T phases.

[0032] The materials of the present invention are made using a chalcogen-substitution approach, whereby a portion of the chalcogen is substituted with a group 15 or a group 17 element to produce new Group VI 2D TMD alloys having the chemical formula MX.sub.2-xX.sub.x, where M is a Group VI transition metal (Cr, Mo, W, or Sg); X is a chalcogen (O, S, Se, Te, or Po); and X is a group 15 (N, P, As, Sb, or Bi) ora group 17 (F. Cl, Br, I, or At); where x ranges from 0 to 2.

[0033] The chalcogen-substitution approach of the present invention can be used to control the stability of different structural phases of such Group VI TMD materials. Alloying the X chalcogen atoms with certain alternative X atoms increases the stability of the T phase relative to the H phase. At a specific concentration of X atoms (which depends on the X species), the energies of the two phases are nearly degenerate. This allows for easily inducing a phase transition through application of a small external perturbation.

[0034] The new MX.sub.2-xX.sub.x Group VI 2D TMD alloys in accordance with the present invention can be formed using any one of a variety of different methods.

[0035] For example, in some embodiments, MX.sub.2-xX.sub.x Group VI 2D TMD alloys in accordance with the present invention can be synthesized using standard methods such as chemical vapor deposition (CVD). In other embodiments, the MX.sub.2-xX.sub.x Group VI 2D TMD alloys in accordance with the present invention can also be synthesized by implanting pure MX.sub.2 monolayers with the appropriate alloying atom(s) using methods such as hyperthermal ion implantation. One skilled in the art will readily recognize that other suitable methods can be used to synthesize an MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present invention, and all such materials formed by any of such methods are deemed to be within the scope and spirit of the present disclosure.

[0036] Such new MX.sub.2-xX.sub.x Group VI 2D TMD materials can be integrated into electronic or optoelectronic devices which produce a discernable difference in some property (electronic, optical, etc.) when the material switches between the H and T phases upon the application of some external stimulus.

[0037] A first exemplary first type of device incorporating an MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present disclosure is a memory element. Such a memory element can take any suitable form, with aspects of one exemplary embodiment of such a memory element being illustrated by the block schematic in FIG. 2.

[0038] Thus, in the exemplary embodiment illustrated in FIG. 2, a memory element in accordance with the present invention can include an MX.sub.2-xX.sub.x 2D TMD alloy layer 201 disposed on a dielectric layer 202 which in turn is disposed on a substrate 203. The device further includes electrodes 204a/204b connected to MX.sub.2-xX.sub.x 2D TMD alloy layer 201, with each of electrodes 204a and 204b being connected to a corresponding conductive channel 205a/205b. The device can be further connected to other components (not shown) such as a voltage or current source to provide a voltage or current to the device, or a sense amplifier to processes data regarding changes in voltage.

[0039] In some in some embodiments, substrate 203 can be formed from a piezoelectric material such as lead zirconium titanate (PZT) or barium titanate. In such embodiments, additional electrodes are placed on substrate 203, wherein an electric field can be applied to expand or contract substrate 203, which in turn applies strain to the MX.sub.2-xX.sub.x 2D TMD alloy layer 201. The degree of strain induced into the MX.sub.2-xX.sub.x 2D TMD alloy layer 201 is tunable by controlling the strength of the applied electric field.

[0040] In other embodiments, substrate 203 is formed from a material that has a different thermal expansion coefficient than does dielectric layer 202. For example, if dielectric layer 202 is SiO.sub.2, substrate 203 can be another dielectric with a different thermal expansion coefficient, such as Si. In such a case, an applied change in the temperature of substrate 203 would induce a strain to MX.sub.2-xX.sub.x 2D TMD alloy layer 201, with the degree of induced strain being tunable by controlling the degree of the applied temperature change. In such embodiments, the temperature can be changed by any suitable means, such as connecting the substrate to a heater that controllably applies and removes heat, applying a source of cooling to the substrate, or configuring the substrate to be heated by Joule heating; all of these and other such configurations are deemed to be within the scope of the present disclosure.

[0041] In either case, the MX.sub.2-xX.sub.x 2D TMD alloy 201 is used to store information in the memory device, with one of the two H or T phases corresponding to one of the binary 0 or 1 states and the other phase corresponding to the other state, depending on the electrical or optical properties of the MX.sub.2-xX.sub.x 2D TMD material used. For example, the conductivity of the material is lower in the H phase and so the H phase can correspond to the 0 state, while the higher conductivity T phase can correspond to the 1 state, though the opposite case, where the T phase corresponds to the 0 state and the H phase corresponds to the 1 state can also be present.

[0042] The information stored in the MX.sub.2-xX.sub.x 2D TMD alloy can be read by measuring its conductivity, which, as noted above, is lower in the H phase and higher in T phase. This measurement is done by applying a read current through electrodes 204a/204b, which are connected to an electrical source through conductive channels 205a/b, with the resulting read voltage compared against a reference voltage. A low read voltage indicates that the alloy is in a low conductivity phase (0 state), while a high read voltage indicates the alloy is in a high conductivity phase (1 state).

[0043] In the exemplary memory device illustrated in FIG. 2, the phase of the MX.sub.2-xX.sub.x 2D TMD alloy layer 201 can be converted from the lower conducting H phase (a state of 0) to the higher conducting T phase (a state of 1) and back again via the application and removal of a strain in the 2D TMD material. As noted above, in some embodiments, the strain can be electrically induced, e.g., from a voltage applied to a piezoelectric substrate 203, while in other embodiments it can be thermally induced, e.g., by a change in temperature of substrate 203 from an application of heat or cooling from a heating or cooling element (not shown) coupled to the substrate. This change in the phase of the alloy resulting from the strain in the device produces a change from a 0 state to a 1 state which results in a writing of information into the device's memory.

[0044] Thus, in the exemplary embodiment illustrated in FIG. 2, electrodes 204a/204b apply an appropriate current to MX.sub.2-xX.sub.x 2D TMD alloy layer 201 by means of conductive channels 205a/205b, and the resulting voltage across the alloy layer 201 (read voltage) can be compared to a known reference voltage (not shown). A low read voltage indicates that the alloy is in a low conductivity phase (H phase, or 0 state), while a high read voltage indicates the alloy is in a high conductivity phase (T phase, or 1 state). This measurement permits the reading of the information stored in the device's memory.

[0045] A second exemplary type of device that can incorporate an MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present disclosure is a field effect transistor (FET). Aspects of an exemplary embodiment of such a FET are illustrated by the block schematic shown in FIG. 3. However, as with the memory element described above, one skilled in the art will readily recognize that a FET incorporating a MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with this aspect of the present invention can take any suitable form, and all such alternative embodiments and forms of such a FET are deemed to be within the scope and spirit of the present disclosure.

[0046] Thus, as illustrated in FIG. 3, an exemplary FET device in accordance with one or more aspects of the present invention includes a MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer 301 as described above disposed on a dielectric layer 302. The device further includes source 306, gate 307, and drain 308 electrodes well known in the art contacting the MX.sub.2-xX.sub.x Group VI 2D TMD material.

[0047] In accordance with the present invention, a change from the H to the T phase in the MX.sub.2-xX.sub.x Group VI 2D TMD material can be induced by means of carrier injection through gate electrode 307, where the injection of either electrons or holes stabilizes the T phase over the H phase. The transition from the H to T phase results in change from a state of low conductivity to high conductivity, and thus a change in the FET from an OFF to ON state, thereby controlling a flow of current through the device.

[0048] A third type of device that can incorporate the MX.sub.2-xX.sub.x Group VI 2D TMD alloys in accordance with the present invention are gas sensors in which changes in the conductivity of the alloys allow for the sensing of different atoms or molecules.

[0049] Unlike the memory device and transistor described above with respect to FIGS. 2 and 3, a gas sensor in accordance with this aspect of the present invention does not rely on phase changes. Instead, it relies on changes in the conductivity of the MX.sub.2-xX.sub.x Group VI 2D TMD within the single H, T, or T phase upon the adsorption of gas molecules onto the surface of the material.

[0050] FIG. 4 and FIGS. 5A-5B illustrate aspects of such a gas sensor in accordance with this aspect of the present invention.

[0051] FIG. 4 illustrates an exemplary embodiment of such a gas sensor. In the embodiment illustrated in FIG. 4, a layer 401 of a MX.sub.2-xX.sub.x Group VI 2D TMD alloy material as described above is disposed on a dielectric layer 402 (which can be SiO.sub.2 or any other suitable material), which in turn can optionally be situated on a substrate 403, e.g., a layer of p-doped Si. Source and drain contacts 404a/404b are connected to the 2D TMD phase change material layer, and measure its conductivity.

[0052] If no gas molecules have adsorbed onto the surface, the material will exhibit a first conductivity, whereas if gas molecules have adsorbed, the material will exhibit a second conductivity, which can be lower or higher than the first conductivity. This change in conductivity of MX.sub.2-xX.sub.x Group VI 2D TMD alloy layer 401 can be measured by a change in the current traveling through the source and drain contacts and thus, the device can serve as a detector of gas incident on the material surface.

[0053] FIGS. 5A and 5B illustrate aspects of an exemplary case of a gas sensor in accordance with the present disclosure. In the exemplary case illustrated in FIGS. 5A and 5B, calculations were made regarding the electronic properties of an exemplary gas sensor comprising MoTe.sub.1.917P.sub.0.083 with and without fluorine (F) gas adsorbates present.

[0054] As can be seen from the plot in FIG. 5A, when no gas molecules were present, the MoTe.sub.1.917P.sub.0.083 exhibited a small number of states above the Fermi energy EF (which is set to 0 in the FIGURES), as indicated by the energy band within the circle, and thus the material is in the first conductivity state, i.e., a conducting state. In contrast, as illustrated in FIG. 5B, when fluorine gas is on the surface (MoTe.sub.1.917P.sub.0.083+F), the valence band is below the Fermi level EF, and so the material is in a second, conductivity state, this one a less conducting state than is the case where no fluorine is present.

[0055] Advantages and New Features

[0056] The general architectures of the electronic devices we propose here are well known. Indeed, entire segments of the electronics industry are based on devices of this type. See, e.g., Z. Yuan et al., Interfacing 2D Semiconductors with Functional Oxides: Fundamentals, Properties, and Applications, Crystals 2017, 7, 265; M. Chhowalla et al., Two-dimensional semiconductors for transistors, Nature Reviews Materials 1, 16052 (2016); and R. Samnakay, Selective chemical vapor sensing with few-layer MoS2 thin-film transistors: Comparison with graphene devices, Appl. Phys. Lett. 106, 023115 (2015).

[0057] The novelty in this work is the creation and use of the MX.sub.2-xX.sub.x Group VI 2D TMD alloys, where the X atoms substitute for the X atoms in conventional MX.sub.2 TMDs to create stable H and T phases. Although there have been several attempts to deterministically stabilize a desired phase, none have relied on the X chalcogen-substitution alloying of the present invention. Thus, the present invention provides a new way to control the stability of either the H or T phase through selection of appropriate X alloying species.

[0058] In addition, by choosing the appropriate species and concentration of the X element, the energy difference between the H and T phases can be made to be very close. This provides many new materials with which to dynamically control the H to T phase transition in devices that include the MX.sub.2-xX.sub.x Group VI 2D TMD alloys in accordance with the present invention, such as the memory element, transistor, and sensor described above. Such materials can provide a level of dynamical control over phase change-related properties in such devices that heretofore have not been achieved.

[0059] Alternatives

[0060] This method extends to alloys of all members of the Group VI MX.sub.2 transition metal dichalcogenide family, including MoS.sub.2, MoSe.sub.2, MoTe.sub.2, WS.sub.2, WSe.sub.2, and WTe.sub.2, as well as additional alloys having more than one Group VI material, i.e., alloys having the form M.sub.yM.sub.1-yX.sub.2-xX.sub.x. It also includes devices that use any number of layers of a MX.sub.2-xX.sub.x Group VI 2D TMD alloy in accordance with the present invention (i.e., monolayer, bilayer, etc.).

[0061] Although particular embodiments, aspects, and features have been described and illustrated, one skilled in the art would readily appreciate that the invention described herein is not limited to only those embodiments, aspects, and features but also contemplates any and all modifications and alternative embodiments that are within the spirit and scope of the underlying invention described and claimed herein. The present application contemplates any and all modifications within the spirit and scope of the underlying invention described and claimed herein, and all such modifications and alternative embodiments are deemed to be within the scope and spirit of the present disclosure.