Low voltage supply amplifier and amplification method

Abstract

A high-gain, low power, electronic amplifier for amplification of a low magnitude voltage signal through a comparator-integrator amplification method for energy-aware applications is disclosed. The electronic amplifier comprises: a comparator arrangement with at least one comparator unit adapted to receive a first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; a integrator arrangement to receive the first two-level voltage comparison signal and generate a first amplifier output signal corresponding to an amplification of the voltage signal to be amplified; and a first feedback network to receive the first amplifier output signal and generate the first feedback voltage signal.

Claims

1. An electronic amplifier for amplification of a first voltage signal to be amplified, the electronic amplifier comprising: a comparator arrangement having a first voltage supply level of 0.7V or less and comprising a latched comparator unit having a sampling frequency, wherein said comparator arrangement is adapted to receive the first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; an integrating arrangement having a second voltage supply level of 0.7V or less, wherein said integrating arrangement is adapted to receive the first two-level voltage comparison signal, and to generate a first amplifier output signal corresponding to an amplification of the first voltage signal to be amplified; and a first feedback network adapted to receive the first amplifier output signal and to apply a feedback gain factor to the first amplifier output signal to generate the first feedback voltage signal.

2. The electronic amplifier of claim 1, wherein the comparator unit of the comparator arrangement comprises MOSFETs configured to output the first two-level voltage comparison signal and the inverse of the same.

3. The electronic amplifier of claim 1, wherein the integrating arrangement is a charge-pump integrator.

4. The electronic amplifier of claim 1, wherein the sampling frequency of the latched comparator unit is no less than two orders of magnitude greater than the highest frequency of the first voltage signal to be amplified.

5. The electronic amplifier of claim 1, wherein at least one low-pass filter is applied to the first amplifier output signal.

6. The electronic amplifier of claim 1, wherein the comparator arrangement is further adapted to generate a second two-level voltage comparison signal, wherein the second two-level voltage comparison signal is an inversion of the first two-level voltage comparison signal, and wherein the integrating arrangement is further adapted to receive the second two-level voltage comparison signal.

7. The electronic amplifier of claim 1 for amplifying a complimentary pair of a first and second voltage signal, wherein the comparator arrangement comprises at least one latched comparator unit having the same sampling frequency, wherein the comparator arrangement is further adapted to receive the second voltage signal to be amplified and a second feedback voltage signal, and to generate a second two-level voltage comparison signal, wherein the integrating arrangement is further adapted to receive the second two-level voltage comparison signal and to generate a second amplifier output signal corresponding to an amplification of the second voltage signal to be amplified, such that the difference between the first and second amplifier output signals corresponds to an amplification of the difference between the first and second voltage signals to be amplified, and wherein the electronic amplifier further comprises: a second feedback network adapted to receive the second amplifier output signal and to generate the second feedback voltage signal.

8. The electronic amplifier of claim 7, wherein the first and second voltage signals are a complimentary pair of differential signals.

9. The electronic amplifier of claim 7, further comprising a complimentary pair of chopper circuits, wherein the first chopper circuit spans the complimentary pair of a first and second voltage signal and the second chopper circuit spans the first and second amplifier output signals.

10. The electronic amplifier of claim 7, further comprising at least one low pass filter applied to at least one of the first and second amplifier output signals.

11. The electronic amplifier of claim 7, wherein the comparator arrangement further comprises at least one pre-amplification stage applied to at least one of the first feedback signal, the first voltage signal to be amplified, the second feedback signal, and the second voltage to be amplified.

12. The electronic amplifier of claim 7, further comprising an instrumentation amplifier.

13. A method of amplifying a voltage signal to be amplified, the method comprising: receiving the voltage signal to be amplified and a first feedback voltage at a comparator arrangement and generating a first two-level voltage comparison signal; integrating the first two-level voltage comparison signal over time to generate a first amplifier output signal, corresponding to an amplification of the voltage signal to be amplified; and applying a feedback gain factor to the first amplifier output signal to generate the first feedback voltage signal, wherein the maximum voltage level of any voltage signal is 0.7V.

14. The method of claim 13, wherein: the step of receiving the voltage signal to be amplified further comprises receiving a second voltage signal to be amplified and a second feedback voltage at the comparator arrangement to generate a second two-level voltage comparison signal; the step of integrating the first two-level voltage comparison signal over time further comprises integrating the second two-level voltage comparison signal, such that the integration operation corresponds to the difference between the first and second two-level voltage comparison signals; the step of integration further comprises generating a second amplifier output voltage signal, such that the difference between the first and second amplifier output voltage signal corresponds to an amplification of the difference between the first and second voltage signals to be amplified; and the step of applying a feedback gain factor further comprises applying a feedback gain factor to the second amplifier output signal to generate the second feedback voltage.

15. The method of claim 14, wherein the feedback gain factor applied to the first and second amplifier output signal is the same.

16. An electronic amplifier configured to amplify a voltage signal, the electronic amplifier comprising: means for receiving the voltage signal and a first feedback voltage, the receiving means configured to generate a first two-level voltage comparison signal; means for integrating the first two-level voltage comparison signal over time to generate a first amplifier output signal, corresponding to an amplification of the voltage signal to be amplified; and means for applying a feedback gain factor to the first amplifier output signal to generate the first feedback voltage signal, wherein the maximum voltage level of any voltage signal is 0.7V.

17. The electronic amplifier of claim 16, wherein the receiving means comprises a latched comparator unit.

18. The electronic amplifier of claim 16, wherein the integrating means comprises a charge-pump integrator.

19. The electronic amplifier of claim 16, wherein the applying means comprises a first feedback network.

20. An electronic amplifier for amplification of a first voltage signal to be amplified, the electronic amplifier comprising: a comparator arrangement having a first voltage supply level of 0.7V or less and comprising a latched comparator unit having a sampling frequency, wherein said comparator arrangement is adapted to receive the first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; an integrating arrangement having a second voltage supply level of 0.7V or less, wherein said integrating arrangement is adapted to receive the first two-level voltage comparison signal, and to generate a first amplifier output signal which is proportional to the first two-level voltage comparison signal integrated over time and corresponds to an amplification of the first voltage signal to be amplified; and a first feedback network adapted to receive the first amplifier output signal and to generate the first feedback voltage signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Examples will now be described in detail, with reference to the accompanying drawings, in which:

(2) FIG. 1 illustrates an electronic amplifier according to a first embodiment;

(3) FIG. 2 shows four graphs displaying exemplary voltage signal readouts for an electronic amplifier according to the first embodiment;

(4) FIG. 3 displays an embodiment of an integrating arrangement for an electronic amplifier according to the first embodiment;

(5) FIG. 4 depicts an embodiment of a comparator unit for an electronic amplifier according to the first embodiment;

(6) FIG. 5 illustrates an electronic amplifier according to a second embodiment;

(7) FIG. 6 displays an embodiment of an integrating arrangement for an electronic amplifier according to the second embodiment;

(8) FIG. 7 illustrates an electronic amplifier according to a third embodiment; and

(9) FIG. 8 is a flowchart illustrating a method of amplifying a first voltage signal to be amplified according to an embodiment.

DETAILED DESCRIPTION

(10) Proposed is an electronic amplifier for amplification of a voltage signal. There is proposed a concept of performing a voltage-time-voltage conversion using a comparator integration operation in order to perform this amplification.

(11) Turning to FIG. 1, an exemplary embodiment of a non-inverting electronic amplifier 1 is shown. A first input voltage signal, also called a first voltage signal to be amplified, (V.sub.in1) is received by a comparator arrangement 11 comprising at least a latched comparator unit 112. The comparator arrangement has a first supply voltage (V.sub.sup1), which is no greater than 0.7V in order to provide a low supply voltage amplifier. The latched comparator unit compares the input signal to a first feedback voltage signal (V.sub.fb1) at a sampling frequency (f.sub.s). Based upon this comparison, the comparator arrangement generates a first two-level comparison voltage signal (V.sub.comp1). The first level of the two-level comparison voltage signal may, for example, be generated if the first input voltage is greater than the feedback voltage signal (i.e. V.sub.in1>V.sub.fb1). The second level of the two-level comparison voltage signal may, for example, be similarly generated if the first input voltage is less than or equal to the feedback voltage signal (i.e. V.sub.in1V.sub.fb1).

(12) In an optional adaptation, the first level of the two-level voltage comparison signal is of a larger magnitude than the second level of the two-level voltage comparison signal. In an alternative embodiment, however, the second level of the two-level voltage comparison signal is of a larger magnitude than the first level of the two-level voltage comparison signal.

(13) In other words, the two-level comparison voltage signal may have two states, high (e.g. at the supply voltage) or low (e.g. at a ground voltage). The state is toggled dependent upon the sign of the input difference (i.e. V.sub.in1V.sub.fb1).

(14) The two-level comparison voltage signal is received by an integrating arrangement 12 having a second supply voltage (V.sub.sup2), which is also no greater than 0.7V. The integrating arrangement integrates the first two-level discrete voltage signal with respect to time, thereby generating a first amplifier output signal (V.sub.out1) which is proportional to the first two-level discrete voltage signal integrated over time.

(15) The first amplifier output signal is subsequently transmitted to a first feedback network 13. The feedback network applies a gain to the first amplifier output signal, thereby generating the first feedback voltage signal. Typically, although not always, the first feedback network carries out this gain operation by attenuating the first amplifier output voltage signal using, for example, two resistors arranged in a voltage divider configuration. Thus a first feedback voltage signal may also be referred to as an attenuated output signal.

(16) Therefore in an optional embodiment, the gain applied to the amplifier signal may be fractional, such that the first feedback voltage signal is an attenuation of the first amplifier output voltage signal. In an alternative adaptation, the gain applied to the amplified signal may not be fractional, such that the first feedback voltage signal is an amplification of the first amplifier output voltage signal.

(17) The electronic amplifier may alternatively be considered as operating in a similar manner to delta modulation. That is to say, in the present embodiment, the difference between an input value and an attenuated output value is periodically quantized by the comparator arrangement at a frequency f.sub.s. The output of the integrating arrangement may rise or fall dependent upon whether the difference is positive or negative respectively.

(18) The second supply voltage (i.e. the supply voltage of the integrating arrangement) is optionally the same as the first supply voltage (i.e. the supply voltage of the comparator arrangement).

(19) With reference to FIG. 2, the operation of the non-inverting embodiment illustrated in FIG. 1 can be more easily understood through a simple example responding to a square input. Graph 21 displays an example input voltage signal (V.sub.in1) to be amplified, a segment of a square wave, to the electronic amplifier 1 over time. Graph 22 portrays the first two-level comparison voltage signal (V.sub.comp1) generated by the latched comparator unit 11 unit over time. Graph 23 exhibits the first amplifier output signal (V.sub.out1) generated by the integrating arrangement over time. Graph 24 shows the first feedback voltage signal (V.sub.fb1), an attenuation of the first amplifier output signal, generated by the first feedback network over time.

(20) Initially, during a first time period t.sub.1, all signals are at a low voltage 0V, with the two-level comparison voltage signal 22 at the second, low level (i.e. 0V), of the two levels available. After this period of time, the voltage to be amplified rises to 0.1V. The comparator unit 112 compares the voltage to be amplified 21 to the feedback voltage signal 24. The voltage signal to be amplified is, throughout a second time period t.sub.2, greater than the feedback voltage signal, and so the comparator unit outputs a first level of the two-level comparison voltage signal 22, which may be at the supply voltage to the comparator arrangement (e.g. 0.7V). The integrating arrangement integrates the two-level comparison voltage signal over a set period of time, thereby generating an amplifier output signal 23, which resembles a rising slope. During t.sub.2, the feedback voltage signal also rises, due to its dependence on the amplifier output signal. In this example, the amplifier output signal is attenuated to a fifth of the amplifier output signal to attain the feedback voltage signal.

(21) When the feedback voltage signal 24 reaches a level equal to the voltage signal to be amplified 21 (i.e. at the beginning of t.sub.3), the voltage signal to be amplified is no longer greater than the feedback voltage signal. The two-level voltage comparison signal 22 thus drops to its initial, low, level. The integrating arrangement continues to integrate with respect to a set period of time, and thus the amplifier output signal drops. Accordingly, the feedback voltage signal also drops in response to this change. As the feedback voltage signal is no longer at an equal level to the voltage signal to be amplified, the two-level comparison signal again generates the first level of the two-level comparison voltage signal. Throughout t.sub.3, as the feedback voltage signal periodically drops below the level of the voltage signal to be amplified, this pattern repeats.

(22) As the latched comparator unit 112 only compares the voltage signal to be amplified to the feedback voltage signal at a sampling frequency, f.sub.s, high frequency noise proportional to this frequency can be seen in the amplifier output voltage signal.

(23) During t.sub.4, when the voltage signal to be amplified drops back to the initial low level voltage 0V, the feedback voltage signal is never less than the voltage signal to be amplified. Thus the two-level comparison voltage signal remains at the second, low level, and thereby the amplifier output signal and the feedback voltage signal gradually reduce to 0V.

(24) In other words, the difference between the input voltage signal 21 (V.sub.in1) and attenuated amplifier output signal 24 (V.sub.fb1) is quantized into voltage comparison signal 22 (V.sub.comp1). In the event the input voltage signal is greater than the attenuated amplifier output signal, the voltage comparison signal 22 is high (0.7V). Otherwise, when the input voltage signal is less than or equal to the attenuated amplifier output signal, the voltage comparison signal 22 is low (0V). If the voltage comparison signal 22 is high, the amplifier output signal 23 rises. Otherwise, if the voltage comparison signal is low, the amplifier output signal 23 lowers. The amplifier output signal is clipped between the voltage supply to the integrating arrangement and by the ground voltage of the integrating arrangement.

(25) FIG. 3 portrays, an exemplary integrating arrangement 12 according a possible embodiment of FIG. 1. When V.sub.comp1 is high (e.g. at a second level of the two-level voltage comparison signal), the first switch 34 turns on, and the capacitor 36 is charged by a first current source 32. The voltage at V.sub.out1 thereby rises, as during t.sub.2. The invertor 31 inverts the voltage comparison signal and thus the second switch 35 is in an off state. When V.sub.comp1 is low (e.g. at the first level of the two-level voltage comparison signal), the first switch 34 is switched off and the second switch 35 is turned on. The charge held at the capacitor 36 is discharged by a second current source 33 and the voltage at V.sub.out1 decreases accordingly.

(26) Other possible alternatives to the integrating arrangement 12 exist, of which one may comprise an arrangement adapted to accept a first and second voltage comparison signal, wherein the first voltage comparison signal controls the first switch 34 and the second voltage comparison signal controls the second switch 35.

(27) In an optional adaptation to improve the operation of an electronic amplifier according to an embodiment, the output of such integrating stage should not slew. This may be achieved by ensuring that:

(28) $\begin{matrix} \frac{I_{CP}}{C_{L}} > A .Math. f_{sig} & (1) \end{matrix}$
where I.sub.CP is the current applied by the current source 32 or 34, C.sub.L is the capacitance of the capacitor 36, A is an amplifier gain of the electronic amplifier 1 and f.sub.sig is the highest frequency of the first voltage signal to be amplified.

(29) The gain of the exemplary electronic amplifier 1 that uses the integrating arrangement of FIG. 3 may be considered to be dependent upon: the gain applied to the first amplifier output signal () by the first feedback network 13; the sampling frequency f.sub.s of the comparator arrangement 11; the time-constant of the integrating arrangement 12 () and the unity-gain bandwidth of the comparator unit 112 (.sub.u). Such a gain may be thought to be governed by the equation:

(30) $\begin{matrix} gain = \frac{V_{out 1}}{V_{in 1}} = \frac{1}{} .Math. \frac{{gain}_{OL}}{1 + {gain}_{OL}} & (2) \end{matrix}$
where the open-loop gain (gain.sub.OL) is:

(31) $\begin{matrix} {gain}_{OL} ~ \frac{1}{} .Math. (\frac{f_{s}^{2}}{_{u}}) & (3) \end{matrix}$

(32) Thus to increase the overall gain of such an amplifier appropriate values for the sampling frequency and the unity gain band-width of the comparator unit may be chosen.

(33) Turning to FIG. 4, an exemplary comparator unit for an embodiment according to FIG. 1 is shown. The pair of input transistors 44 converts the two input signals (V.sub.in1 and V.sub.fb1) into a current. This current is mirrored by the pair of current mirrors 42. Both mirrored currents are fed to the latch 46, which hold the comparison values. V.sub.comp1 outputs the two-level comparison voltage signal. V.sub.comp1.sup. outputs the inverse of the two-level comparison voltage signal, an optional feature.

(34) In an optional adaptation, the first voltage comparison signal (V.sub.comp1) controls the first switch 34 of the integrating arrangement 12, and the inverse of the first voltage comparison signal (V.sub.comp1.sup.) controls the second switch 35 of the integrating arrangement 12.

(35) In FIG. 5 another embodiment of an electronic amplifier 5 for amplifying a complimentary pair of a first (V.sub.in1) and second (V.sub.in2) voltage signal to be amplified is shown. The electronic amplifier 5 corresponds to a non-inverting embodiment. The comparator arrangement 51, having a first supply voltage (not shown), receives both the first and second voltage signal to be amplified. A first comparator unit 512 compares the first voltage signal to be amplified to a first feedback voltage signal (V.sub.fb1), thereby generating a first two-level voltage comparison signal (V.sub.comp1). A second comparator unit 514 compares the second voltage signal to be amplified to a second feedback voltage signal (V.sub.fb2), thereby generating a second two-level voltage comparison signal (V.sub.comp2). The integrating arrangement 52 receives both the first and second two-level voltage comparison signal to perform an integration operation. The integrating arrangement 52 generates a first and second amplifier output voltage signals (V.sub.out1 and V.sub.out2). The difference between the first and second amplifier output voltage signal corresponds to an amplification of the difference between the first and second voltage signals to be amplified in the complimentary pair. This may be understood as observing that:
V.sub.out1V.sub.out2=A(V.sub.in1V.sub.in2)(4)
where A is an amplifier gain of the electronic amplifier 5.

(36) Both amplifier output voltage signals are received by a respective first 532 and second 534 feedback network. Each feedback network applies a gain to their respective amplifier output voltage signal to generate the first and second feedback voltage signal.

(37) Optionally, the magnitude of the gain applied to the first and second feedback voltage signal is the same value.

(38) In another possible embodiment, the electronic amplifier 5 is further adapted to comprise a complimentary pair of chopper switches, the first spanning the first and second voltage signal to be amplified, the second spanning the first and second amplifier output voltage signals. The chopper switch helps to mitigate the effect of pink or flicker noise.

(39) There may be high frequency noise spurs in either or both of the amplifier output voltage signals, caused by, for example, quantization noise. This noise may be filtered out using at least one low-pass filter.

(40) FIG. 6 portrays an exemplary integrating arrangement 52 according a possible embodiment of FIG. 5. Both comparison voltage signals V.sub.comp1 and V.sub.comp2 are received by the integrating arrangement 52 and applied to a first 64 and second 65 switch respectively. When V.sub.comp1 is high, the current source 62 charges the capacitor 66. When V.sub.comp2 is low, the current source 63 applies a negative charge on the capacitor 66, increasing the rate of discharge. V.sub.out1 and V.sub.out2 are thus generated relative to the amount of charge at each terminal of the capacitor.

(41) In the example above, the supply voltage for the comparator and for the integrator are given as 0.7V. The supply voltage may be lower, for example in the range 0.2V to 0.6V, for example 0.3V or 0.4V. The amplifier is for example of interest for amplifying low voltage signals, for example in the range 1 mV to 100 mV, with a typical gain in the range 10 to 100. The sampling frequency fs may for example be in the range 1 MHz to 15 MHz, for example 5 MHz to 10 MHz.

(42) The circuit arrangement described above enables a low voltage implementation by using a low voltage comparator (such as shown in FIG. 4) and a low voltage integrator. As a conventional amplifier design at low voltages suffers from limited voltage headroom, there is a three way trade-off between gain, voltage swing and power consumption. A high gain is important to improve accuracy. Thus, a typical amplifier design has either reduced voltage swing or increased power consumption. A comparator as embodied herein, may not suffer from limited voltage headroom because the information is converted into the time domain. The gain of such a comparator depends on both its reset frequency and its unity-gain bandwidth, neither of which depend on the voltage supply to a first order. However, a low voltage supply to a comparator unit may limit the maximum reset frequency (f.sub.s) available. Thus, it may be preferable to limit the reset frequency (f.sub.s) to be less than 15 MHz, and particularly less than 10 MHz for a voltage supply <0.7V. F.sub.s<10 MHz is acceptable for a variety of applications, including amplification of a sensor readout.

(43) The invention is for example of particular interest for low voltage instrumentation amplifiers as the electronic amplifier may be considered to be an instrumentation amplifier due in part to the high input impedance of the at least one comparator unit of the comparator arrangement. In one optional alternative, however, the electronic amplifier described herein may be used to replace each operational amplifier in a standard instrumentation amplifier configuration with three operational amplifiers.

(44) Another embodiment for amplification of a first voltage signal to be amplified is illustrated in FIG. 7. This embodiment is a negative feedback or inverting configuration of the electronic amplifier. The first voltage signal V.sub.in1 and a first feedback signal V.sub.fb1 are provided to the comparator arrangement 71. The comparator unit 711 of the comparator arrangement 71 generates a first two-level voltage comparison signal corresponding to whether the difference between the first voltage signal and the first feedback signal is positive or negative (i.e. V.sub.in1V.sub.fb1). The two-level voltage comparison signal is provided to the integrating arrangement 72, which may be as embodied, for example, in FIG. 2. The integrating arrangement integrates the two-level voltage comparison signal to generate a first amplifier output signal.

(45) The first amplifier output signal is provided to the first feedback network 73, which comprises a voltage divider having a first 731 and second 732 resistor. In an embodiment, this feedback network applies fractional gain to the first amplifier output signal such that the feedback signal supplied to the comparator arrangement 71 is an attenuation of the first amplifier output signal.

(46) A method of amplifying a voltage signal can be described with regard to FIG. 8, wherein a voltage signal is first compared 82 to a feedback signal to generate a two-level voltage comparison signal. This two-level voltage comparison signal is integrated over time 84 to generate an amplifier output signal. To generate the feedback signal for comparison with the voltage signal, a gain is applied 86 to the amplifier output signal.

(47) Other embodiments will be apparent to those skilled in the art.

Low voltage supply amplifier and amplification method

Assignee

Inventors

Cpc classification

Classification Explorer

H03F2203/45168

ELECTRICITY

Classification Explorer

H03F2203/45138

ELECTRICITY

Classification Explorer

H03F2200/513

ELECTRICITY

Classification Explorer

H03F3/45179

ELECTRICITY

Classification Explorer

H03F1/0205

ELECTRICITY

Classification Explorer

H03F3/45475

ELECTRICITY

International classification

Classification Explorer

G06G7/12

PHYSICS

Classification Explorer

H03F3/45

ELECTRICITY

Classification Explorer

H03F1/02

ELECTRICITY

Classification Explorer

G06G7/26

PHYSICS

Abstract

Claims

Description