CIRCUIT AND METHOD FOR MONITORING A DC LINK CAPACITOR

Abstract

The invention relates to a device and a method for monitoring a DC link capacitor (C.sub.ZK) in an electrical DC link of a circuit (1) operated on a mains voltage V.sub.ac, the circuit comprising a power factor correction filter (PFC) and an inverter (20), the DC link capacitor (C.sub.ZK) to be monitored being between the power factor correction filter (PFC) and the inverter (20). During the operation of the circuit (1), the DC link capacitance C of the DC link capacitor (C.sub.ZK) is determined at least at certain time intervals over the operating time by measuring a power ripple W of a DC link voltage V.sub.ZK, which DC link voltage arises at the DC link capacitor (C.sub.ZK), said power ripple pulsing at twice the frequency of the mains voltage, and the remaining service life or the service life end and/or usability end of the DC link capacitor (C.sub.ZK) is determined, by means of an evaluation circuit (30), from the DC link capacitance C determined in this way.

Claims

1.-8. (canceled)

9. A method for monitoring a DC link capacitor (C.sub.ZK) in an electrical DC link of a circuit operated on a mains voltage V.sub.ac, the circuit comprising: a power factor correction filter and an inverter, the DC link capacitor (C.sub.ZK), to be monitored, is between the power factor correction filter (PFC) and the inverter, during the operation of the circuit, the DC link capacitance C of the DC link capacitor (C.sub.ZK) is determined at least at certain time intervals over the operating time by measuring a power ripple W of a DC link voltage (VZK), which DC link voltage arises at the DC link capacitor (C.sub.ZK), the power ripple pulsing at twice the frequency of the mains voltage; and remaining service life or the service life end or usability end of the DC link capacitor (C.sub.ZK) is determined, by an evaluation circuit, from the DC link capacitance C determined in this way, and power of power correction filter consumed over a mains half-wave is detected by mains input voltage i.sub.mains that was determined previously in order to regulate the power factor correction filter and input current i.sub.mains already determined for this purpose.

10. The method as set forth in claim 9, wherein, in order to determine the DC link capacitance C of the DC link capacitor (C.sub.ZK), a power measurement and a voltage measurement are performed at the DC link capacitor (C.sub.ZK) in order to determine the voltage ripple.

11. The method as set forth in claim 9, wherein the method is used to monitor the DC link capacitor of an EC motor that is operated via a motor control circuit having the DC link capacitor, the motor control circuit having a sensor system for operating the EC motor, and this sensor system is used simultaneously to detect the power and/or measure the voltage of the voltage ripple at the DC link capacitor (C.sub.ZK).

12. The method as set forth in claim 11, where the power is measured without knowledge of the mains input voltage V.sub.ac by first determining the current i.sub.D through a boost diode of the power factor correction filter (PFC) and then determining the remainder from the following relationship and the detection of the inverter current I.sub.inv that is flowing as the DC link capacitor current I.sub.ZK to the DC link capacitor (C.sub.ZK):I.sub.ZK=i.sub.D−I.sub.inv, and the current capacitance value of the DC link capacitor (C.sub.ZK) can be determined directly from this by integrating the current I.sub.ZK or by determining the charge carriers.

13. The method as set forth in claim 12, wherein the current i.sub.D is detected by indirect measurement from the measured mains current by using a duty cycle to calculate the proportion of the current flowing through the boost diode.

14. The method as set forth in claim 9 where the DC link capacitance is determined by an observer system, current i.sub.D through a diode and the inverter current I.sub.inv is performed by measuring the two currents, the difference being regarded as the DC link capacitor current I.sub.ZK, and this is multiplied by a capacitance value C.sub.est and then integrated, and the resulting output voltage U.sub.ZK_est at the integrator of the observer system is filtered by a high-pass filter in order to obtain the high-pass-filtered voltage ripple U.sub.ZK_est, HP, and the determined difference ΔU is integrated and given as C.sub.est, whereby an observer/control loop is obtained which tracks the model loopwise to the actually measured capacitor.

15. An electrical circuit for monitoring a DC link capacitor (C) in an electrical DC link of a circuit operated on a mains voltage .sub.Vac, the circuit comprising: a power factor correction filter and an inverter; the DC link capacitor (C.sub.ZK), to be monitored, being between the power factor correction filter and the inverter; and an evaluation circuit to acquire or detect physical measured values from the power factor correction filter and the inverter and, during operation of the circuit, the DC link capacitance C of the DC link capacitor (C.sub.ZK) is determined at least at certain time intervals over the operating time by measuring a power ripple W of a DC link voltage (C.sub.ZK) for power ripple pulsing at twice the frequency of the mains voltage, and remaining service life or service life end and/or usability end of the DC link capacitor (C.sub.ZK) is determined from the DC link capacitance C.

Description

DRAWINGS

[0032] The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations and are not intended to limit the scope of the present disclosure.

[0033] FIG. 1 is a schematic view of the implementation of a first exemplary embodiment of a circuit topology.

[0034] FIG. 2 is a schematic view of the implementation of an alternative exemplary embodiment.

[0035] FIG. 3 is a diagram with an explanation of characteristic curves plotted against the voltage.

[0036] FIG. 4 is a schematic view of a basic circuit diagram.

[0037] FIG. 5 is a schematic view of a flow chart for determining capacitance.

DETAILED DESCRIPTION

[0038] The disclosure will be explained in greater detail below on the basis of the two illustrated exemplary embodiments with reference to FIGS. 1 to 3. The same reference symbols in the figures indicating same structural and/or functional features.

[0039] FIG. 1 is a basic circuit diagram of the basic circuit topology of a first exemplary embodiment. Thus, the capacitance and, from this, the service life of a DC link capacitor C.sub.ZK can be determined. The circuit 1 includes an active power factor correction filter PFC, that has two inputs E1, E2 connected to a mains voltage supply. In the present exemplary embodiment, the mains voltage supply is a 230 V AG mains voltage.

[0040] The circuit 1 also includes an inverter 20. In terms of switching, the inverter 20 is connected to an electronically commutable motor (EC motor) 3. The DC link capacitor C.sub.ZK, to be monitored, is located between the power factor correction filter PFC and the inverter 20. Furthermore, the circuit 1 has an evaluation circuit 30 including a microcontroller.

[0041] The evaluation circuit 30 receives, from the power factor correction filter PFC, the depicted physical measured quantities mains current IC-mains, mains voltage V-mains, and DC link voltage V.sub.ZK. The evaluation circuit 30 also receives the inverter current I.sub.INV and the DC link voltage V.sub.ZK from the inverter. The description of the exemplary embodiment relates in particular to a system with an active PFC and an EC motor with low dynamic requirements. This means that there are slight changes in torque and speed.

[0042] With the specific knowledge of the input voltage V-mains and the input current I-mains, which are already measured by the PFC control, the electrical power consumed by the power factor correction filter PFC over a mains half-wave can be determined. The output of the inverter that drives the EC motor is also known. The power of the inverter 20 is determined via its sensors or from the parameters of the motor control. The electrical power consumed from the grid by the power factor correction filter PFC and the electrical power consumed by the inverter 20 can be assumed to be constant in steady-state operation over a mains period. As a result, there is a quasi-equilibrium between the power consumption of the power factor correction filter PFC from the mains and the power consumption of the inverter 20. However, when considered within a mains half-wave in terms of mains frequency, the electrical power consumed from the voltage mains is dependent on the current and on the voltage and has a sinusoidal square component. The inverter 20 or the EC motor 3 connected to it should ideally have a constant power consumption.

[0043] The actual differences in power consumption lead to an energy surplus or energy deficit within a mains period. The difference between the electrical energy consumed and the electrical energy outputted within half a mains period is stored in the DC link capacitor C.sub.ZK. This provides an increase or decrease in the DC link voltage V.sub.ZK within the specified mains period.

[0044] If the voltage offset and the voltage itself are now evaluated, the electrical energy stored in the DC link capacitor C.sub.ZK can be calculated using the following formula:

W.sub.1=½C.sub.ZK.Math.U.sub.ZK1.sup.2

W.sub.2=½C.sub.ZK.Math.U.sub.ZK2.sup.2

[0045] U.sub.ZK1 and U.sub.ZK2 are each the DC link voltage that is obtained from the power factor correction filter PVC, on the one hand, or from the inverter 20.

[0046] Since the stored electrical energies are known at any point in time during operation, the value of the capacitance of the DC link capacitor G.sub.ZK can be determined by simply rearranging the equations.

[0047] In the following, two variants of this basic idea that has been initially described are explained.

[0048] In a first option, the method is carried out without an input voltage measurement being performed by the power factor correction filter PFC. If the line voltage is consequently not measured, an estimate can be made about it in the case of sinusoidal line voltage forms. To do this, the current through a boost diode must first be determined. This can be done either directly with the aid of a current measuring circuit or, alternatively, indirectly from the measured mains current I-mains. As described above, the line current I-mains is already transferred from the power factor correction filter PFC to the evaluation circuit 30. Since the diode current 1.sub.D flows into the node to the DC link capacitor C.sub.ZK and to the inverter 20, the diode current I.sub.D is divided into the DC link capacitor current 1.sub.ZK and the inverter current I.sub.INV.

[0049] When measuring the mains current, the duty cycles are used to calculate the current with a view to which specific proportions of the current flows through the boost diode and which proportion flows through the transistor of the power factor correction filter PFC, which is also present.

[0050] Thus, after the knowledge of the inverter current I.sub.INV has been obtained, the DC link capacitor current I.sub.ZK, flowing to the DC link capacitor C.sub.ZK, can be calculated by simple subtraction. The capacitance value C of the DC link capacitor C.sub.ZK can then be determined by integrating the current or determining the charge carriers.

[0051] Another alternative method will be described below with reference to FIG. 2. This figure shows an embodiment using a band-pass-filtered observer. This possibility of determining the DC link capacitance of the DC link capacitor C.sub.ZK represents a simulation by an observer system, which will be described in greater detail below.

[0052] The observer shown in FIG. 2 includes the inputs U.sub.ZK, M.sub.MEAS, and I.sub.D for the diode current and I.sub.INV for the inverter current. The current ΔI, which is fed to an integrator of the observer system, is determined from the current differential. The output of this integrator provides the voltage quantity U.sub.ZK, EST. This is transferred to a transformer TP of the observer system. A second transformer TP receives the quantity U.sub.ZK, MEAS at the input and transfers the quantity U.sub.ZK, MEAS, TP at the output to the second integrator after the transformation. The values are fed back to the control loop via the second integrator. The value 1 is outputted after the second integrator by C.sub.ZK, IST.

[0053] Since ΔI is regarded as the current through the DC link capacitor C.sub.ZK, this is multiplied by the value C.sub.EST and then integrated. This is in keeping with the calculation rule for a capacitor. The resulting output voltage U.sub.ZK, EST at the integrator is filtered by a high-pass filter. For this purpose, a low-pass-filtered component U.sub.ZKS, TP is subtracted from U.sub.ZKS. The resulting voltage is referred to as U.sub.ZK, EST, HP. The voltage U.sub.ZK, EST calculated in this manner only has the 100 Hz ripple due to the pulsating power consumption from the mains (at a mains frequency of 50 Hz).

[0054] This voltage ripple is subtracted from a high-pass-filtered mains voltage U.sub.ZK, mains, HP. The difference ΔU is further integrated.

[0055] The ΔU resulting from a deviation of the model from the real DC link capacitor C.sub.ZK is thus a measure of how well and exactly the model depicts reality. If ΔU is integrated and specified as C.sub.EST, this creates an observer control loop that tracks the model continuously to the actually measured capacitor.

[0056] The advantage is that this solution is easy to implement, and no difficult arithmetic operations are required. Furthermore, averaging over a large number of periods is possible, so that one-off disturbances and measurement fluctuations can be compensated for.

[0057] FIG. 3 shows a diagram where, in addition to the ripple voltage ΔU_d (characteristic curve a), the load current I_L (characteristic curve d) and the frequency of the mains voltage f_ac (diagram time difference 2*(t2−t0)) are illustrated.

[0058] The average charging current of the DC link capacitor can be calculated backward on the basis of the proportional relationship of capacitance, current, and voltage swing (ripple voltage) together with the times of falling and rising voltage (time differences between t0, t1, and t2) using the following formula:

[00002]$I_{\mathrm{Ladestrom},\mathrm{Mittel}\_\mathrm{t0}/t1}=\frac{C_{\mathrm{Elko}}*\Delta U_d}{\Delta t}\mathrm{mit}\Delta t=t1-t0\mathrm{und}\Delta U_d=\mathrm{delta}U$

[0059] The mean RMS charging current from the mains over the entire mains period then follows from I.sub.charging current*Δt.sub.recharging time/t.sub.mains period.

[0060] If the operating circuit at the mains input has an NTG to limit the inrush current or other resistors (as intended or even parasitic), the unknown voltage drop across these resistors means that no precise back-calculation to the mains voltage can be made using the following equation:

[00003]$U_{\mathrm{mains}\mathrm{voltage}}=\frac{U_{DC\mathrm{link}}}{\sqrt{2}}$

[0061] In order to get an exact determination of the mains voltage from the known DC link voltage value, 2 diode sections in the bridge rectification (˜2*0.8V=1.6V) as well as the voltage drop across the resistors in the input circuit would have to be taken into account.

[0062] The voltage drop across the resistors in the input circuit can now be determined using the recharge current calculated above and a table of ambient temperature and current via the mains input components stored in the microcontroller. The latter table or data sets are needed in order to compensate for the temperature dependency of the resistances in the input circuit (e.g., with NTG) due to self-heating or ambient temperature.

[0063] Early failure detection by measuring the residual capacitance of the DC link capacitor is a method where the past (running time, temperature, ripple current load) and its effect on the capacitor are considered. A combined ripple current of the capacitor can be calculated with the optionally calculated recharging current and the motor current, which is also known from current measurement. Together with the ambient temperature from another, optional temperature sensor, a forward-looking calculation of the remaining service life can be performed if the operating point (temperature and power) is assumed to be constant. A corresponding exemplary embodiment of a basic circuit diagram can be found in FIG. 4, and a flowchart for determining the capacitance can be found in FIG. 5.

[0064] The disclosure is not limited in its execution to the abovementioned preferred exemplary embodiments. Rather, a number of variants are conceivable that make use of the illustrated solution even in the form of fundamentally different embodiments.

[0065] The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.