Transmitter and receiver devices performing repetition before interleaving and puncturing after interleaving and methods thereof

10128983 ยท 2018-11-13

Assignee

Inventors

Cpc classification

International classification

Abstract

The present disclosure relates to transmitter and receiving devices for wireless communication, where the transmitter device comprises a transceiver configured to receive at least one stream of information bits; and further comprises a processor configured to encode said at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate R.sub.M; obtain a shortened code word or extended code word based on the determination of whether the mother code rate R.sub.M is smaller than a transmission code rate R.sub.Tx; modulate said shortened or extended code word to obtain modulated symbols; wherein said transceiver is further configured to transmit a signal comprising said modulated symbols over a radio channel of the wireless communication system. Furthermore, the present disclosure also relates to corresponding methods, a computer program, and a computer program product.

Claims

1. A transmitter device for a wireless communication system, the transmitter device comprising: a transceiver that receives at least one stream of information bits; a memory comprising instructions; and a processor coupled to the transceiver and the memory, wherein the instructions cause the processor to: encode the at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate (R.sub.M); perform interleaving and rate matching based on the R.sub.M and a transmission code rate (R.sub.TX) associated with the at least one mother code word, wherein the R.sub.M comprises a ratio of a number of information bits divided by a number of coded bits, wherein the R.sub.TX comprises a ratio of the number of information bits divided by a total number of bits transmitted over resource elements used for data transmission, and wherein performing interleaving and rate matching based on the R.sub.M and the R.sub.TX comprises: first interleaving the at least one mother code word to obtain an interleaved code word, and second rate matching the interleaved code word to obtain a shortened code word having a code rate that is higher than the R.sub.M when the R.sub.M is smaller than the R.sub.Tx associated with the at least one mother code word; and first rate matching the at least one mother code word to obtain an extended code word, and second interleaving the extended code word having a code rate that is lower than the R.sub.M when the R.sub.M is not smaller than the R.sub.Tx associated with the at least one mother code word; and modulate the shortened or extended code word to obtain modulated symbols, and wherein the transceiver transmits a signal comprising the modulated symbols over a radio channel of the wireless communication system.

2. The transmitter device according to claim 1, wherein the processor comprises a Low Density Spreading (LDS) matrix interleaver for interleaving the at least one mother code word or extended code word.

3. The transmitter device according to claim 2, wherein the LDS matrix interleaver applies column permutation on elements of interleaver matrices.

4. The transmitter device according to claim 2, wherein the LDS matrix interleaver size is adapted to different code rates associated with different streams of information bits for transmission.

5. The transmitter device according to claim 2, wherein the LDS matrix interleaver adds dummy bits to the shortened or extended code word such that a code word length of the shortened or extended code word is a multiple of the number of columns of an interleaver matrix.

6. The transmitter device according to claim 2, wherein the LDS matrix interleaver is a rectangular interleaver.

7. The transmitter device according to claim 1, wherein the transmitter device comprises a Code Division Multiple Access (CDMA) transmitter, a High Speed Downlink Packet Access (HSDPA) transmitter, or a Multi Carrier (MC)-CDMA transmitter adapted for transmitting the signal.

8. The transmitter device according to claim 7, wherein the CDMA transmitter, the HSDPA transmitter, or the MC-CDMA transmitter is configured to use more signature sequences than chips for transmission when transmitting the signal.

9. The transmitter device according to claim 8, wherein the signature sequences are sparse signature sequences.

10. The transmitter device according to claim 1, wherein the error correction code is a turbo code or a convolutional code.

11. A receiver device for a wireless communication system, the receiver device comprising: a receiver that receives a signal comprising modulated symbols associated with at least one shortened or extended code word having a code rate over a radio channel of the wireless communication system; a memory comprising instructions; and a processor coupled to the receiver and the memory, wherein the instructions cause the processor to: demodulate the received signal to obtain a demodulated signal; perform de-interleaving and de-rate matching based on a mother code rate (R.sub.M) and a transmission code rate (R.sub.TX) associated with at least one mother code word, wherein the R.sub.M comprises a ratio of a number of information bits divided by a number of coded bits, wherein the R.sub.TX comprises a ratio of the number of information bits divided by a total number of bits transmitted over resource elements used for data transmission, and wherein performing de-interleaving and de-rate matching based on the R.sub.M and the R.sub.TX comprises: first de-rate matching the demodulated signal to obtain a de-rate matched demodulated signal and second de-interleaving the de-rate matched demodulated signal to obtain the mother code word when the code rate is larger than the R.sub.M of the mother code word for the shortened or extended code word; and first de-interleaving the demodulated signal to obtain a de-interleaved demodulated signal and second de-rate matching the de-interleaved demodulated signal to obtain the mother code word when the code rate is not larger than the R.sub.M of the mother code word for the shortened or extended code word; and decode the at least one code word to obtain information bits associated with the mother code word.

12. A transmission method in a wireless communication system, the method comprising: receiving at least one stream of information bits; encoding the at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate (R.sub.M); perform interleaving and rate matching based on the R.sub.M and a transmission code rate (R.sub.TX) associated with the at least one mother code word, wherein the R.sub.M comprises a ratio of a number of information bits divided by a number of coded bits, wherein the R.sub.TX comprises a ratio of the number of information bits divided by a total number of bits transmitted over resource elements used for data transmission, and wherein performing interleaving and rate matching based on the R.sub.M and the R.sub.TX comprises: first interleaving the at least one mother code word to obtain an interleaved code word, and second rate matching the interleaved code word to obtain a shortened code word having a code rate that is higher than the R.sub.M when the R.sub.M is smaller than the R.sub.TX; and first rate matching the at least one mother code word to obtain an extended code word, and second interleaving the extended code word having a code rate that is lower than the R.sub.M when the R.sub.M is smaller than the R.sub.TX; modulating the shortened or extended code word to obtain modulated symbols; and transmitting a signal comprising the modulated symbols over a radio channel of the wireless communication system.

13. The transmission method according to claim 12, wherein the method further comprises interleaving the at least one mother code word or extended code word by a Low Density Spreading (LDS) matrix interleaver.

14. The transmission method according to claim 13, wherein the method further comprises applying column permutation on elements of interleaver matrices.

15. The transmission method according to claim 13, wherein the method further comprises adapting the LDS matrix interleaver size to different code rates associated with different streams of information bits for transmission.

16. The transmission method according to claim 13, wherein the method further comprises adding dummy bits to the shortened or extended code word such that a code word length of the shortened or extended code word is a multiple of the number of columns of an interleaver matrix.

17. A receiving method in a wireless communication system, the method comprising: receiving a signal comprising modulated symbols associated with at least one shortened or extended code word having a code rate over a radio channel of the wireless communication system; demodulating the received signal to obtain a demodulated signal; perform de-interleaving and de-rate matching based on a mother code rate (R.sub.M) and a transmission code rate (R.sub.TX) associated with at least one mother code word, wherein the R.sub.M comprises a ratio of a number of information bits divided by a number of coded bits, wherein the R.sub.TX comprises a ratio of the number of information bits divided by a total number of bits transmitted over resource elements used for data transmission, and wherein performing de-interleaving and de-rate matching based on the R.sub.M and the R.sub.TX comprises: first de-rate matching the demodulated signal to obtain a de-rate matched demodulated signal and second de-interleaving the de-rate matched demodulated signal to obtain the mother code word when the code rate is larger than the R.sub.M of the mother code word for the shortened or extended code word; and first de-interleaving the demodulated signal to obtain a de-interleaved demodulated signal and second de-rate matching the de-interleaved demodulated signal to obtain the mother code word when the code rate is not larger than the R.sub.M of the mother code word for the shortened or extended code word; and decoding the mother code word to obtain information bits associated with the mother code word.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The appended drawings are intended to clarify and explain different embodiments of the present disclosure, in which:

(2) FIG. 1 shows a block diagram of conventional transmitter in LDS communication system;

(3) FIG. 2 shows a block diagram of a conventional receiver in a LDS communication system;

(4) FIG. 3 shows a block diagram of transmitter in the bit-interleaved low density spreader (BI-LDS) communication system;

(5) FIG. 4 shows a block diagram of a receiver in BI-LDS communication system;

(6) FIG. 5 shows a block diagram of the transmitter in a BI-LDS communication system with LDS bit interleaver;

(7) FIG. 6 shows a block diagram of BI-LDS communication system when several data streams are superimposed;

(8) FIG. 7 shows a block diagram of LDS transmission scheme including interleavers;

(9) FIG. 8 shows a block diagram of LDS reception scheme including interleavers;

(10) FIG. 9 shows spectral efficiency for code rate R=0.4convolutionally coded system;

(11) FIG. 10 shows spectral efficiency for code rate R=0.8convolutionally coded system;

(12) FIG. 11 shows spectral efficiency for code rate R=0.1convolutionally coded system;

(13) FIG. 12 shows an embodiment of a transmitter device;

(14) FIG. 13 shows an embodiment of a receiver device;

(15) FIG. 14 shows a flow chart of a method in a transmitter; and

(16) FIG. 15 shows a flow chart of a method in a receiver.

DETAILED DESCRIPTION

(17) Typically, most error correcting codes are designed to protect against statistically independent errors. For example, such errors occur on the AWGN communication channel as a consequence of the thermal noise of the receiver input and in the first radio frequency (RF) stages. On fading channels, instead, large amplitude variations of the received signal whose duration exceeds a number of signaling intervals results in bursts of erroneously received information symbols. Because of that, the bit errors at the receiver are not statistically independent, and therefore the error correction code designed for the AWGN channel would not be capable to effectively protect information on burst-error communication channels.

(18) A simple and effective method for bit error correction on burst-error channels is to use the available codes designed for the AWGN channel along with an additional functional block, called (channel) bit interleaver, which performs permutation of the bits of each (rate-matched) code word. The corresponding inverse permutation is performed by the de-interleaver operating at the receiver. The de-interleaver transforms a burst of errors into a disperse pattern of errors possibly spanning multiple code words. In such case, the number of errors per code word is reduced, and thus the error correction capability of the overall scheme is enhanced. As far as convolutional codes are concerned, the bit de-interleaver can spread the errors of a burst over a wider interval, thus rendering a non-correctable error pattern into a correctable one. In these cases, a good bit interleaver is such that two adjacent bits in error in the received code word are separated by a large distance after deinterleaving.

(19) Note that, on the AWGN channel, as long as noise samples are statistically independent, the interleaver and the de-interleaver have no impact on the link performance of a system without LDS. Therefore the channel bit interleaver in FIG. 1 is denoted as optional. In the last stage of the transmitter chain, the LDS Transmit (Tx) stage performs spreading and concurrent transmission of multiple information symbols.

(20) The corresponding conventional LDS receiver is shown in FIG. 2. The BP-MUD demodulator generates soft values, i.e. LLR, of the coded bits. After deinterleaving (performed only if there is a bit interleaving operation at the transmitter), the computed LLRs are fed to the error correction decoder. The LLR calculation in the BP-MUD is done once the BP-MUD iterative processing is finished. It uses the final estimated probabilities of all possible symbols from the modulation constellation for each code channel, i.e. for each signature.

(21) In other words, the BP-MUD performance is determined by the performance of the estimation of transmitted modulation symbols, meaning that the bits inside these symbols are not directly estimated.

(22) From the observations, the connections between each chip and the corresponding symbol variables allow almost ML detection performance of the sequence of n symbol variables transmitted in a LDS transmission interval, but in the same time might be source of a relatively long sequence of erroneously detected symbols.

(23) Numerical simulations confirmed that it happens indeed, even at high Signal-to-Noise Ratios (SNRs) at the receiver, even if the average symbol or bit error rate is quite low, after averaging over a large number of LDS transmission intervals, the instantaneous error rate obtained as the number of erroneously detected symbols in a single LDS transmission interval can be rather high; sometimes more than 50% of n concurrently transmitted modulation symbols can be erroneously detected. These erroneous detected LDS segments are followed by a large number of correct segments, which make the overall average error rate low. Such burst-error behavior of LDS BP-MUD on AWGN channel seems to be its fundamental inherent drawback.

(24) When error correction coding is included in the LDS transmission, the code word is modulated into a vector of N.sub.CWS symbols, where typically N.sub.CWS>>n. Therefore, the word of modulated symbols has to be fragmented into N.sub.LDS segments, each consisting on n modulation symbols, so that

(25) N LDS = .Math. N CWS n .Math. eq . ( 1 )

(26) If N.sub.CWS is not an integer multiple of n, N.sub.CWSnN.sub.LDS padding bits are appended to the code word.

(27) The error bursts of LDS BP-MUD, which may occur after reception of some segments of the code word, even on AWGN channel, result in the bursts of erroneous LLRs which prevent correct decoding. Consequently, if one compares the performance of LDS transmission to the performance of a conventional communication system on the AWGN channel, either without error correction coding, the performance of uncoded LDS transmission is relatively worse than that of coded LDS transmission. In other words, the SNR gain provided by error correction coding is less pronounced with LDS transmission than with ordinary transmission.

(28) In order to evenly distribute symbol errors generated by the LDS BP-MUD in one LDS reception interval into a large interval, it has been proposed to introduce additional functions in the conventional LDS transmitter and receiver. These functions are called LDS interleaver and LDS de-interleaver. The resulting transmission scheme is called BI-LDS, and the corresponding transmitter and receiver schemes are shown in FIGS. 3 and 4.

(29) The LDS interleaver in FIG. 3 performs a permutation of the coded bits after rate matching and/or corresponding modulation symbols so that the information bits transmitted in each of the previously mentioned segments of the code word are selected from distant positions in the original code word. At the receiver in FIG. 4, after deinterleaving, the bursts of erroneously estimated soft-values are uniformly distributed over the whole code word. The LDS de-interleaver in FIG. 4 performs de-interleaving of bit LLR values obtained after LDS BP-MUD.

(30) Proposed interleaver can be implemented as a specially designed LDS bit interleaver, followed by a modulator as shown in FIG. 5.

(31) The LDS bit interleaver that maximizes the distance between any two coded bits transmitted in any of the LDS transmission intervals corresponding to different segments of a single error correction codeword is the one which we will call the Maximum Distance Separable (MDS) bit interleaver.

(32) The MDS bit interleaver maps any two neighboring bits in the original code word into two new positions in the interleaved code word so that the minimum distance between such two new positions cannot be larger. In other words, such LDS bit interleaver exhibits a property that we call Maximum Distance Separability (MDS).

(33) The MDS type of LDS bit interleaver can be implemented as a matrix, as shown in the following matrix. The MDS can be described as a matrix of size N.sub.LDSnM, M being the number of bits transmitted in each modulation symbol, where the whole code word of N.sub.CWB=MN.sub.CWS bits is written column-wise into the matrix, then the complete rows are read into the LDS transmitter at successive transmission intervals.

(34) [ 1 N LDS + 1 .Math. ( Mn - 1 ) N LDS + 1 2 N LDS + 2 .Math. ( Mn - 1 ) N LDS + 2 .Math. .Math. .Math. N LDS 2 N LDS .Math. MN CWS ]

(35) This structure is known as rectangular interleaver.

(36) In general case, several streams of information bits are encoded, rate matched, interleaved and modulated. Different resulted modulated symbol streams are linearly combined or superimposed using signature matrix as shown in FIG. 6. In this case, each stream of information bit corresponding possibly to a different user could be encoded using a different code rate.

(37) The present solution relates to transmitting and receiving device for wireless communication systems and corresponding methods thereof.

(38) With reference to FIG. 12 the present transmitting device 20 comprises a transceiver 25 configured to receive at least one stream of information bits. The device further comprises a processor 30 configured to encode said at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate R.sub.M. If the mother code rate R.sub.M is smaller than a transmission code rate R.sub.Tx, interleave said at least one mother code word to obtain an interleaved code word, and rate match said interleaved code word, to obtain a shortened code word having a code rate that is higher than the mother code rate R.sub.M. However, if the mother code rate R.sub.M is not smaller than a transmission code rate R.sub.Tx associated with said at least one mother code word, rate match said at least one mother code word to obtain an extended code word, and interleave said extended code word, having a code rate that is lower than the mother code rate R.sub.M. The shortened or extended code word is modulated so as to obtain modulated symbols. The transceiver 25 is further configured to transmit a signal comprising said modulated symbols over a radio channel of the wireless communication system 10.

(39) Such a transmitter device 20 is as mentioned shown in FIG. 12, in which the processor 30 receives streams of information bits from the transceiver 25 and process them according to the present solution. After processing by the processor 30 the transceiver 25 transmits a signal comprising modulated symbols. Mentioned units are shown in FIG. 12.

(40) Alternatively the present transmitter device 20 may comprise dedicated units for performing the present solution. That is, the transmitter device 20 comprises in this case: a receiving unit for receiving at least one stream of information bits; an encoding unit for encoding said at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate R.sub.M, the encoding unit can also be called encoder; and decision unit for deciding/determine if the mother code rate R.sub.M is smaller or not smaller than a transmission code rate R.sub.Tx associated with said at least one mother code word, i.e. R.sub.M<R.sub.Tx, interleaving and rate matching units for interleave said at least one mother code word to obtain an interleaved code word, and rate match said interleaved code word, to obtain a shortened code word having a code rate that is higher than the mother code rate R.sub.M, or rate matching and interleaving units for rate match said at least one mother code word to obtain an extended code word, and interleave said extended code word, having a code rate that is lower than the mother code rate R.sub.M; a modulator for modulating said shortened or extended code word to obtain modulated symbols; and a transmitter unit for transmitting a signal comprising said modulated symbols over a radio channel of the wireless communication system 10.

(41) A corresponding method in a transmitter device is shown in FIG. 14. The present method comprises the steps of receiving 100 at least one stream of information bits; encoding 110 said at least one stream of information bits using at least one error correction code to obtain at least one mother code word having a mother code rate R.sub.M; and if the mother code rate R.sub.M is smaller than a transmission code rate R.sub.Tx, interleaving said at least one mother code word to obtain an interleaved code word, and rate matching said interleaved code word, to obtain a shortened code word having a code rate that is higher than the mother code rate R.sub.M 121, if the mother code rate R.sub.M is not smaller than a transmission code rate R.sub.Tx associated with said at least one mother code word, rate matching said at least one mother code word to obtain an extended code word, and interleaving said extended code word, having a code rate that is lower than the mother code rate R.sub.M 122; modulating 130 said shortened or extended code word to obtain modulated symbols; transmitting 140 a signal comprising said modulated symbols over a radio channel of the wireless communication system 10.

(42) With reference to FIG. 13 the present receiver device 40 comprises a receiver 45 configured to receive a signal comprising modulated symbols associated with at least one shortened or extended code word having a code rate over a radio channel of the wireless communication system 10. The device 40 further comprises a processor 50 configured to demodulate said received signal. If the code rate is larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word, the processor 50 de-rate matches said demodulated signal to obtain a de-rate matched demodulated signal and de-interleaves said de-rate matched demodulated signal to obtain said mother code word. If the code rate is not larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word, the processor de-interleaves said demodulated signal to obtain a de-interleaved demodulated signal and de-rate matches said de-interleaved demodulated signal to obtain said mother code word. Said mother code word is finally decoded to obtain information bits associated with said mother code word.

(43) Such a receiver device is as mentioned shown in FIG. 13, in which the receiver 45 receives signals from a transmitter described above. Thereafter, the processor 50 processes signals from the receiver to obtain the information bits. Further, the receiver device 40 may (optionally) include an output unit for forwarding the obtained information bits. Mentioned units are shown in FIG. 13.

(44) Alternatively the receiver device 40 may comprise dedicated units for performing the present solution. That is, the receiver device 40 comprises in this case: a receiver for receiving a signal comprising modulated symbols associated with at least one shortened or extended code word having a code rate over a radio channel of the wireless communication system (10); a demodulator for demodulating said received signal; and a decision unit for deciding if the code rate is larger or not larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word; de-rate matcher and de-interleaver units for de-rate match said demodulated signal to obtain a de-rate matched demodulated signal and de-interleave said de-rate matched demodulated signal to obtain said mother code word if the code rate is larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word; de-interleaver and de-rate matcher units for de-interleave said demodulated signal to obtain a de-interleaved demodulated signal and de-rate match said de-interleaved demodulated signal to obtain said mother code word if the code rate is not larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word; and a decoder for decoding said mother code word to obtain information bits associated with said mother code word.

(45) A corresponding method in a receiver device is shown in FIG. 15. The method comprises the steps of receiving 200 a signal comprising modulated symbols associated with at least one shortened or extended code word having a transmission code rate R.sub.Tx over a radio channel of the wireless communication system 10; demodulating 210 said received signal; and if the code rate is larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word, de-rate matching said demodulated signal to obtain a de-rate matched demodulated signal and de-interleaving said de-rate matched demodulated signal to obtain said mother code word 221, if the code rate is not larger than a mother code rate R.sub.M of a mother code word for said shortened or extended code word, de-interleaving said demodulated signal to obtain a de-interleaved demodulated signal and de-rate matching said de-interleaved demodulated signal to obtain said mother code word 222; and decoding 230 said mother code word to obtain information bits associated with said mother code word.

(46) Assuming L is the size of information bits including possible CRC bits. The output of an error correction encoder (using e.g. convolutional code) prior to rate matching algorithm contains N parity streams each consisting of L bits.

(47) For transmission code rates higher than the mother code rate, parity streams are punctured following a predefined puncturing pattern to match the transmission code rate of the communication channel R.sub.Tx. For these coding rates when puncturing happens, if the interleaver is placed before rate matching unit, interleaving is performed over a vector of length NL. When the interleaver is placed after rate matching unit, interleaving is performed over a shorter vector of already punctured bits.

(48) In the first case, interleaved parity bits corresponding to the same codeword will be more evenly distributed and puncturing will not remove most or all of them away. This will lead to a better performance of communication system. When the code rate is higher, more bits are punctured and consequently the parity bits are more impacted. This can be related directly to the free distance of the punctured code which determines to large extend the number of errors that could be corrected and consequently the performance of the resulted code after puncturing and interleaving.

(49) The free distance is defined as the minimal hamming distance between different encoded sequences. The value of free distance and the multiplicity of it when code words with short error event are considered could be used as a measure to design the best set of encoder, rate matching and interleaver units. It is known that, a code with larger minimum distance and smaller multiplicity of minimum distance value has better correction capabilities and therefore could guarantee a better performance. Therefore, a larger free distance and a smaller multiplicity of free distance for coding rates higher than mother code rate when interleaving is performed prior to rate matching.

(50) Additionally, for very low code rates corresponding to very short block of information bits, if the interleaver is used prior to rate matching, the size of the burst might exceed the length of interleaver. Therefore, interleaver turns to be insufficient to break the burst of error. In this case using the interleaver after rate matching block could help the interleaver to perform on larger block size and it becomes easy to break the burst of errors. In this case, it is better to interleave the resulted repeated codeword rather than interleaving the short block of parity bits. Actually, the codeword size after rate matching is much larger and the burst errors could be distributed along the resulted codeword after the repetition. This behavior could also be predicted using the free distance of the code. In this case, we expect larger free distance for the case when interleaver is used after rate matching.

(51) The block diagram of an embodiment of transmitter and receiver is shown in FIG. 7 and FIG. 8 for the case where there is only one stream of information bit. The case with more streams of information bits is straightforward based on the explanation of FIG. 6.

(52) Further, the MDS bit-interleaver could be implemented as three different interleavers on each of the output parity streams or could be implemented as a single interleaver after concatenating three parity streams as shown in FIG. 7 which is obvious.

(53) In the embodiments in FIGS. 7 and 8 the interleaver and de-interleaver are of LDS matrix type. A clear advantage of this solution is the improvements obtained using simple rectangular interleavers. Moreover, the increase in complexity due to the using the pair of switched interleavers instead of one is small. However, it should be pointed out that the interleavers of rectangular type are one possible choice and that other types of interleavers might represent a good choice with the present solution.

(54) In FIG. 7, a stream of information bits is generated and then CRC is added to the stream of information bit by the CRC block. Information bits are sent into the Error correction coder block. The LDS Bit interleaver block performs interleaving if Switch 1 is open. If Switch 1 is closed, for the coding rates described in the present solution, interleaving is not performed. Afterwards the codeword is sent to the Rate matching block. If however Switch 2 is open then interleaving is performed after rate matching. If Switch 2 is closed based on the case explained in the disclosure interleaving in the stage is not performed. Afterwards bits are mapped to symbols when they are passed through the Modulation block. The LDS Tx block will perform spreading and concurrent transmission of information symbols.

(55) FIG. 8 shows the receiver corresponding to the transmitter described in FIG. 7. Received noisy signal is fed into the LDS BP-MUD block. Resulted soft bits after LDS BP-MUD are then feed into LDS de-interleaver if Switch 2 is open. If Switch 2 however is closed, following the coding rates explained in the text of the present disclosure, soft bits are not interleaved and passed directly through the next step which is inverse rate matching in the Inverse rate matching block. After inverse rate matching if Switch 1 is open then LDS de-interleaving is performed in the LDS De-interleaving block. If Switch 1 is closed, resulted soft bits after inverse rate matching are directly sent to the Error Correction decoder block. After decoding, CRC is performed to check if the transmitted bits are correctly received or not.

(56) Although the proposed solution according to this embodiment aims at counteracting the burst-error characteristic of LDS, using the proposed interleaving and rate matching scheme, improvements will also be observed in conventional transmission thanks to the increased free distance and decreased multiplicity of nearest neighbors.

(57) In general case, the rectangular structure of LDS bit interleaver could be a limitation in that it constrains the size of the codeword to be a multiple of certain factors (e.g. the number of columns of the interleaver matrix). If this happens, dummy bits could be added to the codeword to make the length of the code word an integer multiple of the number of columns of interleaver according to another embodiment.

(58) According to a preferred embodiment the LDS is further configured to apply column permutation on elements of interleaver matrices of the LDS matrix interleaver to break further the resulted burst of errors. In such a case, columns of the LDS matrix interleaver explained previously are permuted following a permutation pattern. The permutation pattern associates a new column index to each of the original column indexes. When de-interleaving, the inverse operation is performed to recollect the original column number using the permutation pattern that is common to transmitter or receiver. The permutation pattern can be dynamically or statically computed, or signaled.

(59) In the proposed scheme, depending on the code rate one could place interleaver before or after rate matching block. When the transmission coding rate is higher than mother code rate the interleaver acts prior to rate matching to guarantee that punctured parity bits corresponding to the same codeword are not all removed away. Contrary, for transmission coding rates lower than mother code rate and short information block size the interleaver acts after rate matching block to guarantee that the error burst is distributed evenly.

(60) There are two switches in this embodiments which are opened or closed as a function of the transmission code rate that are captured in FIG. 7 and FIG. 8. For transmission code rates higher than the mother code rate switch number one, shown as Switch 1, is open and switch number two, shown as Switch 2, is closed. Therefore, interleaving is performed prior to rate matching. For low transmission code rates, switch number one is closed and switch number two is open. Therefore, interleaving is acting after rate matching.

(61) Consequently, when e.g. the second interleaver is active in the transmitter an interleaving is performed after rate matching (switch two open) in transmitter, first de-interleaver is also active in the receiver and de-interleaving is performed prior to de-rate matching (switch two in receiver is open).

(62) As mentioned previously, an indication to the possible transmission rate that receiver can support is sent via CQI feedback from the receiver to transmitter. The transmitter based on this indication derive transmission code rate R.sub.Tx which is the code rate which is not necessarily equal to indicated code rate and is computed considering the number of data resource elements in transmission (removing resource elements related to pilots in the sub-frame). If it turns out that this transmission code rate is equal to the mother code rate, then there is no puncturing needed in the system. If puncturing is not used either both aforementioned schemes could be used knowing that the free distance of the interleaver followed by the puncturing unit or the inversely puncturing unit followed by interleaver will be the same resulting in the same performance. For example, one could interleave first before rate matching unit in the transmitter. In the receiver first de-rate matching and then interleaving is performed.

(63) FIG. 9, FIG. 10 and FIG. 11 illustrate the spectral efficiency of embodiments with LDS schemes using different type of interleavers. The comparison is carried out in terms of Spectral Efficiency (SE), defined as:

(64) SE = n m MR ( 1 - BLER )
where

(65) n m
is being the system overloading factor, M is the modulation order and BLER is the Block Error Rate. SE is measured in bits/sec/Hz. The overall coding rate is R=R.sub.CR.sub.CRC, where R.sub.C=S/T is the channel code rate and R.sub.CRC is the rate of the CRC code. S denotes the size of the information word including CRC bits and T is the number of coded bits. The BLER is estimated through Monte Carlo simulation for a range of Signal to Noise Ratio (SNR) values.

(66) The SNR flavor herein adopted is the ratio E.sub.b/N.sub.0 of the information bit energy to noise energy, where N.sub.0=2.sub.z.sup.2 is the two-sided power spectral density of noise. We choose for all our simulations the signature matrix with nm=1224 which corresponds to an overloading factor of

(67) n m = 2.

(68) Concerning the channel coding schemes, we considered one scheme specified in the 3GPP LTE standard. This scheme consists of a 64-state feed-forward binary convolutional code with rate and free distance d.sub.f=15. It is encoded using a constraint-length K=7 encoder with generators [133, 171, 165].sub.8. The code trellis is terminated using a tail-biting technique. For puncturing, we have used the circular buffer rate matching as per LTE standard which is described in the background.

(69) As specified in the LTE standard, a CRC check is attached to the information word before encoding to enable detection of residual decoding errors. In the case of convolutional coding, the CRC parity size is P.sub.CRC=16 bits. The resulting CRC code rate is

(70) R CRC = S - P CRC S

(71) The set of parameters used in simulations are shown in the following Table 1.

(72) TABLE-US-00001 TABLE 1 Simulation parameters Code rate Conv. code 1/10 S = 96, T = 960 4/10 S = 384, T = 960 8/10 S = 768, T = 960

(73) In all simulations, we perform the transmission of an information word of S bits on 240 time-frequency resource elements. Coded bits are modulated using quadrature phase-shift keying (QPSK) modulation thus, taking into account the overloading factor, we obtain a code word length of 960 coded bits. Additional set of parameters used in simulations are reported in Table 1.

(74) FIG. 9 shows the spectral efficiency for transmission code rate 0.4. It is shown that using an MDS interleaver before rate matching performs better compared to the case where MDS interleaver is used after rate matching. FIG. 10 shows spectral efficiency for transmission code rate 0.8. It is shown that having interleaver before rate matching has even a larger gain in this rate, as expected.

(75) In order to prove the observed behavior, we have computed the free distance of the encoder-rate matching-interleaver unit for the corresponding setups with different orders.

(76) In brief, a code word can be represented as a path in the trellis diagram (the correct path). An error event is a trellis path that diverges from the correct path at a certain discrete time instant t and re-merges into the correct path at another instant t+d. The length of the error event is d trellis steps. Assuming that the convolutional encoder has constraint length K and that the correct path is the all-zero path. The shortest error event has length K in the trellis. All code words with a single error event of length K are generated by the information words with Hamming weight 1: 1000000 . . . and all its circular shifts; The error event with length K+1 is generated by the information word 11000000 . . . and all its circular shifts; The error events with length K+2 are generated by the information words 101000000 . . . and 111000000 . . . and all their circular shifts; The error events with length K+3 are generated by the information words 10010000 . . . , 10110000 . . . , 11010000 . . . , 11110000 . . . and all their circular shifts; and so forth.

(77) Encoder-rate matching these information words and counting the Hamming weights of the corresponding code words gives the lower-order terms of the weight enumerating function, hence the free distance and its multiplicity. In order to compute the free distance we have considered a few lengths (K, K+1, K+2 and K+3).

(78) Free distance and the multiplicity of the free distance for these cases are shown in table 2.

(79) TABLE-US-00002 TABLE 2 Free distance and its multiplicity for different cases Interleaver before rate matching Interleaver after rate matching Rate d.sub.free multiplicity d.sub.free multiplicity 0.4 10 921 8 78 0.8 3 303 3 568

(80) It is shown in table 2 that for transmission code rate 0.4 using interleaver before rate matching gives a free distance larger than using interleaver after rate matching which is in line with the observed performance of the code in this rate. Indeed, the obtained performance is better when MDS interleaver is used before rate matching.

(81) For transmission code rate 0.8 when interleaving before or after rate matching we observe the same value of free distance but the multiplicity is lower when interleaver is used before rate matching. This shows that there is less number of nearest neighbors for this case and therefore a better performance could be expected. This is in line with the performance curve where we have a gain when we use MDS interleaver before rate matching unit.

(82) We can see from FIG. 11 and Table 1 that the low rate and the fixed codeword size lead to using a very short information word. As a consequence interleaver placed before rate matching unit proves insufficient for breaking up error burst and the performance is greatly impacted. In this case, it is desirable to have interleaver after rate matching unit.

(83) Table 3 summarizes computed free distances and its multiplicity. In this case, the free distance of the code is same for all the cases but the number of nearest neighbors when interleaving is used after rate matching is the smallest one which let us expect the best performance.

(84) TABLE-US-00003 TABLE 3 Free distance and its multiplicity for different cases Interleaver before rate matching Interleaver after rate matching Rate d.sub.free multiplicity d.sub.free multiplicity 0.1 48 88 48 41

(85) The present solution could be used with other type of error correction codes, such as turbo codes and convolutional codes. As explained in background information rate matching and interleaver units are present for other type of encoders. For example for the case of turbo code rate matching unit punctures parity bits resulted from turbo codes. After rate matching, systematic bits and parity bits are interleaved independently. Therefore, one could in similar way perform interleaving before or after rate matching based on the transmission code rate.

(86) However, in the case of turbo code computation of free distance is different due to the internal feedback and internal interleaver. This will not prevent the fact that the interleaver and rate matching unit could be switched with different coding rates as explained for the case of convolutional code.

(87) The present solution might be additionally used for all the cases where spreading is used in the transmitter such as conventional CDMA, MC-CDMA, and HSDPA.

(88) The present solution might further be an integrated part of MIMO transmissions. Actually in multi-user MIMO (MU-MIMO) transmission different users or different data streams are linearly combined together in the spatial domain using specific transmit precoders. This is similar to LDS where different streams are linearly combined using LDS transmitter, with LDS transmitter acting on code domain. Therefore, the function and the structure of MU-MIMO transmission is similar to the one of LDS precoder. Consequently the disclosure is valid and well suited for MU-MIMO set up.

(89) More importantly, using LTE interleaver after rate matching unit could potentially increase the system spectral efficiency.

(90) Furthermore, any method according to the present solution may be implemented in a computer program, having code means, which when run by processing means causes the processing means to execute the steps of the method. The computer program is included in a computer readable medium of a computer program product. The computer readable medium may comprise of essentially any memory, such as a ROM, a PROM, an EPROM, a Flash memory, an EEPROM, or a hard disk drive.

(91) Moreover, it is realized by the skilled person that the present devices (transmitter and receiver) comprise the necessary communication capabilities in the form of e.g., functions, means, units, elements, etc., for performing the present solution. Examples of other such means, units, elements and functions are processors, memory, control logic, encoders, decoders, mapping units, multipliers, decision units, selecting units, switches, interleavers, de-interleavers, modulators, demodulators, inputs, outputs, antennas, amplifiers, receiving (RX) unit, transmitting (TX) unit, digital signal processors (DSPs), Maximum Distance Separable (MDS) bit interleaver, trellis-coded modulation (TCM) encoder, TCM decoder, interfaces, communication protocols, etc. which are suitably arranged together.

(92) Especially, the processors of the present devices may comprise, e.g., one or more instances of a Central Processing Unit (CPU), a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC), a microprocessor, or other processing logic that may interpret and execute instructions. The expression processor may thus represent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones mentioned above. The processing circuitry may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions, such as call processing control, user interface control, or the like.

(93) Finally, it should be understood that the present disclosure is not limited to the embodiments described above, but also relates to and incorporates all embodiments within the scope of the appended independent claims.