UNITY GAIN BUFFER WITH TWO STATES

Abstract

A unity gain buffer provides an ON state in which the input signal is coupled to the output terminal and an OFF state in which the input signal is isolated from the output terminal. Multiple unity gain buffers may share the same load to form a voltage-mode maximum follower or a multiplexer.

Claims

1. A multi-channel light detecting and ranging (LIDAR) system having a plurality of signal channels each receiving an input signal from a corresponding light sensor, the signal channel comprising: a pre-amplifier receiving the input signal and providing an amplified signal ; and a 2-state unity gain buffer receiving the amplified signal from the pre-amplifier and providing an output signal on an output terminal, wherein the output terminals of the signal channels are tied together such that the 2-state unity gain buffers of the signal channels form a maximum voltage follower circuit.

2. The LIDAR system of claim 1, wherein each signal channel comprises a trans-impedance amplifier.

3. The LIDAR system of claim 1, wherein each 2-state unity gain buffer comprises: a differential amplifier having a non-inverting input terminal and an inverting input terminal and an output terminal; a transistor having a first terminal, a second terminal and a control terminal, wherein (a) the first terminal of the transistor is coupled to a power supply voltage reference and (b) the control terminal is coupled to the output terminal of the differential amplifier; and a diode matrix having a first terminal, a second terminal and a third terminal, wherein (a) the first terminal of the diode matrix is coupled to the inverting input terminal of the differential amplifier, (b) the second terminal of the diode matrix is coupled to the second terminal of the transistor and (c) the third terminal of the diode matrix is coupled to the output terminal of the 2-state unity gain buffer.

4. The LIDAR system of claim 3, wherein each 2-state unity gain buffer is configured such that (a) when the 2-state unity gain buffer is in a first state, the first and the second terminals of the diode matrix have a voltage difference that substantially equals a voltage drop across a conducting diode, and (b) when the 2-state unity gain buffer is in a second state, the first and the second terminals of the diode matrix have substantially the same voltage.

5. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, a diode connects the first and second terminals of the diode matrix in the 2-state unity gain buffer.

6. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, a diode connects the third terminal of the diode matrix to each of the first and second terminals of the diode matrix.

7. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, a current source is coupled between the power supply voltage reference and the first terminal of the diode matrix.

8. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, a current source is coupled between the second terminal of the transistor and the ground reference.

9. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, a current source is coupled between the ground voltage reference and the third terminal of the diode matrix.

10. The LIDAR system of claim 3 wherein, in each 2-state unity gain buffer, the transistor comprises a bipolar transistor.

11. A voltage-mode maximum voltage follower circuit having a plurality of input terminals and an output terminal, comprising a plurality of 2-state unity gain buffers each having an input terminal and an output terminal, wherein the input terminal of each 2-state unity gain buffer is coupled to a corresponding one of the input terminals of the voltage-mode maximum voltage follower circuit and wherein the output terminal of each 2-state unity gain buffer is coupled to the output terminal of the voltage-mode maximum voltage follower circuit, the 2-state unity gain buffers being coupled between a power supply voltage reference and a ground voltage reference, each 2-state unity gain buffer comprising: a differential amplifier having a non-inverting input terminal and an inverting input terminal and an output terminal; a transistor having a first terminal, a second terminal and a control terminal, wherein (a) the first terminal of the transistor is coupled to the power supply voltage reference and (b) the control terminal is coupled to the output terminal of the differential amplifier; and a diode matrix having a first terminal, a second terminal and a third terminal, wherein (a) the first terminal of the diode matrix is coupled to the inverting input terminal of the differential amplifier, (b) the second terminal of the diode matrix is coupled to the second terminal of the transistor and (c) the third terminal of the diode matrix is coupled to output terminal of the 2-state unity gain buffer.

12. The voltage-mode maximum voltage follower circuit of claim 11, wherein each 2-state unity gain buffer is configured such that (a) when the 2-state unity gain buffer is in a first state, the first and the second terminals of the diode matrix have a voltage difference that substantially equals a voltage drop across a conducting diode, and (b) when the 2-state unity gain buffer is in a second state, the first and the second terminals of the diode matrix have substantially the same voltage.

13. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, a diode connects the first and second terminals of the diode matrix in the 2-state unity gain buffer.

14. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, a diode connects the third terminal of the diode matrix to each of the first and second terminals of the diode matrix.

15. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, a current source is coupled between the power supply voltage reference and the first terminal of the diode matrix.

16. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, a current source is coupled between the second terminal of the transistor and the ground reference.

17. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, a current source is coupled between the ground voltage reference and the third terminal of the diode matrix.

18. The voltage-mode maximum voltage follower circuit of claim 12 wherein, in each 2-state unity gain buffer, the transistor comprises a bipolar transistor.

19. A 2-state unity gain buffer having an input terminal and an output terminal, and being coupled between a power supply voltage reference and a ground voltage reference, the 2-state unity gain buffer comprising: a differential amplifier having a non-inverting input terminal and an inverting input terminal and an output terminal; a transistor having a first terminal, a second terminal and a control terminal, wherein (a) the first terminal of the transistor is coupled to the power supply voltage reference and (b) the control terminal is coupled to the output terminal of the differential amplifier; and a diode matrix having a first terminal, a second terminal and a third terminal, wherein (a) the first terminal of the diode matrix is coupled to the inverting input terminal of the differential amplifier, (b) the second terminal of the diode matrix is coupled to the second terminal of the transistor and (c) the third terminal of the diode matrix is coupled to output terminal of the 2-state unity gain buffer.

20. The 2-state unity gain buffer of claim 19, configured such that (a) when the 2-state unity gain buffer is in a first state, the first and the second terminals of the diode matrix have a voltage difference that substantially equals a voltage drop across a conducting diode, and (b) when the 2-state unity gain buffer is in a second state, the first and the second terminals of the diode matrix have substantially the same voltage.

21. The 2-state unity gain buffer of claim 20, wherein a diode connects the first and second terminals of the diode matrix.

22. The 2-state unity gain buffer of claim 20, wherein a diode connects the third terminal of the diode matrix to each of the first and second terminals of the diode matrix.

23. The 2-state unity gain buffer of claim 19, wherein a current source is coupled between the power supply voltage reference and the first terminal of the diode matrix.

24. The 2-state unity gain buffer of claim 19, wherein a current source is coupled between the second terminal of the transistor and the ground reference.

25. The 2-state unity gain buffer of claim 19, wherein a current source is coupled between the ground voltage reference and the third terminal of the diode matrix.

26. The 2-state unity gain buffer of claim 19, wherein the transistor comprises a bipolar transistor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1(a) shows conventional TIA 100, which consists of a preamplifier 101 and single-ended output buffer 102, receiving an input signal through a 2:1 selector or multiplexer 103.

[0016] FIG. 1(b) shows switch 112 multiplexing the output signals of conventional TIAs 110 and 111.

[0017] FIG. 2(a) shows conventional voltage-mode maximum follower circuit 200.

[0018] FIG. 2(b) shows conventional unity gain buffer 250.

[0019] FIG. 3(a) illustrates one unsuccessful attempt to build a voltage-mode maximum follower 300 using unity gain buffers 301 and 302 sharing output node 303.

[0020] FIG. 3(b) is a block diagram showing TIAs 351 and 352 sharing output terminal 353, in accordance with one embodiment of the present invention.

[0021] FIG. 4 shows 2-state unity gain buffer 400 which can be used to construct a voltage-mode maximum follower circuit or an output multiplexer circuit, according to one embodiment of the present invention.

[0022] FIG. 5 shows equivalent circuit 420 for 2-state unity gain buffer 400 operating in the ON state, in accordance with one embodiment of the present invention.

[0023] FIG. 6 shows equivalent circuit 450 for 2-state unity gain buffer 400 operating in the OFF state, in accordance with one embodiment of the present invention.

[0024] FIG. 7(a) shows voltage-maximum follower circuit 700 that includes 2-state unity gain buffers 701 and 702, in accordance with one embodiment of the present invention.

[0025] FIG. 7(b) shows equivalent circuit 750 of voltage-maximum follower circuit 700 when 2-state unity gain buffer 701 is in the ON state, and 2-state unity gain buffer 702 is in the OFF state, in accordance with one embodiment of the present invention.

[0026] To simplify the detailed description and to facilitate cross-reference among the figures, like elements in the figures are assigned like reference numerals.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] The present invention provides a TIA with a single-ended output signal driven by a unity gain buffer with two states that can be combined with the output signals of other such TIAs at a common output terminal without additional components. Such TIAs may be used to construct multiplexed TIAs suitable for use in multi-channel LIDAR receivers.

[0028] FIG. 3(b) is a block diagram showing TIAs 351 and 352 sharing output terminal 353, in accordance with one embodiment of the present invention. In FIG. 3(b), when unity gain buffer 361 of TIA 351 is enabled, the input signal at terminal in1 is coupled to output terminal 353, while the unity gain buffer 362 of TIA 352 is disabled, so that the input signal at terminal in2 is isolated from common output terminal 353. Unity gain buffers 361 and 362 of the present invention, unlike prior art unity gain buffers, each operate in one of two states at any given time. In one state, the unity gain buffer provides an output signal at common node 353. In the other state, the unity gain buffer is in a substantially high-impedance state.

[0029] The 2-state unity gain buffer of the present invention includes current steering diodes that offer better isolation and faster switching speeds than can be provided by additional switches in the signal paths. N instances of the TIAs of the present invention may be combined to form an N:1 multiplexer without additional components in the signal path, while maintaining low-noise and high bandwidth. Using the TIAs of the present invention, a multi-channel LIDAR receiver can address board, power, and cost constraints. The TIAs of the present invention in such a multi-channel LIDAR receiver may be provided on separate integrated circuits or on the same integrated circuit. Integrating multiple TIAs of the present invention in a multi-channel LIDAR receiver achieves low per-channel power and provides programmable or variable gains to optimize the dynamic range.

[0030] FIG. 4 shows 2-state unity gain buffer 400 which can be used to construct a voltage-mode maximum follower circuit or an output multiplexer circuit, according to one embodiment of the present invention. As shown in FIG. 4, 2-state unity gain buffer 400 includes differential amplifier A0, bipolar transistor Q0, diodes D.sub.1, D.sub.2 and D.sub.3, forming a diode matrix, and current sources 402, 403 and 404, providing currents I.sub.2, I.sub.0 and I.sub.1, respectively. 2-state unity gain buffer 400 operates in two distinct states: ON and OFF.

[0031] In the ON state, diode D.sub.3 is not conducting, such that the inverting input terminal of differential amplifier A0 and the emitter terminal of transistor Q0 are both coupled by diodes D2 and D1 to output terminal 405. FIG. 5 shows equivalent circuit 420 for unity gain buffer 400 operating in the ON state, in accordance with one embodiment of the present invention. In this configuration, the currents flowing out of the emitter terminal of transistor Q0 and the currents in diodes D.sub.1 and D.sub.2 are I.sub.0+I.sub.1I.sub.2 and I.sub.2, respectively. In this configuration, the inverting terminal of differential amplifier A0 and the emitter terminal of transistor Q0 are substantially equal.

[0032] In the OFF state, however, diode D.sub.3 is conducting, steering the currents in current source 402 and transistor Q0 away from output terminal 405. FIG. 6 shows equivalent circuit 450 for 2-state unity gain buffer 400 operating in the OFF state, in accordance with one embodiment of the present invention. In this configuration, the current flowing out of bipolar transistor Q0 and the current in diode D3 are I.sub.1I.sub.2 and I.sub.2, respectively.

[0033] Table 1 summarizes the transistor and diode currents in the ON and OFF states:

TABLE-US-00001 STATE Q0 D.sub.1 D.sub.2 D.sub.3 ON I.sub.0 + I.sub.1 I.sub.2, I.sub.0 I.sub.2 I.sub.2 0 OFF I.sub.1 I.sub.2 0 0 I.sub.2

[0034] FIG. 7(a) shows voltage-maximum follower circuit 700 that includes 2-state unity gain buffers 701 and 702, in accordance with one embodiment of the present invention. As shown in FIG. 7(a), the output terminals of 2-state unity gain buffers 701 and 702 are connected at common node 705. FIG. 7(a) also shows exemplary input voltages 1.8 volts and 1.4 volts being applied to 2-state unity gain buffers 701and 702, respectively. Assuming that the voltage drop across a conducting diode to be approximately, 0.8 volts, exemplary voltages are also labeled in FIG. 7(a) for the base terminals of bipolar transistors Q01 and Q02 and at the input and output terminals of diodes D.sub.11, D.sub.21 and D.sub.31 and D.sub.12, D.sub.22 and D.sub.32 in the respective 2-state unity gain buffers 701 and 702. Thus, FIG. 7(a) shows that 2-state unity gain buffer 701 is in the ON state and 2-state unity gain buffer 702 is in the OFF state. In each 2-state unity gain buffer, the respective differential amplifiers A01 and A02 remain coupled to their respective bipolar transistors Q01 and Q02, such that the voltages at the respective emitter output terminals follow their respective input voltages rapidly, thereby allowing fast transitions in each 2-state unity gain buffer between the ON and the OFF states. To minimize the offset across the input and output terminals in a 2-state unity gain buffer in the ON state, the current sources in the 2-state unity gain buffer may be programmed to maintain the same current density in the emitter current of the bipolar transistor.

[0035] FIG. 7(b) shows equivalent circuit 750 of voltage-maximum follower circuit 700 when 2-state unity gain buffer 701 is in the ON state, and 2-state unity gain buffer 702 is in the OFF state, in accordance with one embodiment of the present invention.

[0036] Although demonstrated only for two 2-state unity gain buffers in FIG. 7(a), a voltage-mode maximum voltage follower circuit of the present invention may include any number of 2-state unity gain buffers, with their respective diode matrices sharing a common output terminal, while maintaining a maximum frequency response.

[0037] Thus, the present invention enables a low-cost LIDAR system, as the 2-state unity gain buffer makes possible tying together the output terminals of multiple channels without using additional switches in the signal path and without compromising the performance (e.g., bandwidth performance) achieved in the TIAs that provide the input signals to the 2-state unity gain buffers.

[0038] The above detailed description is provided to illustrate specific embodiments of the present invention and is not intended to be limiting. Numerous variations and modifications within the scope of the present invention are possible. The present invention is set forth in the accompanying claims.