Methods and devices for solid state nanowire devices
11502219 · 2022-11-15
Assignee
Inventors
Cpc classification
H01L33/06
ELECTRICITY
International classification
H01L29/06
ELECTRICITY
H01L33/06
ELECTRICITY
Abstract
Solid state sources offers potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages, however, have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell the inventors have demonstrated core-shell dot-in-a-wire LEDs, with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98. Additionally, the inventors demonstrate efficient UV nanowire LEDs for medical applications as well as the non-degraded growth of nanowire LEDs on amorphous substrates.
Claims
1. A device, comprising: a substrate; a plurality of nanowires comprising at least a first nanowire and a second nanowire, each nanowire of the plurality of nanowires having a first end in contact with the substrate and a second end opposite the first end, said each nanowire comprising a lower semiconductor portion, an upper semiconductor portion, and a central semiconductor portion disposed between the lower semiconductor portion and the upper semiconductor portion, the lower semiconductor portion comprising an n-type dopant, the central semiconductor portion including a plurality of quantum structures and a plurality of barrier layers, wherein the central semiconductor portion comprises a quantum structure between two barrier layers and a barrier layer between two quantum structures such that the plurality of quantum structures and the plurality of barrier layers are interspersed in an alternating fashion in the central semiconductor portion, and wherein the upper semiconductor portion comprises a p-type dopant; and a respective shell comprising a semiconductor and coupled to a periphery of said each nanowire of the plurality of nanowires such that the respective shell encompasses peripheries of the lower semiconductor portion, the central semiconductor portion, and the upper semiconductor portion, wherein each said respective shell has a thickness that increases with an increasing distance from the first end of said each nanowire and is thicker at the second end of said each nanowire than at the first end of said each nanowire, wherein the plurality of nanowires comprises at least the first nanowire and the second nanowire, and wherein the upper semiconductor portion of the first nanowire is separated from the upper semiconductor portion of the second nanowire by the semiconductor shell of the first nanowire and the semiconductor shell of the second nanowire.
2. The device of claim 1, wherein the lower and upper semiconductor portions, the quantum structures, and the barrier layers of said each nanowire comprise gallium nitride, and wherein said each respective shell comprises aluminum gallium nitride.
3. The device of claim 1, wherein each quantum structure of the plurality of quantum structures includes one of a quantum dot and a quantum well.
4. The device of claim 1, wherein the device is part of a solid state white light optical source.
5. The device of claim 1, wherein the lower and upper semiconductor portions of said each nanowire comprise wurtzite semiconductors.
6. The device of claim 1, wherein the lower and upper semiconductor portions, each said respective shell, and the plurality of quantum structures of said each nanowire comprise a same group III element and a same group V element.
7. The device of claim 1, wherein the plurality of quantum structures are modulation doped.
8. The device of claim 1, wherein the lower and upper semiconductor portions of said each nanowire comprise binary semiconductors; and wherein each said respective shell comprises a ternary semiconductor.
9. The device of claim 1, further comprising an electron blocking layer incorporated in the central semiconductor portion of said each nanowire.
10. The device of claim 1, wherein the upper semiconductor portion of said each nanowire has a first end adjacent the central semiconductor portion, and also has an opposite, second end in contact with an electrical conductor.
11. The device of claim 1, wherein the lower semiconductor portion of said each nanowire has a first end adjacent the central semiconductor portion, and also has an opposite, second end directly in contact with the substrate.
12. The device of claim 1, further comprising a layer of polyimide adjacent to each said respective shell, the layer of polyimide extending from the substrate to the upper semiconductor portion.
13. The device of claim 1, wherein the respective shell of said each nanowire is in contact with the substrate and extends from the substrate to the second end of said each nanowire.
14. The device of claim 1, wherein side surfaces of the lower semiconductor portion and side surfaces of the central semiconductor portion are surrounded by the respective shell of each said nanowire.
15. The device of claim 1, wherein the upper semiconductor portion of the first nanowire is also separated from the upper semiconductor portion of the second nanowire by a polyimide layer.
16. The device of claim 1, wherein each said respective shell has a bandgap that is larger than a bandgap of the lower semiconductor portion and that is larger than a bandgap of the upper semiconductor portion.
17. The device of claim 1, wherein the upper semiconductor portion of the first nanowire and the upper semiconductor portion of the second nanowire are in contact with a metal contact.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Embodiments of the present invention will now be described, by way of example only, with reference to the attached Figures, wherein:
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DETAILED DESCRIPTION
(37) The present invention is directed to semiconductor nanowire devices and more specifically to quantum dot nanowire solid state optical emitters.
(38) The ensuing description provides exemplary embodiment(s) only, and is not intended to limit the scope, applicability or configuration of the disclosure. Rather, the ensuing description of the exemplary embodiment(s) will provide those skilled in the art with an enabling description for implementing an exemplary embodiment. It being understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope as set forth in the appended claims.
(39) Within the experiments reported below for devices the inventors have exploited vertically aligned InGaN/GaN dot-in-a-wire LED heterostructures grown on Si(111) substrates by radio-frequency plasma-assisted molecular beam epitaxy under nitrogen-rich conditions. Descriptions of such structures can be found for example within US Patent Application 2011/0,127,490 entitled “Method of Growing Uniform Semiconductor Nanowires without Foreign Metal Catalyst and Devices Therefrom” and US Patent Application 2012/0,205,613 entitled “High Efficiency Broadband Semiconductor Nanowire Devices and Methods of Fabricating without Foreign Catalyst”, both by the inventors, the contents of which are included in their entirety by this reference.
(40) A. Core-Shell Dot-in-a-Wire Light Emitters
(41) Referring to
(42) B. Visible Wavelength Core-Shell Dot-in-a-Wire Light Emitters
(43) B1: Visible Core-Shell Dot-in-Wire Fabrication:
(44) These vertically aligned InGaN/GaN dot-in-a-wire heterostructures were grown on n-Si(111) substrates using a molecular beam epitaxy system equipped with a radio-frequency plasma-assisted nitrogen source under nitrogen rich condition without the use of any external catalyst, see US Patent Applications 2011/0,127,490 and 2012/0,205,613 by the inventors. Prior to growth of the LEDs, the oxide on the silicon substrate surface was removed in situ at ˜770° C. During the growth sequence, nitrogen flow rate was kept at 1.0 sccm, with a forward plasma power of ˜350 W. The LED device heterostructure being predominantly grown at ˜750° C., whilst the InGaN/GaN quantum dots were grown at relatively low temperatures of 570-630° C. Each InGaN/GaN dot consists of ˜3 nm InGaN separated by ˜3 nm GaN barrier layers. Each quantum dot layer is also modulation doped p-type using Mg to enhance the hole transport. After the GaN:Mg top section was grown, a thick layer of AlGaN of ˜80 nm was grown for the formation of the shell surrounding the InGaN/GaN core. Accordingly, InGaN/GaN/AlGaN core-shell dot-in-a-wire LED structures according to embodiments of the invention include the InGaN/GaN dot-in-a-wire core region and an AlxGal-xN shell layer. The formation of AlGaN shell is directly related to the diffusion-controlled growth mechanism. The thickness and Al content of AlGaN shell can be well controlled by the growth duration in combination with the Al and Ga deposition rates, respectively. For comparison, the growth conditions for the core-region of the InGaN/GaN/AlGaN core-shell dot-in-a-wire LED heterostructures according to embodiments of the invention were kept the same as that of InGaN/GaN dot-in-a-wire LED without shell. It would be evident to one skilled in the art that the AlGaN shell may be incorporated within the nanowire LED growth at various stages.
(45) B2: Core-Shell Dot-in-a-Wire Device Fabrication:
(46) Once fabricated the InGaN/GaN/AlGaN core-shell dot-in-a-wire nanowires were spin-coated with polyimide resist for surface planarization, followed by an oxygen plasma dry etching process to reveal the top sections of the dot-in-a-wire heterostructures. The thick AlGaN layer on the top of nanowires was completely removed by an Al.sub.2Br.sub.2 dry etching process. Next Ni(5 nm)/Au(5 nm)/indium tin oxide (ITO) and Ti/Au layers were deposited on the exposed wire surface and backside of the Si substrate respectively to form the p- and n-metal contacts, respectively. The fabricated devices with Ni/Au and Ti/Au metal contacts were first annealed at ˜500° C. for 1 minute in nitrogen ambient. Upon the deposition of the ITO transparent contact, a second annealing step was performed at 300° C. in vacuum for ˜1 hour. Multiple metal grid patterns was deposited on the device surface to facilitate the hole transport and injection processes.
(47) B3: Core-Shell Dot-in-a-Wire Structural Analysis:
(48) Structural properties of InGaN/GaN/AlGaN dot-in-a-wire core-shell heterostructures according to embodiments of the invention were performed by scanning transmission electron microscopy (STEM) and energy dispersive x-ray spectrometry (EDXS) analysis. Referring to
(49) Now referring to
(50) Photoluminescence (PL) emission characteristics of the core-shell dot-in-a-wire LED structures according to embodiments of the invention were measured using 405 nm laser excitation at room-temperature. These results are presented in
(51) In order to study the effect of AlGaN shell on the LED performance, the inventors engineered the AlGaN shell layers by varying its thickness and Al content. The Al content and the thickness of AlGaN shell can be controlled by adjusting the aluminum cell temperature and the AlGaN growth duration, respectively. Samples MN728, MN798, and MN799 were grown at the same substrate temperature and Al cell temperature (980° C.). To vary the AlGaN shell thickness, the growth durations were 40, 60, and 80 minutes respectively for samples MN728, MN799, and MN798. Sample MN797 was grown with an increased Al cell temperature of 1000° C. for 40 min. As evident from
(52) Within the prior art the presence of unoccupied Ga dangling bonds and/or large densities of surface defects along the nonpolar GaN(11 □00) surface (m-plane) has been identified within nanowires which can lead to a Fermi-level pinning on the nanowire lateral surfaces, see for example Van de Walle et al in “Microscopic origins of surface states on nitride surfaces” (J. App. Phys., Vol. 101, p. 6) and Bertelli et al in “Atomic and electronic structure of the nonpolar GaN(1(1)over-bar00) surface” (Phys. Rev. B, Vol. 80, p. 115324). The inventors have studied the roles that these surface states/defects on the operation of nanowire LEDs through simulations, using the program APSYS which provides Advanced Physical Models of Semiconductor Devices based on 2D/3D finite element analysis. One important parameter in the simulation is the surface recombination velocity, which is directly related to the density of surface states. Simulations by the inventors have employed values in the range of ˜10.sup.3 v 10.sup.5 cm/s, see Shen et al in “Auger recombination in InGaN measured by photoluminescence” (App. Phys. Lett., Vol. 91, p. 141101) and Rozhansky. Accordingly, the inventors have analysed the calculated electrical injection efficiency for nanowire LEDs with different surface recombination velocities.
(53) From these simulations the inventor have found that the electrical injection efficiency is extremely low (<10%) for nanowires with relatively high surface recombination velocity (>10.sup.4 cm/s). Such low carrier injection efficiency is largely responsible for the extremely low output power commonly measured in nanowire LEDs. However, within core-shell dot-in-a-wire LED structures according to embodiments of the invention, the AlGaN shell passivation effectively prevents native oxide from forming on the nanowire surface. It can further reduce the density of mid-gap surface states, see Bessolov et al in “Chalcogenide passivation of III-V semiconductor surfaces” (Semiconductors, Vol. 32, pp. 1141-1156), and surface traps and therefore lead to reduced surface non-radiative recombination, see for example Chevtchenko et al in “Study of SiN[sub x] and SiO[sub 2] passivation of GaN surfaces” (J. App. Phys., Vol. 101, p. 113709), Boroditsky et al in “Surface recombination measurements on III-V candidate materials for nanostructure light-emitting diodes” (J. App. Phys., Vol. 87, pp. 3497-3504), Chen et al in “Photoluminescence enhancement of (NH4)2Sx passivated InP surface by rapid thermal annealing” (App. Surf. Sci., Vol. 100-101, pp. 592-595), and Tajik et al in “Photoluminescence model of sulfur passivated p-InP nanowires” (Nanotech., Vol. 23, p. 315703). Accordingly, the inventors have established that the electrical injection efficiency can be substantially improved such that an injection efficiency of >80% can be achieved for surface recombination velocities of <10.sup.3 cm/s.
(54) B4: Visible Core-Shell Dot-in-Wire Light Emitting Diode Optical Performance.
(55) As discussed supra the InGaN/GaN/AlGaN core-shell dot-in-a-wire nanowire device fabrication process according to embodiments of the invention include surface passivation by spin-coating polyimide, reactive ion etching, photolithography, and metallization processes. Further, the AlGaN capping layer on top of nanowires was completely removed by a dry etching process before the depositing top-metal contacts. Whilst the AlGaN shell was only approximately 8 nm thick on the sidewalls of the fabricated nanowires this may be increased through control of the nanowire fabrication process through nanowire placement and controlled density together with deposition processing conditions rather than the very high nanowire density employed in these experiments. However, as evident from the experimental results presented below in respect of
(56) During initial testing of core-shell dot-in-a-wire LED devices according to embodiments of the invention in order to minimize junction heating effect the devices were first measured under pulsed biasing conditions. An example of the measured output spectra under various injection currents are shown in
(57) Significantly, these devices exhibit relatively high output power. As evident from
(58) Importantly, the colour rendering index of the dot-in-a-wire core-shell dot-in-a-wire LED s according to embodiments of the invention can be engineered by varying the dot emission properties at the wafer-level during manufacturing. With prior art phosphor-based LED lamps these generally exhibit a relatively low colour rendering index (CRI), typically CRI<85, and there is often a trade-off between the luminous efficacy and the colour rendering quality of the LED light source. The CRI is a quantitative measure of the ability of a light source to reproduce the colors of various objects faithfully in comparison with an ideal or natural light source. Further, the CRI of conventional white LED lamps varies over time, primarily due to the instability of the phosphor coating employed. However, the inventors have, by optimizing the In content within the InGaN/GaN quantum dot active region, achieved CRI values in the range of 90 to 98, which is believed to be the highest achieved to date for any LED lamp.
(59) Referring to
(60) Accordingly, the inventors have shown that poor electrical injection efficiency, due to the presence of surface states/defects, represents one of the major bottlenecks for achieving high efficiency and high power nanowire LED lamps. Exploiting dot-in-a-wire core-shell based LED structures according to embodiments of the invention the inventors have demonstrated devices that largely address this critical issue. Devices according to embodiments of the invention exhibit relatively high output power (>1.5 mW) at room temperature, which can be further improved by optimizing the light extraction efficiency. Moreover, the phosphor-free core-shell dot-in-a-wire nanowire white LEDs can exhibit unprecedentedly high colour rendering index, compared to prior art phosphor-based LED lighting technology.
(61) C: Selective Core-Shell Dot-in-Wire Placement And Activation
(62) Within the descriptions supra in respect of
(63) Referring to
(64) The resulting thin, approximately 3 nm, InGaN barrier layers can enhance the hole injection and transport in the quantum dot active region, thereby leading to more uniform hole distribution, reduced electron leakage, and enhanced internal quantum efficiency at relatively high current levels. Optionally, to further enhance the hole transport the structure is modulation doped p-type, which is achieved by incorporating Mg in part of the GaN barrier layer, with the Mg effusion cell temperature at approximately 150° C. to approximately 200° C. This technique of modulation p-doping being shown by the inventors to reduce deleterious effects associated with the direct Mg incorporation in the quantum dots. As a consequence, no degradation in the optical properties of the p-doped dot-in-a-wire heterostructures was measured, compared to the undoped LED device heterostructures.
(65) During the device fabrication process, the InGaN/GaN nanowire arrays were first planarized using a polyimide 890 resist layer by spin-coating, which was followed by an appropriate dry etching process to reveal the top GaN:Mg 850 sections of the dot-in-a-wire heterostructures. The p-metal and n-metal contacts, consisting of Ni (approximately 5 nm)/Au (approximately 7 nm)/indium tin oxide (ITO) 860 and Ti/Au 810 layers, were then deposited on the exposed wire surface and the backside of the Si substrate 820, respectively. The fabricated devices with Ni/Au 860 and Ti/Au 810 metal contacts were first annealed at approximately 500° C. for 1 minute in nitrogen ambient. Upon deposition of the ITO transparent contact, a second annealing step was performed at approximately 300° C. in vacuum for approximately 1 hour. It would be evident that patterning of the electrical contacts provides for selective activation of regions of the core-shell dot-in-a-wire light source.
(66) D. Ultraviolet Core-Shell Dot-in-a-Wire Light Emitters
(67) Within the preceding Section B the focus was to visible LEDs exploiting InGaN/GaN/AlGaN core-shell dot-in-a-wire LED heterostructures to provide phosphor-free InGaN/GaN nanowire white LEDs according to embodiments of the invention. However, by varying the Al composition, the emission from Al.sub.xGa.sub.1-xN ternary alloys can cover the entire ultraviolet UV A-C range, namely from approximately 100 nm to approximately 400 nm. UV optoelectronic devices offer enormous potential within applications for biosensors and medical devices. For example, efficient, spectrally pure UV emission at 340 nm is important for the optical determination of the reduced nicotinamide adenine dinucleotide (NADH), a key constituent molecule found in all living cells, that has a strong absorbance at 340 nm and a fluorescence emission peak at approximately 460 nm, see for example Davitt et al (Opt. Express, Vol. 13, pp. 9548-9555), Xu et al (J. Phys. D: Appl. Phys. 41 094013), and Peng et al (Appl. Phys. Lett. 85, pp. 1436-1438). Accordingly, a compact efficient 340 nm optoelectronic excitation source is desired to be integrated into a nanobiosensor for disease diagnosis via NADH fluorescence testing, see for example Mayevsky et al (Am. J. Physiol., 292, C615-40) and Koo et al (Nanobiosens. Dis. Diag., 1, 5-15). In addition, a biocompatible implantable UV light source represents one of the key components of future medical devices to optically control neurons and/or to perform photolysis of photolabile caged compounds such as neurotransmitters, nucleotides, Ca2+ chelators, y-aminobutyric acid (GABA) and fluorescent dyes, see for example Miller (Science, 314, pp. 1674-16766) and Rothman et al (Epilepsy Res., 74, pp. 201-209). In most of these applications UV emission below 340 nm is normally not desirable, as it leads to concerns about deep UV light induced toxicity, see for example Rothman, Chang et al (J. Physiol., 524, pp. 365-274), and Leskiewicz et al (J. Physiol., 536, pp. 471-478). Accordingly, it would be beneficial to provide compact UV LEDs for such applications.
(68) As noted supra nanowire LEDs can offer high efficiency and provide flexible device sizes ranging from a single nanowire to a nanowire array. Moreover, nanowires can act as direct waveguides and lead to high efficiency light emission without sophisticated packaging and extra optical elements. Within the prior art nanowire UV LEDs generally involve the use of ZnO, or ZnO/GaN heterostructures, see for example Zhang et al (Adv. Mater., 21, pp. 2767-2770) and Bie et al (Adv. Mater., 22, pp. 4284-4287). However, these exhibit a very high operation voltage, an unacceptably large resistance (1000 Ω or larger), and an uncontrolled emission wavelength, due to the unstable p-type ZnO, the lack of carrier confinement, and the interfacial defects between ZnO and GaN.
(69) D1: Growth and Structural Characteristics.
(70) A schematic diagram of the Al.sub.xGa.sub.1-xN nanowire is depicted in
(71) The sample morphology was examined by a high resolution scanning electron microscope (SEM). As shown in
(72) Referring to
(73) It should be highlighted that, during the growth of the Al.sub.xGa.sub.1-xN nanowire under nitrogen-rich conditions, a large amount of Al adatoms accumulate near the sidewall of the nanowire, due to a relatively short adatom diffusion length, resulting in the formation of an Al-rich Al.sub.xGa.sub.1-xN shell on the nanowire lateral surfaces, see for example Wang et al (Appl. Phys. Lett., 101, 043115), Allah et al (Appl. Phys. Express, 5, 045002), Jindal et al (J. Appl. Phys., 105, 084902), shitara et al (Appl. Phys. Lett., 62, pp. 1658-1660), and Songmuang et al (Nanotechnology, 21, 295605). It has been confirmed that the formation of such an Al-rich shell structure can effectively suppress non-radiative recombination on the lateral surfaces of the active region and thus significantly improve the quantum efficiency. Shown in
(74) Around the Al.sub.0.12Ga.sub.0.88N active region, shown in
(75) D2: Photoluminescence and Internal Quantum Efficiency.
(76) Optical properties of the nanowire LED were investigated using temperature and power variable photoluminesecence (PL) spectroscopy. A 266 nm diode˜pumped solid-state (DPSS) Q-switched laser was used as the excitation power source. The duration, maximum energy, and repetition rate of the laser pulse were approximately 7 ns, 4 μJ, and 7.5 kHz, respectively. The signal was collected and analyzed by a high resolution spectrometer and detected by a photomultiplier tube. In order to perform power dependent photoluminescence (PL), the excitation power was reduced using UV neutral density filters. A long pass filter (λ>270 nm) was placed in front of the spectrometer to eliminate emission from the excitation laser source. In temperature dependent PL measurements, the samples were placed into a helium closed-loop cryostat with temperature varying from 20 K to room temperature.
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(78) We further performed temperature dependent PL studies from 20 to 300 K at an excitation power of 7 mW, shown in
(79) The IQE can be approximately estimated by comparing the integrated PL intensity measured at room temperature with respect to that measured at low temperature.
(80) D3: Device Fabrication and Characteristics.
(81) The fabrication of Al.sub.xGa.sub.1-xN nanowire array based LEDs was carried out with a polyimide resist layer being used for the planarization and passivation of the nanowires, see for example Nguyen et al (Nano. Lett. 11, pp. 1919-1924). An appropriate etch-back process using reactive ion etching was performed in order to allow for the exposure of the p-type layer of the nanowires. Before the deposition of the p-type metal contact, 49% HCl was used to remove any oxidized layer on the p˜type GaN layer for 1 min, After that, a Ni(7.5 nm) Au(7.5 nm) bi-layer was deposited at below 10.sup.−7 Torr by an electron beam evaporator and then annealed at 550° C. in N.sub.2 for 1 min using a rapid thermal annealing (RTA) system. The n-type metal contact Ti(20 nm)/Au(100 nm) was deposited at the backside of the n-type Si substrate and also annealed at 550° C. for 1 min via RTA. Finally, metallic contact grids with Ti(20 nm)/Au(150 nm) were made on the device surface to facilitate the carrier transport and injection process. Devices fabricated in different batches have been tested, and they exhibited similar I-V characteristics, demonstrating reliable device fabrication.
(82) Referring to
(83) Now referring to
(84) The relative external quantum efficiency (EQE) is measured under both CW and pulsed mode biasing conditions, as shown in
(85) E: Gan Nanowire Heterostructures on Silicon Oxide
(86) Within the preceding sections high efficiency visible and ultraviolet nanowire LED devices according to embodiments of the invention have been presented grown upon silicon substrates, a single crystalline substrate. However, it would be beneficial in order to substantially adjust the device fabrication costs, as well as to allow seamless integration with other device components, for such high-quality nanowires, to be grown on amorphous and/or flexible substrates. Accordingly, in this section the inventors outline catalyst-free molecular beam epitaxial (MBE) growth and characterization of GaN nanowire heterostructures on silicon oxide (SiO.sub.x).
(87) E1: Experiment Configuration.
(88) The GaN nanowires were grown on 2-inch Si(111) substrates by radio-frequency plasma-assisted MBE such as described supra in respect of the visible and ultraviolet LEDs. However, prior to loading into the MBE system, the Si substrates were cleaned by standard solvent solutions, and then coated with ≈100 nm SiO.sub.x by plasma-enhanced chemical vapour deposition (PECVD), which then served as the amorphous template for the nanowire formation. The growth conditions for the GaN nanowires include: a substrate temperature of ≈780° C.-830° C., a Ga flux of ≈7×10.sup.−8 torr, a nitrogen flow rate of ≈0.6-1.4 sccm; and a RF plasma forward power of ≈350 W.
(89) PL measurements were performed on GaN nanowires and InGaN/GaN dot-in-a-wire LEDs by optically exciting them using a 405 nm laser source via 100× objective. The de-focused beam size is 5 μm. The emitted light, collected through the same 100× objective, was spectrally resolved by a high-resolution spectrometer, and was detected by a liquid N.sub.2 cooled CCD camera.
(90) E2. Results and Discussions.
(91) Initially the GaN nanowires grown with different substrate temperatures where the N.sub.2 flow rate was kept at ≈1 sccm. An SEM image with a 45-degree angle is shown in
(92) The temperature dependence of nanowire density/morphology can be understood by the following considerations. At relatively high substrate temperature, the Ga adatom desorption rate is high, therefore the nucleation process is severely suppressed and as a result, the nanowire density is low, see first image 1900A in
(93) A similar scenario exists for case that the GaN nanowires grow with moderate density when the substrate temperature is decreased, see second image 1900B in
(94) This size uniformity and controlled orientation can also be maintained for relatively long GaN nanowires as evident from
(95) The PL spectrum measured at room temperature is shown in
(96) Recently, high-efficiency white-color InGaN/GaN nanowire LEDs have been achieved on Si substrates, see for example Nguyen et al (Nano. Lett., 11, pp. 1919-1924). However, the external quantum efficiency has been severely limited by the optical absorption of the Si substrates. Accordingly, improved device performance can be achieved by utilizing amorphous or transparent substrates.
(97) Accordingly, as an example, the inventors have investigated the growth and characterization of the InGaN/GaN dot-in-a-wire LEDs, see Nguyen, on thick an 1.5 μm SiO.sub.x template. A schematic plot of the structure is illustrated in
(98) The room temperature PL spectrum of the LEDs grown on the ≈1.5 μm SiO.sub.x template are presented together with the PL spectrum from the same structure but grown directly on crystalline Si(111) substrates. The SiO. template LEDs have an emission wavelength of ≈650 nm. It can be seen that the SiO.sub.x template LEDs have comparable or even stronger PL emission intensity compared with that from those on Si(111) substrates which may, potentially, be ascribed to the reduced optical absorption by the SiO.sub.x template.
(99) To reveal more details of the SiO.sub.x and Si(111) templated InGaN/GaN dot-in-a-wire LEDs the inverse-temperature dependent integrated PL intensity was measured and is depicted in
(100) Whilst the embodiments presented supra have been presented in respect of GaN dot-core nanowires it would be evident to one skilled in the art that the principle applies to other group IIIA-nitrides where the group IIIA material nucleates and forms a liquid droplet upon the substrate during the initial phase of the nanowires growth where the nitrogen has not been admitted into the reaction chamber. These group IIIA elements all form a wurtzite crystalline structure in their nitrides. Accordingly the invention may be applied to structures formed with InN or BN deposited onto the substrate as well as GaN deposited onto the substrate. It would also be apparent to one skilled in the art that alternate approaches to patterning the nanowires are feasible without departing from the scope of the invention. It would be apparent that with patterned nanowires with increased spacings and regular patterning the shell deposition process may change such that the ratio of material on the nanowire sidewall to nanowire top adjusts.
(101) It would also be evident that by varying the dimensions of the droplets at the nanoscale the dimensions of the resulting nanowires varies. Further, the inventors have shown that through such growth process not only can high quality nanowires comprising quantum structures such as quantum dots and quantum wells be grown but also that quantum dot within quantum dot structures and quantum dots comprising nanoclusters characterized by a group IIIA element composition higher than that of the surrounding quantum dot may be formed. Semiconductors according to embodiments of the invention may formed from group III and IIIA elements including, but not limited to, boron, aluminum, gallium and indium in combination with group V and VA elements including, but not limited to, nitrogen, phosphorous, and arsenic. Said semiconductors may be binary, ternary, and quaternary and intrinsic or extrinsic with varying doping levels. Within the embodiments of the invention described above the semiconductor material employed for the shell, AlGaN, is a ternary based upon a common group III (Ga) and group V (N) as that of the nanowire. Within other embodiments of the invention the shell may be a member of a different semiconductor family exploiting a different group III and/or group V element to that of the core nanowire. Equally, nothing within the descriptions above shall be taken to imply that a ternary shell (e.g. AlGaN) should be employed in conjunction with a binary nanowire (e.g. GaN with doping for p-type and n-type regions) with ternary quantum structures (e.g. InGaN).
(102) Accordingly, binary, ternary and quaternary shells may be employed with binary nanowires and their quantum structures according to the performance requirements of the optical source which may include environmental factors, such as operating temperature for example, and well as light source characteristics, such as maximum current, operating voltage, operating wavelength, optical bandwidth, etc. Whilst the descriptions have been described in respect of optical sources nothing shall be taken to construe the invention and its embodiments as being limited only to solid state light sources. Core-shell dot-in-a-wire nanowires and core-shell nanowires may be also employed, including but not limited to, optical receivers, solar cells, chemical sensors, and biological sensors where enhancements in electrical injection/extraction and transport may be achieved through the increased confinement of the core-shell structure.
(103) Specific details are given in the above description to provide a thorough understanding of the embodiments. However, it is understood that the embodiments may be practiced without these specific details. For example, circuits may be shown in block diagrams in order not to obscure the embodiments in unnecessary detail. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.
(104) The foregoing disclosure of the exemplary embodiments of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many variations and modifications of the embodiments described herein will be apparent to one of ordinary skill in the art in light of the above disclosure. The scope of the invention is to be defined only by the claims appended hereto, and by their equivalents.
(105) Further, in describing representative embodiments of the present invention, the specification may have presented the method and/or process of the present invention as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. As one of ordinary skill in the art would appreciate, other sequences of steps may be possible. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. In addition, the claims directed to the method and/or process of the present invention should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the present invention.