Liquid crystal display device

Abstract

A liquid crystal display (LCD) device has a pixel structure which enhances a viewing angle of the LCD device through the use of a sub-pixel in which a gray scale varies during a display period and to which a photoconductive element is applied, the photoconductive element including a photoconductive layer of which a resistance level varies corresponding to an amount of light.

Claims

1. A liquid crystal display device comprising: a first substrate; a second substrate opposing the first substrate; a liquid crystal layer between the first substrate and the second substrate; a gate line which is disposed on a surface of the first substrate, extends in a first direction and receives a gate signal; a data line which extends in a second direction which intersects the first direction, and receives a data signal; and a pixel connected to the gate line and the data line and comprising: a first sub-pixel electrode; a first transistor which is connected to the gate line, the data line, and the first sub-pixel electrode, and outputs the data voltage to the first sub-pixel electrode; a second sub-pixel electrode; a second transistor connected to the gate line, the data line, and the second sub-pixel electrode, the second transistor outputting the data voltage to the second sub-pixel electrode; a photoconductive element which is connected to the second transistor and is not connected to the first transistor, and comprises a photoconductive layer of which a resistance level varies corresponding to an amount of light; and a charge leakage electrode which is connected to the photoconductive element and applies a reference potential.

2. The liquid crystal display device of claim 1, wherein the photoconductive element is at least one of a thin film transistor, a photodiode, a photoconductive resistor, and a resistance memory.

3. The liquid crystal display device of claim 2, wherein the photoconductive element comprises a gate electrode, a source electrode, a data electrode, and an active layer.

4. The liquid crystal display device of claim 3, wherein the gate electrode of the photoconductive transistor is disposed below the active layer.

5. The liquid crystal display device of claim 4, wherein the gate electrode of the photoconductive transistor has a width less than that of the active layer.

6. The liquid crystal display device of claim 4, wherein the gate electrode of the photoconductive transistor is opaque.

7. The liquid crystal display device of claim 4, wherein the drain electrode of the photoconductive transistor is electrically connected to the charge leakage electrode.

8. The liquid crystal display device of claim 7, wherein the gate electrode and the drain electrode of the photoconductive transistor are electrically connected to each other.

9. The liquid crystal display device of claim 7, wherein the pixel further comprises a storage electrode overlapping at least a side of one of the first and second sub-pixel electrodes while being insulated from the one of the first and second sub-pixel electrodes, and the storage electrode is electrically connected to the charge leakage electrode.

10. The liquid crystal display device of claim 7, wherein the pixel further comprises a common electrode on the second substrate, the common electrode opposing one of the first and second sub-pixel electrodes and being electrically connected to the charge leakage electrode.

11. The liquid crystal display device of claim 2, wherein the liquid crystal layer comprises a vertically aligned liquid crystal.

12. The liquid crystal display device of claim 11, wherein the second sub-pixel electrode has an area different from that of the first sub-pixel electrode in size.

13. The liquid crystal display device of claim 2, further comprising a black matrix overlapping the gate line and the data line.

14. The liquid crystal display device of claim 13, wherein an aperture is defined in a portion of the black matrix overlapping the photoconductive element.

15. The liquid crystal display device of claim 13, wherein a thickness of a portion of the black matrix overlapping the photoconductive element is less than a thickness of a portion of the black matrix not overlapping the photoconductive element.

16. The liquid crystal display device of claim 13, wherein the black matrix is disposed on one of the first and second substrates.

17. The liquid crystal display device of claim 1, wherein the first sub-pixel electrode and the second sub-pixel electrode are driven at different voltages when receiving the same gate signal and the same data signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The above and other features and exemplary embodiments of the invention of invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

(2) FIG. 1 is an equivalent circuit view of an exemplary embodiment of a pixel of a liquid crystal display (LCD) device according to the invention;

(3) FIGS. 2A and 2B are circuit views illustrating operations of the circuit of FIG. 1 based on a gate signal;

(4) FIG. 2C is a timing diagram illustrating variations in first and second pixel voltages based on a gate signal;

(5) FIG. 3 is a plan view illustrating an exemplary embodiment of a pixel according to the invention;

(6) FIG. 4A is a cross-sectional view taken along line I-I of FIG. 3;

(7) FIG. 4B is a cross-sectional view taken along line II-II of FIG. 3;

(8) FIG. 5 is a cross-sectional view illustrating a transistor in which a light leakage current is generated;

(9) FIG. 6 is a set of graphs illustrating a light leakage phenomenon of amorphous silicon occurring based on a light source;

(10) FIG. 7 is an equivalent circuit diagram of another exemplary embodiment of a pixel using a photoconductive element according to the invention;

(11) FIG. 8 is a plan view illustrating another exemplary embodiment of a pixel including a black matrix according to the invention;

(12) FIG. 9 is a cross-sectional view taken along line of FIG. 8; and

(13) FIG. 10 is a cross-sectional view illustrating another exemplary embodiment of a pixel including a black matrix according to the invention.

DETAILED DESCRIPTION

(14) Exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings.

(15) Although the invention can be modified in various manners and have several embodiments, specific embodiments are illustrated in the accompanying drawings and will be mainly described in the specification. However, the scope of the embodiments of the invention is not limited to the specific embodiments and should be construed as including all the changes, equivalents, and substitutions included in the spirit and scope of the invention.

(16) It will be understood that, although the terms first, second, and the like, may be used herein to describe various elements, components, areas, layers and/or sections, these elements, components, areas, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer or section from another element, component, area, layer or section. Thus, a first element, component, area, layer or section discussed below could be termed a second element, component, area, layer or section without departing from the teachings of example embodiments.

(17) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms a, an, and the are intended to include the plural forms, including at least one, unless the content clearly indicates otherwise. Or means and/or. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms comprises and/or comprising, or includes and/or including when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

(18) Furthermore, relative terms, such as lower or bottom and upper or top, may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the lower side of other elements would then be oriented on upper sides of the other elements. The exemplary term lower, can therefore, encompasses both an orientation of lower and upper, depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as below or beneath other elements would then be oriented above the other elements. The exemplary terms below or beneath can, therefore, encompass both an orientation of above and below.

(19) About or approximately as used herein is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, considering the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system). For example, about can mean within one or more standard deviations, or within 30%, 20%, 10%, 5% of the stated value.

(20) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

(21) Exemplary embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims.

(22) When it is determined that a detailed description may make the purpose of the invention unnecessarily ambiguous in the description of the invention, such a detailed description will be omitted. In addition, the same components and corresponding components are given the same reference numeral.

(23) Hereinafter, exemplary embodiments with reference to a configuration and operation of a liquid crystal display (LCD) device will be more clearly understood from the following description taken in conjunction with the accompanying drawings.

(24) FIG. 1 is an equivalent circuit diagram of a pixel of an LCD device according to an exemplary embodiment.

(25) Referring to FIG. 1, a pixel 100 includes a gate line GLj, a data line DLi, a first sub-pixel PX.sub.1, a second sub-pixel PX.sub.2, a first transistor TR.sub.1, a second transistor TR.sub.2, a first liquid crystal capacitor C.sub.1c1, a second liquid crystal capacitor C.sub.1c2, and a photoconductive transistor T.sub.p1.

(26) Each of the first and second transistors TR.sub.1 and TR.sub.2 is connected to the gate line GLj and the data line DLi, and output data voltages in response to gate signals. One end of the first liquid crystal capacitor C.sub.1c1 is a pixel electrode of the first sub-pixel PX.sub.1 that is connected to the first transistor TR.sub.1. Another end of the first liquid crystal capacitor C.sub.1c1 is a common electrode that maintains a common voltage COM. The first liquid crystal capacitor C.sub.1c1 receives the data voltage that is output from the first transistor TR.sub.1, and the first liquid crystal capacitor C.sub.1c1 is charged with a first pixel voltage V.sub.px1.

(27) In addition, one end of the second liquid crystal capacitor C.sub.1c2 is a pixel electrode of the second sub-pixel PX.sub.2 that is connected to the second transistor TR.sub.2. Another end of the second liquid crystal capacitor C.sub.1c2 is a common electrode. The second liquid crystal capacitor C.sub.1c2 receives the data voltage that is output from the second transistor TR.sub.2, and the second liquid crystal capacitor C.sub.1c2 is charged with a second pixel voltage V.sub.px2.

(28) A source electrode of the photoconductive transistor T.sub.p1 is connected to a drain electrode of the second transistor TR.sub.2 and to the second liquid crystal capacitor C.sub.1c2. A drain electrode of the photoconductive transistor T.sub.p1 is electrically connected to the common voltage COM. The drain electrode of the photoconductive transistor T.sub.p1 is also electrically connected to a gate electrode of the photoconductive transistor T.sub.p1.

(29) When an active layer between the source electrode and the drain electrode of the photoconductive transistor T.sub.p1 is exposed to light, a leakage current flows to decrease a resistance level, thereby discharging the second pixel voltage V.sub.px2 which is charged in the second liquid crystal capacitor C.sub.1c2 to a potential of the common voltage COM. In particular, the common voltage COM of the photoconductive transistor T.sub.p1 may have the same potential as that of the common voltage COM that maintains the second liquid crystal capacitor C.sub.1c2. However, although not illustrated in FIG. 1, the leakage current may be discharged using a separate voltage source, for example, in another exemplary embodiment.

(30) FIGS. 2A and 2B are circuit diagrams illustrating an operation of the circuit of FIG. 1 based on a gate signal GATE. FIG. 2C is a timing diagram illustrating variations in the first and second pixel voltages V.sub.px1 and V.sub.px2 based on a gate signal GATE.

(31) Referring to FIG. 2A, during a high period H of a gate signal GATE, the first liquid crystal capacitor C.sub.1c1 and the second liquid crystal capacitor C.sub.1c2 receive data voltages and are charged with the first pixel voltage V.sub.px1 and the second pixel voltage V.sub.px2, respectively. The first pixel voltage V.sub.px1 and the second pixel voltage V.sub.px2 are substantially the same voltages in that the first liquid crystal capacitor C.sub.1c1 and the second liquid crystal capacitor C.sub.1c2 are charged with data voltages during the same gate turned-on period of time via the same data line. However, while receiving the data voltage, light from a backlight unit is irradiated to the active layer of the photoconductive transistor T.sub.p1, and thus the leakage current flows and the second pixel voltage V.sub.px2 is discharged. Accordingly, the second pixel voltage V.sub.px2 may have a lower level than that of the first pixel voltage V.sub.px1.

(32) Referring to FIG. 2B, while maintaining a low period L of the gate signal GATE subsequent to the high period H of the gate signal GATE, the first transistor TR.sub.1 and the second transistor TR.sub.2 are turned off by a low voltage level of the gate signal GATE, and the first liquid crystal capacitor C.sub.1c1 and the second liquid crystal capacitor C.sub.1c2 are disconnected from the data line DLj. The first sub-pixel PX.sub.1 and the second sub-pixel PX.sub.2 represent a gray scale by controlling an amount of transmitted light from the backlight unit based on the pixel voltage stored in the liquid crystal capacitor of each sub-pixel.

(33) The first sub-pixel PX.sub.1 represents a predetermined gray scale based on the first pixel voltage V.sub.px1 stored in the first liquid crystal capacitor C.sub.1c1.

(34) The photoconductive transistor T.sub.p1 connected to the second liquid crystal capacitor C.sub.1c2 of the second sub-pixel PX.sub.2 is exposed to external light of the backlight unit, whereby the leakage current flows between the source electrode and the drain electrode of the photoconductive transistor T.sub.p1. The leakage current flowing therebetween may be represented as a resistor in the equivalent circuit of FIG. 2B. One end of the photoconductive transistor T.sub.p1 is connected to a common voltage COM. The common voltage COM maintains a level lower than that of the second pixel voltage V.sub.px2. The voltage charged in the second liquid crystal capacitor C.sub.1c2 is discharged to a level of the common voltage COM by the photoconductive transistor T.sub.p1 and continuously decreases. Accordingly, the second sub-pixel PX.sub.2 represents a gray scale continuously decreasing over time.

(35) Referring to FIG. 2C, a frame period corresponds to a high period H of a gate voltage, and is divided into a driving period during which a liquid crystal capacitor of each pixel is charged and a holding period during which a gray scale is represented.

(36) During the holding period, the voltage charged in the first liquid crystal capacitor C.sub.1c1 maintains a substantially invariable level of the first pixel voltage V.sub.px1. That is, the voltage V.sub.px1 of the first liquid crystal capacitor C.sub.1c1 in the holding period may have the substantially the same voltage level as that of the first pixel voltage V.sub.px1. In contrast, the voltage charged in the second liquid crystal capacitor C.sub.1c1 is continuously discharged by the leakage current of the photoconductive transistor T.sub.p1, and decreases from the level of the second pixel voltage V.sub.px2 to a level of a second pixel leakage voltage V.sub.px2. Accordingly, the gray scale represented by the second sub-pixel PX.sub.2 continuously decreases during the frame period.

(37) A user recognizes the gray scale represented by the second sub-pixel PX.sub.2 as an average value of the gray scales represented during the frame period. The pixel 100 may represent different gray scales in the first sub-pixel PX.sub.1 and the second sub-pixel PX.sub.2 using a single gate line and a single data line. In this manner, the side visibility of a display panel may be enhanced even by using a relatively simple circuit configuration of a vertical alignment LCD device.

(38) An amount of charge leaked from the charge stored in the second liquid crystal capacitor C.sub.1c2 is determined by the resistance level of the photoconductive transistor T.sub.p1. The resistance level of the photoconductive transistor T.sub.p1 is in proportion to an amount of light irradiated to the active layer. In other words, a period of time to discharge the voltage charged in the second liquid crystal capacitor C.sub.1c2 may be adjusted by controlling the amount of light irradiated to the active layer.

(39) FIG. 3 is a plan view illustrating a pixel 101 according to an exemplary embodiment. FIG. 4A is a cross-sectional view taken along line I-I of FIG. 3. FIG. 4B is a cross-sectional view taken along line II-IF of FIG. 3.

(40) Referring to FIGS. 3, 4A, and 4B, an LCD device includes a first substrate 111, a second substrate 121, and a liquid crystal layer 130 between the first substrate 111 and the second substrate 121 and sealed therebetween. A gate line GL, a data line DL, a thin film transistor (TFT), a pixel electrode PE, and the like, are disposed on the first substrate 111. A black matrix BM, a color filter (not illustrated), a common electrode 123, and a passivation layer 124 are disposed on the second substrate 121.

(41) The pixel 101 includes the gate line extending in a first direction, the data line extending in a second direction intersecting the first direction. The gate line and the data line are insulated from one another by a gate insulating layer 112 and intersect one another. In addition, the pixel 101 may further include a storage electrode CL. The storage electrode CL overlaps each pixel electrode PE along an outer circumferential portion of the pixel electrode PE while being insulated from the pixel electrode PE. The storage electrode CL maintains a level of a common voltage COM so as to maintain a level of a voltage charged in a liquid crystal capacitor. The pixel electrode PE may be disposed between data lines the data line DLj and the data line DLj+1.

(42) The pixel 101 includes a first transistor TR.sub.1, a second transistor TR.sub.2, a first pixel electrode PE.sub.1, a second pixel electrode PE.sub.2, and a photoconductive transistor T.sub.p1.

(43) The first transistor TR.sub.1 includes a first gate electrode GE.sub.1 connected to a gate line GL.sub.j, a first source electrode SE.sub.1 connected to a data line DLi, and a first drain electrode DE.sub.1 spaced apart from the first source electrode SE.sub.1 at a predetermined interval. An active layer 113 is disposed between the first gate electrode GE.sub.1, and the first source electrode SE.sub.1 and the first drain electrode DE.sub.1. Similarly, the second transistor TR.sub.2 includes a second gate electrode GE.sub.2 connected to the gate line GL.sub.j, a second source electrode SE.sub.2 connected to the data line DLi, and a second drain electrode DE.sub.2 spaced apart from the second source electrode SE.sub.2 at a predetermined interval. An active layer 113 is disposed between the second gate electrode GE.sub.2, and the second source electrode SE.sub.2 and the second drain electrode DE.sub.2.

(44) The gate electrodes GE.sub.1 and GE.sub.2 disposed respectively below the active layers 113 of the first and second transistors TR.sub.1 and TR.sub.2 each have a width greater than that of the active layer 113, such that the active layers 113 of the first and second transistors TR.sub.1 and TR.sub.2 are not exposed directly to light incident from a backlight unit.

(45) The first pixel electrode PE.sub.1 and the second pixel electrode PE.sub.2 are provided on the passivation layer 114, and are electrically connected to the drain electrode DE.sub.1 of the first transistor TR.sub.1 and to the drain electrode DE.sub.2 of the second transistor TR.sub.2 through first and second contact holes H1 and H2, respectively.

(46) The photoconductive transistor T.sub.p1 includes a gate electrode GE.sub.p, a source electrode SE.sub.p disposed on the gate electrode GE.sub.p and connected to the drain electrode DE.sub.2 of the second transistor TR.sub.2, a drain electrode DE.sub.P spaced apart from the source electrode SE.sub.P and connected to the gate electrode GE.sub.P and the storage electrode CL, and an active layer 115 between the gate electrode GE.sub.p, and the source electrode SE.sub.p and the drain electrode DE.sub.p. The gate electrode GE.sub.p of the photoconductive transistor T.sub.p1 has a width less than that of the active layer 115, and does not overlap a portion of the active layer 115. The active layer 115 of the photoconductive transistor T.sub.p1 may be exposed to light incident from the backlight unit. The drain electrode DE.sub.p of the photoconductive transistor T.sub.p1 is connected to the gate electrode GE.sub.p via third and fourth contact holes H3 and H4 and via a bridge electrode BE. The gate electrode GE.sub.p of the photoconductive transistor T.sub.p1 is connected to a charge leakage electrode LE. The charge leakage electrode LE is an electrode that applies a reference potential to the photoconductive transistor T.sub.P1, and in the pixel 101 of FIG. 3, the charge leakage electrode LE and the storage electrode CL are electrically connected to one another. The charge leakage electrode LE may be electrically connected to the common electrode 123 on the second substrate 121, and may be connected to an external circuit via an additional wiring.

(47) FIG. 5 is a cross-sectional view illustrating a TFT in which a light leakage current is generated. FIG. 6 is a set of graphs illustrating a light leakage phenomenon of the TFT that occurs based on a light source.

(48) Referring to FIG. 5, the TFT includes, on a first substrate 111, a gate electrode GE, a gate insulating layer 112 insulating the gate electrode GE, an active layer 115 on the gate insulating layer 112, a source electrode SE and a drain electrode DE that are disposed on the active layer 115 and are spaced apart from one another. The source electrode SE and the drain electrode DE include the same material.

(49) In an exemplary embodiment, the active layer 115 may include amorphous silicon injected with hydrogen (A-Si:H), for example. Since such an amorphous silicon transistor has a high light-absorbing coefficient, when the amorphous silicon transistor is exposed to a light source, a high-level off-state leakage current flows therein. The TFT of FIG. 5 is an inverted staggered type transistor, and the gate electrode GE is disposed between the active layer 115 and a light source of a backlight unit. The TFT includes the gate electrode GE having a width less than that of the active layer 115. The active layer 115 is divided into areas A, B, and C. The areas A and C are an area in which the active layer 115 is exposed to the light source of the backlight unit due to a relatively narrow width of the gate electrode GE. The area B is an area in which the light source of the backlight unit is obscured by the gate electrode GE. The off-state leakage current of the photoconductive transistor T.sub.p1 varies based on the size of the areas A and C, the type and the luminance of the light source.

(50) The inverted staggered type TFT has a structure in which the gate electrode GE is disposed below the active layer 115, and thus, light incident from the backlight unit may be blocked by expanding the area of the gate electrode GE. Accordingly, an additional light shielding member may be unnecessary below the active layer 115. However, an upper portion of the active layer 115 may be exposed to reflected light that is reflected or dispersed from an opposing substrate. Due to the reflected light, a leakage current may flow in the TFT. In an exemplary embodiment, to prevent the leakage current, a black matrix may be provided on the TFT to thereby block the reflected light.

(51) FIG. 6 is a set of graphs illustrating an amount of irradiated light and an amount of leakage currents of a TFT.

(52) Referring to FIG. 6, an x axis represents a gate voltage of the TFT, and a y axis represents a drain current. Each graph represents an amount of light that is irradiated to the TFT. In a dark state in which light is not irradiated, the amount of the leakage currents is the lowest. As the amount of irradiated light increases, even in an off-state period, an amount of leakage currents flowing into a drain electrode increases based on a gate voltage.

(53) FIG. 6 illustrates the set of graphs based on the TFT using amorphous silicon injected with hydrogen (A-Si:H) as an active layer, for example. It may be appreciated from the set of graphs in FIG. 6 that the amount of the leakage currents when the active layer of the TFT is exposed to the light source is 100 nanoampere (nA) greater than that of the leakage currents when the active layer of the TFT is not exposed to the light source.

(54) FIG. 7 is an equivalent circuit view of a pixel 100 using a photoconductive element according to another exemplary embodiment.

(55) Since a gate line GL, a data line DL, first and second transistors TR.sub.1 and TR.sub.2, a pixel liquid crystal capacitor C.sub.1c, and the like, with reference to FIG. 7 are the same as or substantially similar to those described in the exemplary embodiments shown in FIG. 2B, a repeated description thereof will be omitted herein for conciseness. The photoconductive element 300 of FIG. 7 is an element exhibiting a photoconductive effect in which conductivity increases as the photoconductive element absorbs light. Examples of the photoconductive element may include a photo-resistor, a photodiode, cadmium sulfide (CdS), a TFT, a zinc oxide (ZnO) photoconductive element, and the like.

(56) FIG. 8 is a plan view illustrating a pixel 101 including a black matrix BM according to another exemplary embodiment.

(57) FIG. 9 is a cross-sectional view taken along line III-III of FIG. 8.

(58) Referring to FIGS. 8 and 9, the black matrix BM is disposed in an area overlapping a gate line GL, a data line DL, a first transistor TR.sub.1, a second transistor TR.sub.2, and a photoconductive transistor T.sub.1.

(59) The black matrix BM may be provided by spraying an organic ink, or patterning a metal layer through a photolithography process. In an exemplary embodiment, the black matrix BM may include an organic light shielding layer including chromium (Cr), chromium oxide (CrO.sub.x), or a resin, for example. In an exemplary embodiment, the organic light shielding layer may be a colored organic resin, for example, an acryl, epoxy or polyimide resin including one of carbon black and a black pigment.

(60) The black matrix BM serves to enhance display quality by blocking reflected light that is reflected in a non-display area of a display panel, such as in the gate line GL, the data line DL, and the like. In addition, the black matrix BM serves to prevent a light from a backlight unit from being reflected from a second substrate 121 and from being irradiated to an active layer of a TFT on a first substrate 111.

(61) The black matrix BM according to the illustrated exemplary embodiment serves to reflect a portion of the light from the backlight unit that is irradiated from a rear surface of the display panel to an active layer 115 of a photoconductive transistor T.sub.p1. A leakage current that is generated by the photoconductive transistor T.sub.p1 exposed to the reflected light discharges a second pixel voltage V.sub.px2 stored in a second liquid crystal capacitor C.sub.1c2 to a storage electrode CL.

(62) A transparent aperture 125 is defined in a portion of the black matrix BM that is upwardly of the photoconductive transistor T.sub.p1. The aperture 125 may include a plurality of apertures. The number and the shape of the apertures 125 of the black matrix BM are determined based on an amount of the leakage currents of the photoconductive transistor T.sub.p1.

(63) FIG. 10 is a cross-sectional view illustrating a pixel including black matrices 126 and BM according to still another exemplary embodiment.

(64) A black matrix 126 in an area overlapping a photoconductive transistor T.sub.p1 has a thickness less than that of a black matrix BM in an area not overlapping the photoconductive transistor T.sub.p1. As the thickness of the black matrix 126 decreases, the function of the black matrix 126 that blocks reflected light decreases, such that a relatively great amount of reflected light may be irradiated to the photoconductive transistor T.sub.p1. In addition, an aperture 125 may be defined in the black matrix 126 overlapping the photoconductive transistor T.sub.p1.

(65) The black matrix BM may be provided in a single process to have different thicknesses based on a portion thereof. In a process of manufacturing the black matrix BM through light exposure and etching processes using a mask, the black matrix BM may be etched by adjusting an amount of light exposure thereon using a half tone mask (HTM), and the like, on a portion of the black matrix BM having a small thickness, to thereby have different thicknesses.

(66) As set forth above, according to one or more exemplary embodiments, the LCD device may enhance image quality based on a viewing angle by allowing the two sub-pixels that are driven by sharing a common gate line and a common data line to be driven at different voltages.

(67) From the foregoing, it will be appreciated that various embodiments in accordance with the disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the teachings. Accordingly, the various embodiments disclosed herein are not intended to be limiting of the true scope and spirit of the teachings. Various features of the above described and other embodiments can be mixed and matched in any manner, to produce further embodiments consistent with the invention.