FLEXIBLE PASSIVE ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THE SAME

Abstract

A flexible passive electronic component includes a substrate, which comprises an insulating layer and optionally an inorganic layer with an upper side and a lower side, whereby the insulating layer at least partially covers the upper side of the optional inorganic layer. The flexible passive electronic component further comprises an electrical structure at least partially covering the insulating layer. The substrate has a thickness, which is at most 500 μm. The flexible passive electronic component has a height, which is at most 150 11 μm.

Claims

1-15. (canceled)

16. A flexible passive electronic component, comprising a substrate comprising an insulating layer, and an electrical structure, the electrical structure at least partially covering the insulating layer, wherein the substrate has a thickness which is at most 50 μm, and the flexible passive electronic component has a height which is at most 150 μm.

17. The flexible passive electronic component according to claim 16, wherein the flexible passive electronic component has a flexibility that is bendable with a radius of bending curvature of at least 5 mm, and wherein a relative difference (d R/RO) of resistivity of the electrical structure before and after bending may not exceed 0.5%.

18. The flexible passive electronic component according to claim 16 further comprising an inorganic layer with an upper side and a lower side, wherein the insulating layer at least partially covers the upper side of the inorganic layer, and wherein the inorganic layer is made of at least one of an inorganic crystalline material, silicon, silicon carbide, gallium arsenide, sapphire, an inorganic amorphous material, quartz glass, borosilicate glass, glass, and a silicon-on-insulator (SOI) wafer.

19. The flexible passive electronic component according to claim 16, wherein the flexible passive electronic component has a length, a width and the height, wherein the product of the length times the width is at most 4 mm.sup.2.

20. The flexible passive electronic component according to claim 16, wherein the electrical structure includes at least one conductor track and at least two electrical contact pads, the at least two electrical contact pads being electrically connected to the at least one conductor track, wherein the at least one conductor track has a uniform width, the width being not more than 5 μm and the standard deviation of the width being not more than 5% of the width.

21. The flexible passive electronic component according to claim 20, wherein the conductor track has a temperature coefficient of electrical resistance of at least 3.000 ppm/K.

22. The flexible passive electronic component according to claim 16, further comprising at least one additional electrical structure, each including at least one conductor track, wherein the electrical structure and the at least one additional electrical structure are arranged in a multilayer structure such that: a) the conductor tracks of the electrical structure and the at least one additional electrical structure are arranged one above the other on different planes; and b) the adjacent conductor tracks lying one above the other are at least partially separated from one another by an additional insulating layer; c) the adjacent conductor tracks lying one above the other are electrically connected to one another via one or more conducting vias formed through the additional insulating layer.

23. The flexible passive electronic component according to claim 16, wherein the insulating layer is made of at least one of metal oxides, metal nitrides, silicon dioxide, silicon nitride, aluminum oxide, aluminum nitride, hafnium oxide and hafnium nitride.

24. The flexible passive electronic component according to claim 16, wherein the electrical structure is made of at least one of platinum, nickel, aluminum, an alloy containing platinum, nickel and aluminum.

25. The flexible passive electronic component according to claim 16, further comprising a cover layer at least partially covering the electrical structure, the cover layer being formed from an inorganic layer.

26. The flexible passive electronic sensor according to claim 16, wherein the electrical structure is designed as a sensor element or heater element.

27. The flexible passive electronic component according to claim 26, wherein the electrical structure as the sensor element has an electrical resistance of at least 100 Ohm, or wherein the electrical structure as the heater element has an electrical resistance of at most 5 Ohm.

28. The flexible passive electronic component according to claim 26, wherein the electrical structure as the sensor element has an electrical resistance of at least 10000 Ohm, or wherein the electrical structure as the heater element has an electrical resistance of at most 1 Ohm.

29. The flexible passive electronic component according to claim 16, wherein the substrate has a thickness which is at most 20 μm, and wherein the flexible passive electronic component has a height which is at most 40 μm.

30. A flexible passive electronic component system, comprising at least one flexible passive electronic component according to claim 16, and at least one electrical control, the electrical control being electrically connected to the electrical structure and configured to control the flexible passive electronic component.

31. A method for producing a flexible passive electronic component, particularly a flexible passive electronic component according to claim 16, comprising: a) providing an inorganic wafer having an upper side and a lower side, b) applying an insulating layer on the upper side of the inorganic wafer, c) applying and structuring an electrical structure or multilayered electrical structures on the insulating layer, d) applying a cover layer on the electrical structure, e) thinning the inorganic wafer on the lower side, to a thickness of a substrate, comprising the insulating layer and the inorganic wafer, of at most 50 μm.

32. The method of claim 31 further comprising: f) applying a first protective layer on the side of the electrical structure and/or the lower side of the substrate, and g) removing the first protective layer after the step of thinning the inorganic wafer.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0049] FIG. 1 shows a cross section of a first preferred embodiment of a flexible passive electronic component, in particular a sensor, of the invention;

[0050] FIG. 2 shows a plan view of the flexible passive electronic component in accordance with FIG. 1;

[0051] FIGS. 3A to 3M show cross sectional views of a technique for manufacturing a flexible passive electronic component in accordance with the invention; and

[0052] FIG. 4 shows a cross section of a second preferred embodiment of a flexible passive electronic component of the invention.

DESCRIPTION OF SPECIFIC EMBODIMENT

[0053] In the following description, a temperature sensor will be mainly described. However, the application of the present invention is not limited to the temperature sensor, and the invention can be advantageously applied to a flow sensor, a chemical (gas) sensor, particle sensor, or the like.

[0054] In accordance with FIGS. 1 and 2, the sensor 1 comprises a substrate 10. The substrate 10 comprises an inorganic layer 2 with an upper side 2a and a lower side 2b, an insulating layer 3, and an electrical structure 4. The insulating layer 3 at least partially covers the upper side 2a of the inorganic layer 2. The insulating layer 3 may cover the entire upper side surface of the inorganic layer 2, as depicted. The electrical structure 4 at least partially covers the insulating layer 3.

[0055] The substrate 10 has a thickness t10, which is at most 50 μm, preferably at most 35 μm, particularly preferably at most 20 μm. In other words, the thickness t10 of a substrate 10 is made of a thickness t2 of the inorganic layer 2 and a thickness t3 of the insulating layer 3. In the case where the substrate 10 has only an insulating layer 3, the thickness t10 is equivalent to the thickness t3.

[0056] The sensor 1 has a height h1, which is at most 150 μm, preferably at most 70 μm, particularly preferably at most 40 μm. The thinned substrate 10 provides flexibility to the sensor 1. This flexibility can still be maintained by the limited overall height h1 of the sensor 1 with at most 150 μm. Furthermore, the sensor 1 with small mass follows rapidly the surrounding environment, resulting in a quick response in measurements.

[0057] The inorganic layer 2 may be made of an inorganic crystalline material, in particular silicon, silicon carbide, gallium arsenide or sapphire, or made of an inorganic amorphous material, in particular quartz glass, borosilicate glass or glass, or made from a silicon-on-insulator (SOI) wafer.

[0058] The insulating layer 3 may made of metal oxides and/or metal nitrides, in particular silicon dioxide, silicon nitride, aluminium oxide, aluminium nitride, hafnium oxide or hafnium nitride.

[0059] The electrical structure 4 may be made of platinum, nickel, aluminium or alloys such as an alloy at least containing platinum, nickel and/or aluminium, or an aluminium-copper (Al—Cu) alloy with 99.5% Al and 0.5% Cu.

[0060] The sensor 1 may further comprise a cover layer 5 at least partially covers the electrical structure 4. The cover layer 5 may expose one or more parts of the electrical structure 4 for one or more electrical contact pads 4a. The cover layer 5 may be formed from an inorganic layer.

[0061] The sensor 1 may further comprise a protective layer 6 on the lower side 2b of the inorganic substrate 10. The protective layer 6 may be made of polymeric material such as polystyrene (PS), polyethylene (PE) or polyimide (PI). The protective layer 6 is not limited to these as long as it has appropriate electrical insulation and heat transfer properties. The specific shape of the electrical structure 4 can be seen from FIG. 2. For example, the two electrical contact pads 4a discussed above extend in parallel and spaced from each other. The total area of the electrical contact pads 4a and the conductor track 4b may be half of the area of the substrate 10. For example, when the area of the substrate 10 is 1×1 mm.sup.2, each area of the electrical contact pad 4a is 0.1 mm.sup.2. This is an example, and the dimensions of sensor 2 and contact pad 4a are not limited to these. The electrical structure 4 may include more than two electrical contact pads 4a in the same plane.

[0062] Besides the contact pads 4a, the electrical structure 4 includes at least one conductor track 4b. The conductor track 4b is electrically connected to both of the electrical contact pads 4a. The conductor track 4b has a first end and second end. The first end of the conductor track 4b is connected to one contact pad 4a; the second end of the conductor track 4b is connected to the other contact pad 4a.

[0063] In the illustrated example, the conductor track has a meander shape that repeatedly bends in S-shape. The shape of the conductor track 4b is not limited to this as long as a necessary conductor length or resistance value is obtained. Preferably, the conductor track 4b has a uniform width, wherein the width is not more than 5 μm and the standard deviation of the width is not more than 5% of the width. The thin and uniform conductor track 4b is advantageous for quick and stable response to the rapidly changing measurement parameters. The conductor track 4b may be formed at least partially as an adjustment straining.

[0064] The conductor track 4b may be applied as a sensor element and/or heater element. In an application to a chemical sensor, a catalytic material may be provided on the conductor track 4b as a sensor element. Also, another conductor track (not shown) as a heater element may be placed adjacent to above or below the conductor track 4b as the sensor element. In an application to a flow sensor, one conductor track as a heater element may be arranged between two conductor tracks as sensor elements.

[0065] In an example of the temperature sensor, the electrical structure 4 may have an electrical resistance of at least 100 Ohm, preferably at least 1.000 Ohm, particularly preferably at least 10.000 Ohm. Low self-heating is thereby achieved.

[0066] In an example of the electrical structure 4 as the heater element, it may have an electrical resistance of at most 5 Ohm, preferably at most 2 Ohm, preferably at most 1 Ohm. The conductor track of the heater element is preferably designed as a square or a U-loop. Preferable the heater is designed as multiple parallel addressed conductor tracks, whereas the conductor tracks have uniform width, the width being not more than 5 μm and the standard deviation of the width being not more than 5% of the width.

[0067] Although not shown, the sensor 1 may further comprises at least one additional electrical structure. Each additional electrical structure may include at least one conductor track which has the same structure as the conductor track 4b described above. The electrical structure 4 and the at least one additional electrical structure may be arranged in a multilayer structure such that: [0068] a) the conductor tracks 4b of the electrical structure 4 and the at least one additional electrical structure are arranged one above the other on different planes; and [0069] b) the adjacent conductor tracks 4b lying one above the other are at least partially separated from one another by an additional insulating layer; and optionally [0070] c) the adjacent conductor tracks 4b lying one above the other are electrically connected to one another via one or more conducting vias formed through the additional insulating layer.

[0071] The increased sensing area with the multi-layered electrical structures 4 is advantageous for the improved sensing accuracy or performance, while keeping the sensor 1 small. The additional insulating layer may have the same configuration as the insulating layer 3 on the inorganic layer 2.

[0072] Design example of the sensor for the temperature sensor may be as follows:

[0073] With sensor area 1×1 mm.sup.2 (1 mm in length and 1 mm in width), half of the substrate is coved by the contact pads 4a and the conductor track 4b, whereby the area of the contact pads 4a is at least 2×0.15 mm.sup.2 and the conductor track is formed as meander. The width of conductor track (line) of platinum is 1 μm; the spacing between the adjacent metal lines is 1.5 μm. The number of parallel metal lines is 200 with a total length of 20 cm. The electric resistivity of platinum (ρ.sub.Pt) is 1.06 μOhm m. The electric resistance R of the conductor track is obtained by R=ρ.sub.Pt×L/(B×H)

TABLE-US-00001 L: length B: width H: height Line resistance (cm) (μm) (μm) (kOhm) 20 1 1 212 10 1.5 0.5 141

[0074] With reference to FIGS. 3A to 3M, an embodiment of a method of producing the sensor 1 shown in FIGS. 1 and 2 will be described.

[0075] FIG. 3A shows an inorganic wafer or plate 2′ having an upper side 2a′ and a lower side 2b′. The inorganic wafer 2′ may be made of an inorganic crystalline material, in particular silicon, silicon carbide, gallium arsenide or sapphire, or may be made of an inorganic amorphous material, in particular quartz glass, borosilicate glass or glass, or preferably a silicon-on-insulator (SOI) wafer. The wafer 2′ is thinned in a later process. The initial wafer thickness until then is preferably about 0.5 mm to 1 mm for the purpose of easy handling.

[0076] FIG. 3B shows that an insulating layer 3′ is applied on the upper side 2a′ of the inorganic wafer 2′. The insulating layer 3′ may be an electrically insulating oxide layer. To this end, a silicon wafer as the inorganic wafer 2′ is oxidized. A SOI wafer may be used from the beginning. Alternatively, an electrically insulating oxide layer can be deposited.

[0077] FIG. 3C shows that a metal layer 4′ is applied on the electrically insulating layer 3′. The metal layer 4′ may be evaporated or sputtered onto the insulating layer 3′. The metal layer 4′ may be made of platinum (Pt), aluminium (Al), nickel (Ni) or alloys such as an aluminium-copper (Al—Cu) alloy with 99.5% Al and 0.5% Cu or alloy containing at least Pt, Al and/or Ni.

[0078] FIG. 3D shows that a mask M is applied on the metal layer 4′. To this end, a photoresist is applied on the metal layer 4′ and is exposed and developed to the predetermined pattern.

[0079] FIG. 3E shows that a plurality of electrical structures 4 each including at least two electrically contact pads 4a and at least one conductor track 4b are structured from the metal layer 4′. The metal layer 4′ is etched by wet chemical etching or dry etching, leaving parts covered with the mask M.

[0080] FIG. 3F shows that the mask M is removed by, for instance, stripping.

[0081] FIG. 3G shows that a cover layer 5 is applied on parts of the electrical structure 4, leaving parts that become the electrical contact pads 4a free. To this end, an inorganic material such as silicon dioxide (SiO.sub.2) and optionally silicon nitride (Si.sub.3N.sub.4) is applied and structured by dry etching and/or wet etching, leaving parts covered with an additional mask (not shown). After applying the cover layer 5, the mask is removed by, for example, lift-off.

[0082] FIG. 3H shows that a first protective layer 7 is applied on the side of the electrical structure 4, covering the electrical structure 4, the cover layer 5, and parts of the insulating layer 3 exposed from the electrical structure 4. The first protective layer 7 may be a polymer layer made of polystyrene (PS), polyethylene (PE), polyimide (PI), or the like. Preferably, the organic material consists of photostructurable polyimide (PS-PI). The material is photostructured according to the mask of the cover layer 5.

[0083] Optionally, the electrical contact pads 4a are passivated with galvanic precious metal layers (not shown) applied thereon. An electroplating such as electro-nickel immersion gold (ENIG) may be applied on the electrical contact pads 4a.

[0084] FIG. 3I shows that the inorganic wafer 2′ together with the insulation layer 3′ is thinned down to at most 50 μm, preferably at most 35 μm, particularly preferably at most 20 μm, by various processes such as grinding, chemomechanical polishing (CMP), etching, or combination thereof, or the like. It proves to be advantageous that damage and/or contaminations of removed wastes to the electrical structure 4, cover layer 5 and insulating layer 3′ can be effectively prevented under the protection by the first protective layer 7. Besides, the inorganic wafer 2′ can be thinned in a stable state with the help of reinforcement by the first protective layer 7.

[0085] FIG. 3J shows that a second protective layer 6′ that to be the protective layer 6 is applied on the thinned surface (lower side) of the inorganic wafer 2′. The second protective layer 6′ may be a polymer layer made of polystyrene (PS), polyethylene (PE), polyimide (PI), or the like.

[0086] FIG. 3K shows that the inorganic wafer 2′ is diced together with the insulating layer 3′, the first protective layer 7′, the second protective layer 6′ and the cover layer 5′ into the individual sensors 1 shown in FIG. 1. These cuts are performed by saw, laser, or the like. These sensors 1 may be further processed in any electronic process compatible with SMT. The production of the sensor 1 is completed.

[0087] FIG. 3L shows that the first protective layer 7′ and the second protective layer 6′ are removed. The cover layer 5, the parts of the electrical structure 4 and the inorganic wafer 2′ are exposed again. The two protective layers 6′ and 7′ can, for example, be burnt off.

[0088] FIG. 3M shows an example of sensor connection. The sensor 1 may be mounted on the mount board S with the protective layer 6 facing the mount board S. In an application to a temperature sensor, the sensor 1 may be firmly connected to a surface to be measured. The electrical contact pads 4a of the sensor 1 and the mount board S may be electrically connected by wires.

[0089] Further advantages of the invented sensors can be found as follows: [0090] fast response time owing to the low mass, particularly of less than 1 mm.sup.2 in cross-section×100 μm in height, [0091] high mechanical flexibility of the sensor owing to the thinned inorganic substrate, [0092] low self-heating when the electrical resistance of the conductor track of 100 Ohm to 10.000 Ohm, [0093] low manufacturing costs (approximately 10.000 sensors may be produced from 100 mm×100 mm inorganic wafer), [0094] established lithography processes can be used.

[0095] FIG. 4 shows a further preferred embodiment of the invention in which the electrical contact pads 4a are directly connected to electrical lines of a circuit board (not shown). The thickness t4a of the electrical contact pads 4a is larger than the thickness t4b of the conductor track 4b of the electrical structure 4. This structure is achieved by once structuring the conductor track 4b and the electrical contact pads 4a with the same thickness and then selectively edging a portion corresponding to the conductor track 4b. Alternatively, this can be achieved by once structuring the conductor track 4b and the electrical contact pads 4a with the same thickness and then selectively thickening a portion corresponding to the electrical contact pads 4a by further vapor deposition or plating. The advantage of this design is the further reduction of thermal contact area between the thermal sensor and the circuit board to increase the sensitivity of the electrical structure designed as a thermal sensor, especially in the detection of radiant heat. In a preferred embodiment, the electrical connectivity is ensured by the use of isotropically conductive adhesives (ICA) and/or anisotropically conductive adhesives (ACA) which additionally improve mechanical stability.

EXECUTION EXAMPLES

Execution example 1: Design of a Flexible Passive Electronic Component, in Particular a Flexible Sensor, According to the Invention

[0096] A 200 mm silicon wafer with a silicon oxide layer on one side and a layer thickness of 1.2 μm is used as the inorganic wafer for the flexible sensor according to the invention. A metal layer is deposited on the silicon oxide layer. The metal layer has a total thickness of 850 nm and consists of an Al—Cu alloy of 99.5% Al and 0.5% Cu. The metal layer is then lithographically divided into individual electrical structures optional isolated from each other. The electrical structures each consist of a conductor track and two contact pads at the two ends of the conductor track. Each line of the conductor track has a homogeneous width and is arranged in a meander shape between the two contact pads. The electrical structures, which are differently designed on the wafer, are defined in particular by the following parameters: [0097] a) Length of the conductor track (L), [0098] b) Width of the conductor track (W),
The layout for structuring the metal layer is chosen so that the silicon wafer is divided into square fields, with the field area corresponding to 400 mm.sup.2 each. Each of the fields has the same pattern, consisting of 222 individual electrical structures arranged in individual rows. The electrical structures are divided into different groups, whereby the electrical structures within a group are identical. The electrical structures in at least one of the parameters L, or W differ between the groups.

[0099] After structuring the metal layer, the entire surface of the metal layer is first coated with an inorganic cover layer consisting of oxide and nitride layers. The total thickness of the inorganic cover layer is 1.4 μm. To ensure later electrical addressing, this cover layer is opened at the contact pads.

[0100] Subsequently, the surface is coated with photostructurable polyimide (PS-PI) with a dry layer thickness of approximately 3 μm and photostructured according to the mask of the cover layer. The surfaces of the contact pads remain free from the inorganic cover layer and the polyimide layer. The uncoated contact pads are then electroplated with a nickel/gold layer approximately 12 μm thick (ENIG process).

Execution Example 2: Electrical Characterization of the Flexible Sensor According to the Invention From Execution Example 1

[0101] The individual structures are characterized electrically one after the other. The two contact pads of an electrical structure are contacted with the two double contact tips of a wafer tester. By applying a voltage to the contact tips, R0, i.e. the electrical resistance of the electrical structure at a temperature of 0° C., is determined. The temperature coefficient of resistance (TCR) is determined by determining the resistance R at a second temperature.

[0102] Table 1 shows the mean values and the standard deviation of the electrical resistance R0 and the temperature coefficient TCR of the electrical structures of group Z1. For this purpose, individual fields distributed on the wafer are evaluated. Field 51 is located in the center of the wafer, fields 1 and 5 at its lower edge and fields 79 and 83 at its upper edge. 8 structures of group Z1 are evaluated on each field. The structures of group Z1 have a line width W=6.5 μm.

TABLE-US-00002 TABLE 1 STDEV MEAN STDEV Field MEAN R0 R0 TCR TCR # Ohm Ohm ppm/K ppm/K 1 249.1 1.8 4135.3 2.5 5 245.4 1.2 4139.1 1.5 51 249.1 0.1 4139.0 0.3 79 246.9 1.5 4136.8 1.9 83 245.7 0.9 4139.4 0.6 MEAN 247.2 2.1 4137.9 2.4

[0103] As can be seen from Table 1, the mean value of the resistance R0 of structure Z1 is 247.2 Ohm with a standard deviation of 2.1 Ohm relative to the five fields examined. Thus, the relative standard deviation of the resistance R0 is 0.85%. The mean value of the TCR is 4137.9 ppm/K with a standard deviation of 2.4 ppm/K. Thus, the relative standard deviation of the TCR is 0.058%.

[0104] In Table 2, the electrical resistances of the electrical structures from group Z18 are statistically evaluated. The electrical structures have a line width W=0.5 μm. There are 18 adjacent electrical structures on each field in the lowest row. Their electrical resistances are shown in Table 2 for one field each from the center, top and bottom of the wafer. The electrical resistance R of the electrical structures was determined at room temperature.

TABLE-US-00003 TABLE 2 Top Center Bottom R (Ohm) R (Ohm) R (Ohm) 1 9305.5 9514.3 9540.4 2 9273.5 9496.9 9517.5 3 9237.7 9517.3 9474 4 9202.7 9452.5 9431.5 5 9201.1 9441.7 9428.5 6 9183.5 9344.7 9386.4 7 9153.3 9189 9360.7 8 9129.7 9148.5 9328.1 9 9129.4 9163.9 9336.9 10 9102.4 9152.5 9298.5 11 9096.5 9118.6 9298.5 12 9105.1 9171.4 9295.4 13 9114.4 9152.1 9313.8 14 9129.3 9227.4 9335.3 15 9142.3 9223.1 9365.7 16 9175.4 9275.8 9396.7 17 9215.3 9329.2 9436.1 18 9241.7 9365.3 9453.5 All MEAN 9174.4 9293.6 9388.8 9285.6 STDEV 62.3 141.5 75.9 131.7 0.7% 1.5% 0.8% 1.4%

[0105] As Table 2 shows, the mean value of resistance R of structure Z2 is 9285.6 Ohm with a standard deviation of 131.7 Ohm relative to the three fields studied. Thus, the relative standard deviation of the resistance R is 1.4%.

[0106] Table 3 shows the mean values and standard deviations of the TCRs of the electrical structures of different groups from field 51.

TABLE-US-00004 TABLE 3 Line width MEAN STDEV W TCR TCR Group μm ppm/K ppm/K Z18 0.5 3963 3 Z4 1 4057 1 Z8 1.3 4092 1 Z6 1.73 4107 1 Z2 2.6 4110 1 Z1 6.5 4140 1

[0107] As Table 3 shows, the TCR and the standard deviation of the TCR are largely independent from the width of the conductor track, at least for the conductor track width in the range 0.5 μm to 6.5 μm, although a slight but systematic increase of the mean TCR with broader line width is obvious.

Execution Example 3: Completion of the Sensor According to Invention From Execution Example 1

[0108] The backside of the silicon wafer from the design example 1 is chemomechanically thinned to a wafer plus insulator thickness of approximately 10 μm. A protection layer of polyimide of approximately 13 μm is then applied to the thinned reverse side.

[0109] The electrical structures are then separated with a laser or by dicing. The individual structures are mechanically flexible and can be bent around a round bar with a radius of less than 1 mm. Repeated bending back and forth around the round bar does not significantly alter the R0 value and the TCR value of the electrical structure.

Execution Example 4: Using the Flexible Sensor According to the Invention to Measure a Temperature

[0110] To determine the surface temperature of a test piece, the electrical structure from design example 3 is attached to the surface of the test piece and the two contact pads are connected via leads to a resistance measuring device. By determining the electrical resistance of the electrical structure and using a calibration curve, the surface temperature of the specimen can be deduced.

Execution Example 5

[0111] Sensors according to Execution example 3 with the difference that the silicon oxide layer on one side has a layer thickness of 20 μm. The backside of the silicon wafer is chemomechanically thinned until nothing is left. A protection layer of polyimide of approximately 15 μm is then applied to the thinned reverse side.

[0112] This sensor has a similar flexibility as the sensor according to Execution example 3.

Execution Example 6

[0113] In a further example the contact pads are both raised above the conductor track of the electronic structure. The advantage of this design is to reduce the thermal contact area between the sensor and its mount. The sensor structure is free-floating and the thermal leakage is reduced. The free-floating arrangement of the temperature sensor is realized by connecting the raised contact pads directly to electrical lines of a circuit board.

Execution Example 7

[0114] Sensors according to Execution example 3 with R0=9.285 Ohm are glued on a 25 μm Polyimide foil and wrapped around various cylindrical bars with different diameters and d R/R0 is measured. The inorganic layer-thickness in total is 20 μm (thinned silicon inorganic layer: 10 μm; thickness of the inorganic isolating layer and protective layer: 10 μm). The results are outlined in Table 4.

TABLE-US-00005 TABLE 4 Bar Radius of diameter/mm curvature/mm d R/R0/% 10 5 0.0 8 4 0.0 6 3 0.00 4 2 0.05 3 1.5 0.15 2 1 0.5 1.5 0.75 1 1 0.5 Break of sensor

[0115] According to Table 4, the sensors are flexible if the radius of curvature does is not smaller than 1 mm, by means Rm<1 mm.

LIST OF REFERENCE SIGNS

[0116] 1 passive electronic component [0117] 2 inorganic layer [0118] 2′ inorganic wafer [0119] 2a upper side [0120] 2b lower side [0121] 2a′ upper side of the wafer [0122] 2b′ lower side of the wafer [0123] 3, 3′ insulating layer [0124] 4, 4′ electrical structure [0125] 4a electrical contact pad [0126] 4b conductor track [0127] 5, 5′ cover layer [0128] 6, 6′ second protective layer [0129] 7, 7′ first protective layer [0130] 10 substrate [0131] S mount board [0132] t2 thickness of the inorganic layer [0133] t3 thickness of the insulating layer [0134] t10 thickness of the substrate [0135] t4a thickness of an electrical contact pad [0136] t4b thickness of a conductor track