METHOD AND CIRCUIT ARRANGEMENT FOR DETECTING AN ARC AND PHOTOVOLTAIC (PV) INVERTER HAVING A CORRESPONDING CIRCUIT ARRANGEMENT

Abstract

The disclosure describes a method for detecting an arc in a direct-current (DC) circuit comprising a DC load, a DC source supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load. A power flow P between an input and an output of the circuit arrangement is suppressed by means of a switching circuit through cyclical interruption such that the power flow P is enabled in an active time window with the first period Δt.sub.1 and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2. Via detection of an input current I.sub.in flowing at the input and/or an input voltage U.sub.in applied to the input and comparison of values of the input current I.sub.in and/or input voltage U.sub.in detected in the inactive time window with a current threshold value I.sub.TH or a voltage threshold value U.sub.TH an arc presence criterion is signaled if the input current I.sub.in detected in the inactive time window falls below the current threshold value I.sub.TH and/or the input voltage U.sub.in detected in the inactive time window does not exceed the voltage threshold value U.sub.TH. The application also describes a circuit arrangement for detecting an arc and a photovoltaic (PV) inverter including such a circuit arrangement.

Claims

1. A method for detecting an arc in a direct-current (DC) circuit comprising a DC load, a DC source supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load, wherein the circuit arrangement comprises an input comprising two input terminals configured to connect the DC source, an output comprising two output terminals configured to connect the DC load, and a switching circuit arranged between the input and the output and comprises an input capacitance between the input terminals at the input, wherein the switching circuit is configured to enable a power flow P between the DC source and the output in a first operating mode (BM1) and to suppress the power flow between the DC source and the output in a second operating mode (BM2), comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode (BM1) and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode (BM2), detecting an input current I.sub.in flowing at the input and/or an input voltage U.sub.in applied to the input, comparing values of the input current I.sub.in and/or input voltage U.sub.in detected in the inactive time window with a current threshold value I.sub.TH or a voltage threshold value U.sub.TH, respectively, and signaling an arc presence criterion if the input current I.sub.in detected in the inactive time window falls below the current threshold value I.sub.TH and/or the input voltage U.sub.in detected in the inactive time window does not exceed the voltage threshold value U.sub.TH.

2. The method as claimed in claim 1, further comprising, in response to the signaling of the arc presence criterion, interrupting the power flow P between the input and the output permanently, or at least for a period of several minutes, or until a manual acknowledgement, using the switching circuit.

3. The method as claimed in claim 1, further comprising: detecting a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows, comparing the detected values of current I and/or voltage U of the active time window with the corresponding detected values from the preceding active time window, and signaling a further arc presence criterion if the values of current I and/or voltage U of the active time window differ from the corresponding values of the preceding active time window by more than a threshold value.

4. The method as claimed in claim 3, further comprising, in response to the signaling of the arc presence criterion and/or the further arc presence criterion, interrupting the power flow P between the input and the output permanently, or at least for a period of several minutes, or until a manual acknowledgement, using the switching circuit.

5. The method as claimed in claim 3, wherein the active time window and the preceding active time window are separated from one another by exactly one inactive time window.

6. The method as claimed in claim 1, wherein a value of the second period Δt.sub.2 of the inactive time window is sufficient to quench an arc that may be present in the DC circuit and to suppress reignition of the arc quenched in the inactive time window in the active time window that immediately chronologically follows the inactive time window.

7. The method as claimed in claim 6, wherein the second period Δt.sub.2 comprises a value between 0.1 ms and 10.0 ms.

8. The method as claimed in claim 1, wherein a value of the second period Δt.sub.2 is selected depending on detected values of a current I characterizing the power flow P and/or a voltage U characterizing the power flow P of the immediately preceding active time window, and wherein the second period Δt.sub.2 increases as a value of the current I and/or the voltage U increases.

9. The method as claimed in claim 1, wherein the second period Δt.sub.2 of the inactive time window is determined depending on the values of the input current I.sub.in detected in the inactive time window and/or on the values of the input voltage U.sub.in detected in the inactive time window.

10. The method as claimed in claim 9, wherein the second period Δt.sub.2 of the inactive time window is limited in that the detected input current I.sub.in falls below a further current threshold value I.sub.TH2 and/or the detected input voltage U.sub.in exceeds a further voltage threshold value U.sub.TH2.

11. The method as claimed in claim 1, wherein, in the inactive time window, the input current I.sub.in is measured as a change over time in the input voltage U.sub.in applied to the input capacitance.

12. The method as claimed in claim 1, wherein the switching circuit comprises a DC-DC converter and the circuit arrangement comprises an output capacitance connected in parallel with the output, and wherein, in the active time window, a voltage U.sub.out applied to the output capacitance is increased toward an end of the first period Δt.sub.1 by the switching circuit.

13. The method as claimed in claim 1, wherein a value of the first period Δt.sub.1 of the active time window is selected such that an arc energy that would be generated by a power loss of an assumed arc in the active time window does not exceed a predetermined maximum permitted energy value E.sub.max.

14. The method as claimed in claim 1, wherein the DC source comprises a PV string and the DC load comprises a single-phase DC-AC converter connected on the output side to an AC voltage (AC) grid, and wherein the cyclical interruption of the power flow P takes place such that there is a zero crossing of an AC current I.sub.AC (t) flowing via an output of the DC-AC converter during the second period Δt.sub.2 of the inactive time window.

15. The method as claimed in claim 1, wherein a plurality of DC sources are each connected to the DC load in parallel with one another via a switching circuit in order to jointly supply the DC load with their respective power flows P, wherein the method is carried out concurrently for each of the DC sources such that a temporal overlap of the inactive time windows of the plurality of DC sources is minimized.

16. A circuit arrangement for detecting an arc in a DC circuit, comprising: an input comprising two input terminals configured to connect a DC source and an output comprising two output terminals configured to connect a DC load, an input capacitance coupled between the input terminals, a switching circuit arranged between the input and the output, wherein the switching circuit is configured to enable a power flow P between the input and the output in a first operating mode (BM1) and to suppress a power flow P between the input and the output in a second operating mode (BM2), a measuring device configured to determine an input voltage U.sub.in applied to the input and/or an input current I.sub.in flowing at one of the input terminals and, if applicable, additionally for determining a voltage U.sub.out applied to the output and/or a current I.sub.out flowing at one of the output terminals, and a control circuit configured to control the switching circuit and optionally the measuring device, wherein the control circuit is configured in connection with the switching circuit and the measuring device to carry out a method, comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode (BM1) and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode (BM2), detecting an input current I.sub.in flowing at the input and/or an input voltage U.sub.in applied to the input, comparing values of the input current I.sub.in and/or input voltage U.sub.in detected in the inactive time window with a current threshold value I.sub.TH or a voltage threshold value U.sub.TH, respectively, and signaling an arc presence criterion if the input current I.sub.in detected in the inactive time window falls below the current threshold value I.sub.TH and/or the input voltage U.sub.in detected in the inactive time window does not exceed the voltage threshold value U.sub.TH.

17. The circuit arrangement as claimed in claim 16, wherein the switching circuit comprises a semiconductor switch arranged in one of the connection lines from one of the input terminals to one of the output terminals, wherein the semiconductor switch is free of a freewheeling diode, or wherein the semiconductor switch has an intrinsic freewheeling diode that is reverse-biased with respect to a normal current direction of the DC circuit.

18. The circuit arrangement as claimed in claim 16, wherein the circuit arrangement or the switching circuit of the circuit arrangement comprises a DC-DC converter.

19. A photovoltaic (PV) inverter, comprising: at least one input comprising two input terminals configured to connect a PV string as a DC source and an output for connection to an AC voltage (AC) grid, a DC-AC converter configured to convert a DC voltage to an AC voltage, and a circuit arrangement, an input of which is connected to the at least one input of the PV inverter and an output of which is connected to an input of the DC-AC converter, wherein the circuit arrangement comprises: the input comprising two input terminals configured to connect a DC source and the output comprising two output terminals configured to connect a DC load, an input capacitance coupled between the input terminals, a switching circuit arranged between the input and the output, wherein the switching circuit is configured to enable a power flow P between the input and the output in a first operating mode (BM1) and to suppress a power flow P between the input and the output in a second operating mode (BM2), a measuring device configured to determine an input voltage U.sub.in applied to the input and/or an input current I.sub.in flowing at one of the input terminals and, if applicable, additionally for determining a voltage U.sub.out applied to the output and/or a current I.sub.out flowing at one of the output terminals, and a control circuit configured to control the switching circuit and optionally the measuring device, wherein the control circuit is configured in connection with the switching circuit and the measuring device to carry out a method, comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode (BM1) and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode (BM2), detecting an input current I.sub.in flowing at the input and/or an input voltage U.sub.in applied to the input, comparing values of the input current I.sub.in and/or input voltage U.sub.in detected in the inactive time window with a current threshold value I.sub.TH or a voltage threshold value U.sub.TH, respectively, and signaling an arc presence criterion if the input current I.sub.in detected in the inactive time window falls below the current threshold value I.sub.TH and/or the input voltage U.sub.in detected in the inactive time window does not exceed the voltage threshold value U.sub.TH.

20. The PV inverter as claimed in claim 19, comprising a plurality of inputs for connecting a respective PV string as a DC source, wherein the inputs are each connected to a common DC link circuit in parallel with one another via a DC-DC converter each, and wherein the DC link circuit is connected to an input of the DC-AC converter, and comprising a plurality of the circuit arrangements, wherein each of the inputs of the PV inverter is connected to the respective input of a circuit arrangement assigned thereto, and wherein the output of each of the circuit arrangements is connected to the respective input of the DC-AC converter.

Description

BRIEF DESCRIPTION OF THE FIGURES

[0044] In the following, the disclosure is illustrated using figures. In the figures

[0045] FIG. 1 shows a DC circuit comprising a DC source, a DC load, and a circuit arrangement according to the disclosure in a first embodiment;

[0046] FIG. 2 shows a circuit arrangement according to the disclosure in a second embodiment;

[0047] FIG. 3 shows time profiles for input current and input voltage of a circuit arrangement according to the disclosure during the method according to the disclosure;

[0048] FIG. 4 shows time profiles for the operating mode, current and voltage of a circuit arrangement according to the disclosure during a further embodiment of the method according to the disclosure; and

[0049] FIG. 5 shows a PV system comprising a PV inverter according to the disclosure in one embodiment.

DETAILED DESCRIPTION

[0050] FIG. 1 shows a direct-current (DC) circuit 6 comprising a DC source 2 which has an internal resistance 2a, a DC load 3 and a circuit arrangement 1 according to the disclosure in a first embodiment. The circuit arrangement 1 has an input 7 comprising a first input terminal 7.1 and a second input terminal 7.2, to which input the DC source 2 is connected. The circuit arrangement 1 also has an output 8 comprising a first output terminal 8.1 and a second output terminal 8.2, the output 8 being connected to the DC load 3. Each of the input terminals 7.1, 7.2 is connected via a respective connection line 23, 24 to a corresponding one of the output terminals 8.1, 8.2. A switching circuit 10 is arranged between the input 7 and the output 8. The switching circuit 10 is designed or otherwise configured to enable a power flow P between the DC source 2 and the output 8 during a first operating mode BM1 and to suppress it during a second operating mode BM2. For example, a power flow P between the input 7 and the output 8 can be made possible by means of the switching circuit 10 during the first operating mode BM1 and prevented during the second operating mode BM2. For this purpose, the switching circuit 10 comprises at least one controllable switch, possibly also a plurality of controllable switches. The switches may be electromechanical switches, or semiconductor switches. In addition, the switching circuit 10 can also comprise one or more non-controllable semiconductor switches, for example, diodes. The switching circuit 10 is controlled by a control circuit 5. The circuit arrangement 1 also comprises a measuring device 4 that is designed or otherwise configured to measure an input voltage U.sub.in applied to the input 7 of the circuit arrangement 1 and/or an input current I.sub.in flowing via an input 7. In addition, the measuring device 4 can also be configured to measure an output voltage U.sub.out applied to the output 8 and/or an output current I.sub.out flowing via the output 8. The measuring device 4 is connected to the control circuit 5 for the purpose of communication and control. The circuit arrangement 1 further comprises an input capacitance 12 that is connected in parallel with the input 7 between the input terminals 7.1 and 7.2. The circuit arrangement 1 can optionally additionally comprise an output capacitance 11—illustrated by dashed lines in FIG. 1—that is connected in parallel with the output 8 between the output terminals 8.1 and 8.2.

[0051] During operation of the circuit arrangement 1, a power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 is interrupted cyclically by the switching circuit 10, that is to say in a manner satisfying a rule and repeatedly. A power flow P between the DC source 2 and the output 8 therefore takes place discontinuously, with—as explained below in connection with FIG. 4—active time windows 31 with a first period Δt.sub.1 alternating with inactive time windows 32 with a second period Δt.sub.2. During the active time window 31, a power flow P different from 0 thus takes place between the DC source 2 and the output 8, with the power flow P taking the value of 0 in the inactive time windows 32. The control circuit 5 is configured to selectively signal an arc presence criterion that indicates the presence of an arc 9, for example, a series arc.

[0052] FIG. 2 shows a circuit arrangement 1 according to the disclosure in a second embodiment. It is similar in some components to the first embodiment already described in FIG. 1, which is why reference is made to the descriptions under FIG. 1 for the matching features. Primarily the differences between the second embodiment and the first embodiment are explained below.

[0053] According to the second embodiment, the switching circuit 10 is configured as a DC-DC converter 21, for example, a step-up converter, to convert an input voltage U.sub.in applied to the input 7 to an output voltage U.sub.out applied to the output 8. For this purpose, the switching circuit 10 of the circuit arrangement 1 comprises an inductance 22 and a first semiconductor switch S.sub.1 connected in series therewith within the first connection line 23 between the first input terminal 7.1 and the first output terminal 8.1. A second semiconductor switch S.sub.2 is connected by way of its first terminal to a connection point 25 between the inductance 22 and the first semiconductor switch S.sub.1 and connected by way of its second terminal to the second connection line 24. The first semiconductor switch S.sub.1 and the second semiconductor switch S.sub.2 may each comprise an intrinsic or separately formed freewheeling diode D.sub.1 or D.sub.2, illustrated using dashes in FIG. 2.

[0054] During the first operating mode BM1, in other words in the active time window 31 shown below in FIG. 3 or FIG. 4 with the first period Δt.sub.1, the circuit arrangement 1 operates as a step-up converter and converts the input voltage U.sub.in to a larger output voltage U.sub.out relative to the input voltage U.sub.in by means of suitable clocking of the first S.sub.1 and optionally the second semiconductor switch S.sub.2. In this case, the output voltage U.sub.out is advantageously selected in such a way that it is greater than an open circuit voltage U.sub.0 of a DC source 2 (not shown in FIG. 2) connected to the input 7. An energy associated with the output voltage U.sub.out is temporarily stored in an output capacitance 11 arranged in parallel with the output 8. In the second operating mode BM2, that is to say in the inactive time window 32 with the second period Δt.sub.2, illustrated below in FIG. 3 and FIG. 4, the clocking of the semiconductor switches S.sub.1, S.sub.2 is interrupted by the control circuit 5. The semiconductor switches S.sub.1, S.sub.2 are both permanently open during the second operating mode BM2. The second period Δt.sub.2 can last for a few clock cycles of the DC-DC converter 21. Since the voltage U.sub.out applied to the output 8 is now selected in such a way that it is greater than the open circuit voltage U.sub.0 of the DC source 2 connected to the input, the freewheeling diode D.sub.1, which may be present and associated with the first semiconductor switch S.sub.1, blocks a current flow between the first input terminal 7.1 to the first output terminal 8.1, and thus a power flow P from the DC source 2 to the output 8 of the circuit arrangement 1.

[0055] Using the control circuit 5, the circuit arrangement 1 is set in an alternating manner during the first period Δt.sub.1 to the first operating mode BM1 and during the second period Δt.sub.2 to the second operating mode BM1, which generates a discontinuous power flow P from the DC source 2 to the output 8 of the circuit arrangement 1.

[0056] In FIG. 3 input current profiles 33, 34 and input voltage profiles 36, 37 of a circuit arrangement 1 according to the disclosure are shown over time during the method according to one embodiment of the disclosure. According to the disclosure, the power flow P between the input 7 and the output 8 is interrupted cyclically by the switching circuit 10 of the circuit arrangement 1 according to the disclosure and there is thus a cyclical change between active time windows 31 and inactive time windows 32.

[0057] In the event that there is no arc 9, the result is the input current profile 33 shown and the input voltage profile 36 shown. First, during the first active time window 31, there is a power flow P between the input 7 and the output 8 and a constant input current I.sub.in associated therewith and a constant input voltage U.sub.in associated therewith. The value of the input voltage U.sub.in results in this case from the value of the open circuit voltage U.sub.0 of the DC source 2 reduced by a voltage drop across the internal resistance 2a.

[0058] During the inactive time window 32, the power flow P between the input 7 and the output 8 is interrupted by the switching circuit 10 such that the input current I.sub.in can only flow from the DC source 2 to the input capacitance 12 in order to charge it. As a result of the current value decreasing in accordance with an e-function during this charging process, the voltage drop across the internal resistance 2a of the DC source 2 is also reduced accordingly so that the input voltage U.sub.in increases. With a correspondingly long period Δt.sub.2 of the inactive time window 32, the input capacitance would be charged to the value of the open circuit voltage U.sub.0 of the DC source 2, in which case the input current would then take a value of 0 A, with the result that no more voltage would drop across the internal resistance 2a of the DC source 2 and, accordingly, an input voltage U.sub.in at the level of the open circuit voltage U.sub.0 of the DC source 2 would arise.

[0059] In the example shown in FIG. 3 of a method according to the disclosure for detecting an arc, the period Δt.sub.2 of the inactive time window 32 is, however, only selected to be long enough for the input current I.sub.in to not become completely zero, but is only reduced to such an extent that an arc 9 that may be present is reliably quenched. The input voltage U.sub.in accordingly does not rise to a value of the open circuit voltage U.sub.0 of the DC source 2, but to a lower value, as shown in FIG. 3.

[0060] Selecting a period Δt.sub.2 as short as possible for the inactive time window 32 can be done, for example, also with regards to the fact that the period for the interruption of the power flow P between the input 7 and the output 8 present during the inactive time window 32 can be kept as short as possible.

[0061] After the period Δt.sub.2 of the inactive time window 32, a power flow P between the input 7 and the output 8 is again made possible in the following next active time window 31 by the switching circuit 10, such that, as can be seen in FIG. 3, the input current I.sub.in increases again and the input voltage U.sub.in decreases again, in order to then take the constant values associated with the power flow P as in the first active time window 31 after the transient processes have ended.

[0062] The input current profile 34 for the case that an arc 9 is present also shows the falling profile that occurs in the course of the charging of the input capacitance 12 in the inactive time window 32, with the arc 9 then being quenched when the current value is sufficiently low and, as a result, the input current I.sub.in abruptly becoming zero and also remaining at a value of zero after a power flow P between the input 7 and the output 8 in the subsequent active time window 31 is made possible again by the switching circuit 10. As a result of the fact that, as described above, in the event that no arc 9 is present, in the method according to the disclosure the input current I.sub.in is not reduced to zero, the presence of an arc 9 can be detected and an arc presence criterion can be signaled by comparing the values of the input current I.sub.in with a current threshold I.sub.TH.

[0063] The input voltage profile 37 in the event that an arc 9 is present also shows an increase in the inactive time window 32, but this is less of an increase than in the input voltage profile 36 in the event that no arc 9 is present. In particular, after the arc 9 has been quenched, based on the resulting value of the input current I.sub.in from 0 A, there is no further charging of the input capacitance 12. Due to the lower increase in the input voltage U.sub.in when an arc 9 is present than in the case that no arc 9 is present, in the inactive time window 32 the presence of an arc 9 can be detected and an arc presence criterion can be signaled by comparing the values of the input voltage U.sub.in with a voltage threshold U.sub.TH. After a power flow P to the output 8 via the switching circuit 10 is again possible in the subsequent active time window 31, the input capacitance 12 is discharged via the switching circuit 10 through the DC load 3, such that the input voltage U.sub.in in the input voltage profile 37 falls to a value of zero with increasing time.

[0064] In one embodiment, fixed, empirically determined values can be used for the current threshold I.sub.TH and the voltage threshold U.sub.TH. In one embodiment, however, the voltage threshold U.sub.TH can be selected in relation to the open circuit voltage U.sub.0 of the DC source 2. Since the open circuit voltage U.sub.0 of the DC source 2 may also be subject to greater fluctuations, for example, in a PV generator due to changes in external influences such as irradiation or temperature, in one embodiment a voltage threshold U.sub.TH that is variable, possibly adjusted adaptively depending on, for example, a time-varying open circuit voltage U.sub.0(t), can be used.

[0065] The deviating values of the input currents I.sub.in in the input current profiles 34 and 35 in the first active time window 31 in FIG. 3 result from the different power flow P due to the power losses that occur due to the arc 9.

[0066] The period Δt.sub.2 of the inactive time window 32 can, as mentioned, be selected to be long enough for the input current I.sub.in to not be completely zero, but only reduced to such an extent that an arc 9 that may be present is reliably quenched. In one embodiment of the method according to the disclosure, in which the evaluation is carried out based solely on the input voltage U.sub.in, the period Δt.sub.2 of the inactive time window 32 can, however, also be selected in such a way that the input current I.sub.in takes on values of zero or close to zero. In that case, due to the higher values in the input voltage profile 36 and the resulting larger difference with respect to the input voltage profile 36, the possible presence of an arc can be more clearly inferred than if a shorter period Δt.sub.2 is selected.

[0067] In one embodiment, the period Δt.sub.2 of the inactive time window 32 can be set based on empirically determined values. In order to ensure reliable arc detection even with possible fluctuations in the power flow P, and in particular also to keep the period Δt.sub.2 of the inactive time window 32 as short as possible, in one embodiment the period Δt.sub.2 is set adaptively and is selected, for example, depending on detected values of a current I characterizing the power flow P and/or a voltage U characterizing the power flow P of the immediately preceding active time window 31. Alternatively, the period Δt.sub.2 can be selected depending on the values of the input current I.sub.in detected in the current or one of the preceding inactive time windows 32 and/or the values of the input voltage U.sub.in detected in the current or one of the preceding inactive time windows 32. In one embodiment, for example, the period Δt.sub.2 of the inactive time window 32 can be determined in that a value of the input current I.sub.in falls below a further current threshold value I.sub.TH2 and a value of the input voltage U.sub.in exceeds a further voltage threshold value U.sub.TH2. With adaptive setting of the period Δt.sub.2 of the inactive time window 32, maximum and/or minimum values for the period Δt.sub.2 can also be specified.

[0068] In one embodiment fixed, empirically determined values can be used for the further current threshold value I.sub.TH2 and the further voltage threshold value U.sub.TH2, with the further voltage threshold value U.sub.TH2 selected in relation to the open circuit voltage U.sub.0 of the DC source 2. A further voltage threshold U.sub.TH2 that is variable, possibly adjusted adaptively depending on, for example, a time-varying open circuit voltage U.sub.0(t), can also be used in one embodiment. In general, the further current threshold value I.sub.TH2 and the further voltage threshold value U.sub.TH2 may each be selected to be greater than the current threshold value I.sub.TH and the voltage threshold value U.sub.TH.

[0069] FIG. 4 shows, below one another, time profiles for operating modes BM1, BM2 of the switching circuit 10 of the circuit arrangement 1 (upper graph), as well as current I(t) (middle graph) and voltage U(t) (lower graph) of the circuit arrangement 1 from FIG. 2 during another embodiment of the method according to the disclosure. The time profiles of current and voltage each involve, for example, variables I.sub.in(t), U.sub.in(t) detected by the measuring device 4 at the input 7 of the circuit arrangement 1. In this case, the time profiles reflect the behavior of the circuit arrangement 1 in close temporal proximity to a series arc 9 that ignites at the time to. In contrast to the previously described FIG. 3, the input current profile 35 and the input voltage profile 38 in FIG. 4 are shown only schematically, in that in each case only the value of the input current I.sub.in or the input voltage U.sub.in arising after the transient processes have ended is specified.

[0070] As illustrated in the upper graph, active time windows 31 of the period Δt.sub.1 in which the circuit arrangement 1 is in the first operating mode BM1, alternate with inactive time windows 32 of the period Δt.sub.2 in which the circuit arrangement is in the second operating mode BM2. In the first active time window 31, the current I.sub.in (t) takes the value I.sub.1 and the voltage U.sub.in (t) takes the value U.sub.1. The values of the current I.sub.1 and the voltage U.sub.1 result from the power consumption of the DC load 3 connected to the output 8 of the circuit arrangement 1. In the immediately adjacent inactive time window 32, the power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 is interrupted for the second period Δt.sub.2. The current I.sub.in (t) flowing via the input 7 decreases, as explained above in connection with FIG. 3, to a value close to 0 A, while the voltage U.sub.in(t) applied to the input 7 increases to a value close to the open circuit voltage U.sub.0 of the DC source 2. The open circuit voltage U.sub.0 is usually higher than the voltage U.sub.1 of the loaded DC source 2 due to the present internal resistance 2a of the real DC source 2, for example, a PV generator. In the next active time window 31, in this case the second active time window 31, the current I.sub.in(t) first corresponds to the value of the preceding active time window 31 up to the time to at which the arc 9 in the DC circuit 6, for example, between the DC source 2 and the input of the circuit arrangement 1, ignites. From the time t.sub.0, there is a sudden slight drop in the current values, and possibly also the voltage, from the original values I.sub.1, U.sub.1 to the values I.sub.2, U.sub.2. The sudden drop in current is based on a power loss and an associated voltage drop of a series arc 9 starting from to. For example, the series arc 9 burns across a microgap in a broken conductor. In the adjoining inactive time window 32, the series arc 9 is quenched by the power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 being interrupted again. The current I.sub.in (t) flowing via the input 7 initially falls again to a value close to 0 A, which quenches the arc and consequently the current I.sub.in (t) takes the value of 0 A. Although the voltage U.sub.in(t) applied to the input 7 in the second inactive time window 32 still increases compared to the voltage U.sub.2 present in the immediately preceding second active time window 31, as explained above in connection with FIG. 3, it reaches a lower value than in the preceding first inactive time window 32. In the subsequent third active time window 31, a power flow P through the switching circuit 10 is in principle possible, but it is now prevented by the microgap, which is why the values of voltage U.sub.in (t) and current I.sub.in (t) in FIG. 3 are shown as negligibly low.

[0071] The control circuit 5 now compares the values of current I.sub.in(t) and/or voltage U.sub.in(t) of the active time window 31 detected by the measuring device 4 with the values of the respectively preceding active time window 31. When comparing the values between the second active time window 31 and the third active time window 31, in FIG. 4, the control circuit 5 determines a difference between these values that exceeds a threshold value and signals an arc presence criterion in response thereto. In response to the signaling of the arc presence criterion, possibly in conjunction with other arc presence criteria, which have been determined, for example, as described in connection with FIG. 3, the switching circuit 10 remains in the second operating mode BM2 until manual acknowledgement by a qualified person, with a power flow P between the DC source 2 and the output 8 being suppressed.

[0072] FIG. 5 shows a photovoltaic (PV) system 47 comprising a PV inverter 40 according to the disclosure in one embodiment. The PV inverter 40 is configured as a multi-string inverter comprising several (in this case as an example: two) DC-side inputs 43 comprising input terminals 43.1 and 43.2 for connecting each a PV string 45 as a DC source 2. Each of the inputs 43 is connected in parallel with a link circuit capacitance of a common DC link circuit 42 via a respective DC-DC converter 21, for example via a step-up converter. The link circuit capacitance is connected to an input of a DC-AC converter 41. The output of the DC-AC converter 41 is connected to an AC voltage (AC) grid 46 via an output 44 of the PV inverter 40 via corresponding AC isolating elements (not shown in FIG. 4).

[0073] The PV inverter 40 comprises a circuit arrangement 1 for each of the DC-side inputs 43. The circuit arrangements 1, for example, the switching circuits 10 thereof, are in this case each configured as DC-DC converters and are at least partially formed by the DC-DC converters 21 of the PV inverter 40 that are present anyway. The inputs 7 of the circuit arrangements 1 correspond here to the inputs 43 of the PV inverter 40. The outputs 8 of the circuit arrangements 1 each correspond here to the outputs of the DC-DC converter 21. The circuit arrangements 1 comprise a common control circuit 5 that is part of a central control circuit of the PV inverter 40 here and is configured to control the DC-DC converter 21 and the DC-AC converter 41. The measuring devices 4 of the circuit arrangements 1 are also part of the DC-DC converter 21 and are not explicitly illustrated in FIG. 5.

[0074] The method according to the disclosure is carried out via the control circuit 5 concurrently for each DC source 2 configured as a PV string 45. Each of the PV strings 45 therefore has a discontinuous power flow P within its respective DC lines between the PV modules and the corresponding DC-side input 43 of the PV inverter 40 during normal operation of the PV inverter 40. In this embodiment, active time windows 31 with a first period Δt.sub.1 alternate with inactive time windows 32 with a second period Δt.sub.2. The discontinuous power flow P within the two PV strings 45 can advantageously take place here in such a way that there is as little overlap as possible between the inactive time windows 32 of one PV string 45 and the inactive time windows of the other PV string 45, that is to say the inactive time windows are offset from each other as far as possible. If an arc 9, in particular a series arc, is now determined within one of the PV strings 45 by means of the control circuit 5, only that switching circuit 10, that is to say that DC-DC converter 21, which is assigned to that PV string 45 in which the series arc 9 was also detected is set to the second operating mode BM2 for a longer period—and possibly until a manual acknowledgement by a qualified person. In contrast, the respective other PV string 45 can continue to be operated with a discontinuous power flow P in the direction of its associated DC-side input 43.