Method for evaluating semiconductor wafer
10054554 ยท 2018-08-21
Assignee
Inventors
Cpc classification
G01N21/8851
PHYSICS
G01N2021/8867
PHYSICS
H01L22/00
ELECTRICITY
International classification
G01N21/00
PHYSICS
Abstract
A method for evaluating a semiconductor wafer includes detecting semiconductor wafer LPDs as an examination sample in two measurement modes, performing size classification of the LPDs, calculating a distance between detection coordinates and a relative angle in the two measurement modes, presetting determination criteria to determine each LPD as a foreign matter or killer defect in accordance with each classified size, detecting semiconductor wafer LPDs as an evaluation target in the two measurement modes, performing size classification of the LPDs as the evaluation target, calculating a distance between detection coordinates and a relative angle of the evaluation target, and classifying the LPDs detected on a surface of the evaluation target into the killer defect and the foreign mater based on a result of the calculation and the determination criteria. The method enables classifying all LPDs from which quantitative size information cannot be provided, into the killer defect and foreign matter.
Claims
1. A method for evaluating a semiconductor wafer by which LPDs on a surface of a semiconductor wafer are detected with the use of a laser surface inspection apparatus and the detected LPDs are classified into a crystal defect on the surface of the semiconductor wafer and a foreign matter on the surface of the semiconductor wafer, comprising steps of: detecting the LPDs on the surface of a semiconductor wafer as an examination sample in two measurement modes of the laser surface inspection apparatus, the two measurement modes consisting of low-angle incidence/low-angle detection (DWO) and low-angle incidence/high-angle detection (DNO); performing size classification based on size information of the LPDs detected in the two measurement modes; calculating, from detection coordinates of each LPD detected in the two measurement modes, a distance between the detection coordinates and a relative angle to a wafer center in the two measurement modes; presetting, in accordance with each classified size, determination criteria to determine each LPD having the distance between the detection coordinates and the relative angle in the two measurement modes which fall within a predetermined range as a foreign matter and to determine any LPD other than the LPD falling in the predetermined range as a killer defect which is a defect of the semiconductor wafer as an examination sample; detecting the LPDs of a semiconductor wafer as an evaluation target in the two measurement modes; performing size classification based on size information of the LPDs detected in the two measurement modes as to the semiconductor wafer as the evaluation target; calculating, from detection coordinates of each LPD detected in the two measurement modes, a distance between the detection coordinates and a relative angle to a wafer center in the two measurement modes as to the semiconductor wafer as the evaluation target; and classifying the LPDs detected on a surface of the semiconductor as the evaluation target into the killer defect and the foreign matter based on a result of the calculation and the determination criteria.
2. The method for evaluating a semiconductor wafer according to claim 1, wherein the semiconductor wafer as the examination sample and the semiconductor wafer as the evaluation target are epitaxial wafers.
3. The method for evaluating a semiconductor wafer according to claim 1, wherein the semiconductor wafer as the evaluation target is used as a material of a silicon-on-insulator wafer.
4. The method for evaluating a semiconductor wafer according to claim 2, wherein the semiconductor wafer as the evaluation target is used as a material of a silicon-on-insulator wafer.
5. The method for evaluating a semiconductor wafer according to claim 1, wherein the killer defect is an epitaxial defect having a square pyramid shape.
6. The method for evaluating a semiconductor wafer according to claim 2, wherein the killer defect is an epitaxial defect having a square pyramid shape.
7. The method for evaluating a semiconductor wafer according to claim 3, wherein the killer defect is an epitaxial defect having a square pyramid shape.
8. The method for evaluating a semiconductor wafer according to claim 4, wherein the killer defect is an epitaxial defect having a square pyramid shape.
9. The method for evaluating a semiconductor wafer according to claim 1, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
10. The method for evaluating a semiconductor wafer according to claim 2, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
11. The method for evaluating a semiconductor wafer according to claim 3, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
12. The method for evaluating a semiconductor wafer according to claim 4, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
13. The method for evaluating a semiconductor wafer according to claim 5, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
14. The method for evaluating a semiconductor wafer according to claim 6, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
15. The method for evaluating a semiconductor wafer according to claim 7, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
16. The method for evaluating a semiconductor wafer according to claim 8, wherein, at the time of setting the determination criteria, whether the detected LPD is the killer defect is confirmed with the use of an evaluation method different from the evaluation method using the DWO and the DNO.
Description
BRIEF DESCRIPTION OF DRAWINGS
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BEST MODE(S) FOR CARRYING OUT THE INVENTION
(13) The present invention will now be described hereinafter in detail.
(14) As described above, there has been demanded a method for evaluating a semiconductor wafer which enables soring a killer defect and a foreign matter from all LPDs including a saturation LPD from which quantitative size information cannot be obtained.
(15) To achieve the object, the present inventor conducted the earnest examinations. As a result, the present inventor has found out that the method for evaluating a wafer which utilizes coordinate information of an LPD provided by DWO and DNO in addition to size information of the LPD provided by the DWO and the DNO can solve the problem, thereby bringing the present invention to completion.
(16) Although an embodiment according to the present invention will now be specifically described hereinafter, the present invention is not restricted thereto.
(17)
(18) First, a sample for preliminary examination (a semiconductor wafer which is an examination sample) is prepared (
(19) Then, the target sample is measured by using a laser surface inspection apparatus (
(20) As the laser surface inspection apparatus used in this example, one having the two measurement modes can suffice. Thus, one provided with an incidence system having at least one type of incidence angle and a detection system having two types of detection angles can suffice. In this case, incidence at the one type of incidence angle is low-angle incidence having an incidence angle which is a predetermined angle (e.g., 30) or less, and detection at a higher one of the two types of detection angles is high-angle detection whilst detection at the other is low-angle detection.
(21) Size classification is performed based on size information of each LPD detected in the two measurement modes (
(22) Then, as to all the LPDs detected in
(23) Then, determination criteria which determine an LPD whose distance between detection coordinates and whose relative angle in the two measurement modes fall within a predetermined range as a foreign matter and also determine any other LPD than the LPD falling in the predetermined range as a killer defect which is a defect of the semiconductor wafer are preset in accordance with each classified size.
(24) At this time, it is preferable to confirm whether a detected LPD is a killer defect by an evaluation method different from the evaluation method using the DWO and the DNO, especially a different evaluation method having a high determination accuracy (
(25) The determination criteria can be set by, e.g.,
(26) First, the relationship between the relative angle .sub.2 of the detection coordinate of the LPD provided by the DWO relative to the detection coordinate of the LPD provided by the DNO, the position angle .sub.1 of the detection coordinate of the LPD provided by the DNO relative to the wafer center, and applicability of the killer defect obtained in
(27) Then, the relationship between the distance r.sub.2 between the detection coordinates of the LPD provided by the DWO and the DNO and the applicability rate of the killer defect obtained in
(28) Subsequently, an overlooking failure rate and an overkill rate when the determination criteria are used are calculated in each of the nine regions in
(29) Then, an overall loss index is calculated in each of the nine regions in
Overall loss index=Overlooking failure rateProduct value coefficient+Overkill ratematerial value coefficient(1)
(wherein the overlooking failure rate and the overkill rate are as described above, the product value coefficient is a coefficient determined in correspondence with a product value, and the material value coefficient is a coefficient determined in correspondence with a material value.)
(30)
(31) A final loss is calculated by integrating both a material loss produced due to the overkill and a failure loss in a subsequent process produced due to the overlooking failure. At that time, since there is a difference between the material value and the later product value, a value coefficient considering an influence is multiplied by each failure rate.
(32) Then, the determination criteria set in
(33) It is to be noted that, as the semiconductor wafer as an evaluation target, one which is the same type as the semiconductor wafer as the examination sample can suffice and, for example, an epitaxial wafer can be adopted. Further, such a semiconductor wafer as an evaluation target can be used as a material of an SOI wafer. When the wafer evaluated by the present invention is used as a material of the SOI wafer, generation of void defects in the SOI wafer can be suppressed.
(34) First, LPDs on the semiconductor wafer as an evaluation target are detected in the two measurement modes (
(35) Then, as to the semiconductor wafer as the evaluation target, size classification is performed based on size information of the LPDs detected in the two measurement modes (
(36) Subsequently, as to the semiconductor wafer as the evaluation target, a distance between detection coordinates and a relative angle to a wafer center in the two measurement modes are calculated from the detection coordinates of each LPD detected in the two measurement modes (
(37) In this manner, based on
(38) Then, based on a result of the calculation in
(39) In the laser surface inspection apparatus, high-speed scanning is performed while irradiating the wafer surface with a laser beam, and scattering light emitted from a foreign matter or a defect present on the surface is detected, thereby acquiring coordinate information or size information of this LPD. At that time, there is adopted a method for setting a plurality of detectors at different detection angle positions and comparing signal intensities from the detectors to discriminate a defect or a foreign matter. This method uses a phenomenon that a scattering direction of light is biased depending on a shape of the defect or the foreign matter. In the present invention, the LPD types are discriminated by using the signal intensities provided from the plurality of detectors as well as the difference information of the coordinates. This method is particularly effective when a shape of a target killer defect has characteristics of a square pyramid shape whose side length is approximately 100 to 200 m and whose height is approximately 0.2 to 2 m. Scattering at a wide angle occurs at a top portion of the defect and, on the other hand, scattering at a narrow angle close to a regular reflection angle occurs at a bottom portion of the square pyramid. As a result, a difference in signal intensity is produced between the high-angle detector and the low-angle detector, and a difference in detection coordinate due to a difference in horizontal distance between the top portion and the bottom portion is also produced. The defect having such characteristics in its shape has strong scattering intensity, and the scattering intensity often exceeds a quantification limit of each detector. In such a case, quantitative intensity information cannot be provided, and classification based on the coordinate information is rather effective. It is to be noted that the shape of the defect to which the present invention can be applied is not restricted to the square pyramid shape described in the foregoing example, and the present invention is effective to any defect as long as it is a defect which has an anisotropic aspect in which crystallinity of silicon is reflected and has a size of hundreds of microns in a horizontal direction.
EXAMPLES
(40) Although the present invention will now be more specifically described hereinafter with reference to an example and comparative examples, the present invention is not restricted to the following examples.
(41) A target manufacturing process is a manufacturing process of a silicon-on-insulator (SOI) wafer. Contents of this process are as follows. First, hydrogen ions are implanted into a material wafer (a silicon single crystal wafer) called a bond wafer having an oxide film formed thereon to form a fragile layer, then it is bonded to another material wafer called a base wafer, heat is applied to delaminate a part of the bond wafer, and transference to the base wafer is performed. Subsequently, a bonding heat treatment, a flattening treatment, a sacrificial oxidation treatment, and the like are carried out to provide an SOI wafer product. It is often the case that a polished wafer having a polished surface (a silicon single crystal wafer) is used as a base wafer material of the SOI wafer, and a product using an epitaxial wafer as its material is a target in this example. In the epitaxial wafer, a silicon layer is additionally grown by vapor phase epitaxial growth.
(42) In the epitaxial wafer, a square-pyramid-shaped defect (an epi-defect) whose side length is approximately 100 to 200 m and whose height is approximately 0.2 to 2 m is produced in a manufacturing process in some situations. This defect functions as a bonding inhibition factor in a bonding process, and produces an unbonded region called a void defect. In the final SOI product, when one or more void defects which exceed a fixed size are present, the entire wafer is considered to be defective, and hence the epi-defect is regarded as a critical killer defect.
(43) In the current example and comparative examples, killer defects were sorted from the epitaxial wafer as a material by using SP2 manufactured by KLA Tencor Corporation.
Example 1
(44) First, in accordance with
(45) Subsequently, based on
(46) Subsequently, based on
(47) Likewise, determination criteria were set to the regions other than the region h in
(48) Then, new other 5000 epitaxial wafers were prepared, acceptability was determined in units of wafer based on
(49) When SOI wafer products were brought to completion, final losses were examined. As a method for verifying a loss index, material wafers rejected in
Comparative Example 1
(50) 5000 epitaxial wafers for comparative examination which are expected to have the same quality as that in Example 1 were prepared, and measurement was carried out by the SP2 based on
(51) When SOT wafer products were brought to completion, final losses were examined. A value provided by dividing the number of the SOI wafer products having void failures due to epi-defects by the total number of original epitaxial wafers was determined as an overlooking failure rate, and a value provided by multiplying this rate by a product value coefficient was determined as a failure loss index. In this case, since all the epitaxial wafers were used as a material, the material loss index was zero, and the overall loss index=the failure loss index was determined.
Comparative Example 2
(52) A result when a part of the size information of the data of the SP2 was used for sorting by reanalyzing data in Comparative Example 1 was calculated and estimated. Specifically, setting to accept or reject each entire region was performed in each of the nine regions shown in
(53) At last, the overall loss indexes in Example 1, Comparative Example 1, and Comparative Example 2 were compared.
(54) It is to be noted that the present invention is not restricted to the embodiment. The embodiment is an illustrative example, and any example which has substantially the same structure and exerts the same functions and effects as the technical scope described in claims of the present invention is included in the technical scope of the present invention.