Detector for an electron multiplier

10054696 ยท 2018-08-21

Assignee

Inventors

Cpc classification

International classification

Abstract

A detector for an electron multiplier comprising: a substrate comprising a dielectric material, the substrate having a first face and an opposing second face; a charge collector provided adjacent the first face of the substrate; an anode within the substrate, the anode spaced from first face, such that the anode is capacitively coupled to the charge collector, so that charge incident on the charge collector generates an image charge on the anode; and a conduit contact, coupled to the anode and passing through the substrate to the second face of the substrate layer.

Claims

1. A detector for an electron multiplier comprising: a substrate comprising a dielectric material, the substrate having a first face and an opposing second face; a charge collector provided adjacent the first face of the substrate; an anode within the substrate, the anode spaced from the first face, such that the anode is capacitively coupled to the charge collector, so that charge incident on the charge collector generates an image charge on the anode; and a conduit contact, coupled to the anode and passing through the substrate to the second face of the substrate.

2. A detector as claimed in claim 1, wherein the dielectric material of the substrate comprises a dielectric layer forming the first face.

3. A detector as claimed in claim 2, wherein the anode is provided within the dielectric layer or at the edge of the dielectric layer.

4. A detector as claimed in claim 2, wherein the substrate comprises a ceramic layer forming the second face.

5. A detector as claimed in claim 4, wherein the anode is provided at the interface between the ceramic layer and the dielectric layer.

6. A detector as claimed in claim 1, wherein the spacing between the first face of the substrate and the anode is at most 1 mm.

7. A detector as claimed claim 1, wherein the conduit contact comprises a via portion passing through the substrate and a planar portion, on the second face of the substrate.

8. A detector as claimed in claim 1, comprising circuitry, coupled to the conduit contact, the circuitry arranged to read-out the image charge induced in the anode and comprising a processor arranged to determine the position of an electron avalanche incident on the charge collector, based on the detected charge.

9. A detector as claimed in claim 1, wherein the anode comprises a plurality of electrically isolated anode plates.

10. A detector as claimed in claim 9, wherein each anode plate is coupled to a separate conduit contact, and wherein the circuitry is further arranged to separately readout the image charge from each anode plate.

11. A detector as claimed in claim 10, wherein the circuitry is further arranged to readout the image charge induced in at least two anode plates simultaneously.

12. A detector as claimed in claim 10, wherein the processor is arranged to: compare the image charge simultaneously induced in neighboring anode plates; and determine the position of an electron avalanche incident on the charge collector based on the comparison.

13. A detector as claimed in claim 1, wherein the charge collector is a resistive layer.

14. A detector as claimed in claim 13, wherein the resistive layer has a sheet resistance of at least 250 kohm/square.

15. An electron multiplier comprising: means for initiating an electron avalanche in response to a single detected electron, the electron avalanche emitted in the same location as the single electron is detected; and a detector for detecting the electron avalanche and determining the position of the single electron from the detected position of the electron avalanche, the detector comprising: a substrate comprising a dielectric material, the substrate having a first face and an opposing second face; a charge collector provided adjacent the first face of the substrate; an anode within the substrate, the anode spaced from the first face, such that the anode is capacitively coupled to the charge collector, so that charge incident on the charge collector generates an image charge on the anode; and a conduit contact, coupled to the anode and passing through the substrate to the second face of the substrate.

16. The electron multiplier as claimed in claim 15, comprising a measurement chamber holding the means for initiating an electron avalanche in a vacuum.

17. The electron multiplier as claimed in claim 16, wherein the chamber is defined by a housing, the substrate forming at least part of the housing, such that the charge collector is held in the vacuum and the second face of the substrate is held outside the vacuum.

18. The electron multiplier as claimed in claim 15, further comprising: an electron converter having a first face and an opposing second face, the electron converter, arranged to receive a photon or other quanta at a first location on the first face, and, in response to a received photon or quanta, emit an electron from the first location on the second face, the electron emitted towards the means for initiating an electron avalanche.

Description

DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic representation a detector for an electron multiplier as described herein.

(2) FIG. 2 is a schematic representation of an electron multiplier according to the prior art.

DETAILED DESCRIPTION

(3) FIG. 1 shows a detector 100 for use in an electron multiplier 200 in accordance with one embodiment. Elements of the detector 100 are provided within the body of the rear cover 208 of the chamber 202.

(4) In the current embodiment, the detector 100 comprises a substrate layer 102. A first side 110 of the substrate layer 102 is arranged to be provided within the chamber 202 and hence within the vacuum. The opposite side 108 is arranged outside the chamber 202.

(5) A resistive layer 122 is provided over the vacuum side 110 of the substrate layer 102. The resistive layer 122 functions as a charge collector. An electron avalanche 214 incident on the resistive layer 122 causes a charge build up in the insulting layer 122.

(6) Anode plates 104a-d are embedded within the substrate layer 102, to form an anode 104 for the detector 100. The anode 104 should be spaced from the resistive layer 122 such that the charge collected as a result of the electron avalanche 214 capacitively induces an image charge on the anode plates 104.

(7) Conduit contacts 106a-d passing through the substrate layer 102 electrically connect the anode plates 104 to rear contacts 112a-d provided on the non-vacuum side 108 of the substrate 102. Each anode plate 104a-d and its associated conduit contact 106a-d and rear contact 108a-d are electrically isolated from the other anode plates 104a-d and contacts 106a-d, 108a-d. Therefore, the image charge induced on each anode plate 104 can be read out from the respective rear face contact 112.

(8) The substrate layer 102 and resistive layer 122 (alone or in combination) are used to provide the rear cover 208 of the vacuum chamber 202. In this way, the capacitive coupling can be optimized, without having to provide complicated contacts through the walls of the chamber 202.

(9) Read-out circuitry 114 is electrically coupled to the rear face contacts 112. The read-out circuitry 114 includes read-out contacts 116a-d and a processor (not shown). Each read-out contact 116 is arranged to detect the charge from a single rear face contact 112 and forward the charge to the processor. The processor analyses the measured charges to determine the location of the quanta 218 or particle that initiated the electron avalanche 214.

(10) The processor is able to differentiate between charges provided by the different anode plates 104. The processor includes information correlating each anode plate 104 to its location. When a quanta or particle 218 is incident directly over the center of an anode plate 104, the spreading of the charge from the electron avalanche 214 is such that the image charge is only induced in a single anode plate 104. When the quanta or particle is incident over the periphery of an anode plate 104, or between anode plates 104, the image charge will be induced in neighboring anode plates 104. The processor is able to compare the charge induced in neighboring anode plates 104 to determine the location of the quanta or particle 218.

(11) In this way, the detector 100 is able to detect and locate quanta or particle 218 strike events that are simultaneous or near simultaneous, and located in close proximity, provided the quanta or particles 218 do not induce an image charge on one or more common anode plates 104.

(12) In the current embodiment, the substrate layer 102 is formed by a layered structure. A ceramic layer 118 is provided at the non-vacuum side 108 of the substrate 102. The anode plates 104 are provided such that they are partially embedded in the ceramic layer 118 and partially project from the ceramic layer 118. A layer of dielectric material 120 is provided over the anode plates 104. The resistive layer 122 is then provided over the dielectric.

(13) To achieve the desired charge collecting performance, the resistive layer 122 should have a minimum sheet resistance of 250 kohm/square. In one example, the resistive layer has a sheet resistance of 500 kohm/square. In another example, the resistive layer has a sheet resistance of 750 kohm/square or 1 Mohm/square.

(14) It will be appreciated that although FIG. 1 only shows a single row of anode plates, the anode plates 104 can be of any suitable size. There may be any number of anode plates 104 (one or more), and the anode plates 104 may also be of any shape and arranged in any suitable pattern, with any suitable spacing between anode plates 104. For example, the anode plates may be square or circular and arranged in a square grid or in concentric circles. In general, the smaller the anode plates 104 and the closer the spacing, the better the spatial resolution of the detector 100.

(15) In some embodiments, the size of the anode plates 104 may be such that an image charge is induced on multiple plates 104, no matter where the electron avalanche 214 is absorbed by the resistive layer 122. In such embodiments, the signals from neighboring plates 104 are processed accordingly.

(16) The ceramic layer 118, dielectric layer 120 and resistive layer 122 can be made from any suitable materials.

(17) The minimum spacing of the anode plates 104 from the resistive layer 122 is dependent on the resistive material 122, dielectric material 120 and size of the anode plates 104. In one example, the anode plates 104 may be 0.5 mm from the resistive layer 122. This may be provided by a 0.5 mm thick dielectric layer.

(18) The anode plates 104 may be buried at any suitable position within the layered structure of the substrate 102. For example, they may be encased within the dielectric layer 120.

(19) In other embodiment, the substrate 102 may comprise a single material that achieves the desired capacitive performance and is able to form the rear cover 208 of the chamber 202.

(20) It will be appreciated that no matter what the structure of the substrate layer 102, the overall thickness of the substrate layer 102 can be any suitable value to obtain the desired vacuum in the chamber 202. In one example, the substrate 102 may be 2 mm thick.

(21) It will be appreciated that, although the embodiment shown in FIG. 1 shows rear contacts 112 provide on the non-vacuum face 108 of the substrate layer, the contacts 112 may be provided any suitable way. For example, they may be partially or wholly recessed into the non-vacuum face 108 of the substrate 102. In some embodiments, the rear face contacts may be omitted altogether and the read-out contacts 116 may couple directly to the conduit contacts 106.

(22) It will also be appreciated that any suitable read-out circuitry 114 may be used to detect and process the charges on the anode plates 104.

(23) The detector 100 described above may be used in any suitable type of electron multiplier 200. It will also be appreciated that the same principle can be applied to detect any other form of charge.

(24) It will further be appreciated that features which are described in different embodiments may be combined in a single embodiment. Similarly, where several features are described in combination in a single embodiment, such features may also be provided separately or in suitable sub-combinations.