Hybrid Multi-Level Power Converter with Inter-Stage Inductor

Abstract

The present document relates to a power converter comprising an inductor, a first stage, and a second stage. The first stage may be coupled between an input of the power converter and the inductor, and the first stage may comprise a first flying capacitor. The second stage may be coupled between the inductor and an output of the power converter, and the second stage may comprise a second flying capacitor. A second terminal of the first flying capacitor may be connected to a first terminal of the inductor, and a first terminal of the second flying capacitor may be connected to a second terminal of the inductor.

Claims

1. A boost power converter comprising an inductor, a first stage coupled between an input of the boost power converter and the inductor, wherein the first stage comprises a first flying capacitor, and a second stage coupled between the inductor and an output of the boost power converter, wherein the second stage comprises a second flying capacitor.

2. The boost power converter of claim 1, wherein a second terminal of the first flying capacitor is connected to a first terminal of the inductor, and a first terminal of the second flying capacitor is connected to a second terminal of the inductor.

3. The boost power converter of claim 2, wherein the second stage further comprises a reservoir capacitor, and the boost power converter is configured to alternately couple a first terminal of the reservoir capacitor to the first terminal of the second flying capacitor, or to a second terminal of the second flying capacitor.

4. The boost power converter of claim 3, wherein the second stage comprises a first switching element coupled between the output of the boost power converter and the second terminal of the second flying capacitor, a second switching element coupled between the second terminal of the second flying capacitor and an intermediate node, a third switching element coupled between the intermediate node and the first terminal of the second flying capacitor, and a fourth switching element coupled between the first terminal of the second flying capacitor and a reference potential, wherein the reservoir capacitor is coupled between the intermediate node and the reference potential.

5. The boost power converter of claim 3, wherein the first stage comprises a fifth switching element coupled between the second terminal of the first flying capacitor and the input of the boost power converter, a sixth switching element coupled between the input of the boost power converter and a first terminal of the first flying capacitor, and a seventh switching element coupled between the first terminal of the first flying capacitor and a reference potential.

6. The boost power converter of claim 3, wherein the boost power converter is configured to establish, in a demagnetizing state, a first demagnetizing current path from the input of the boost power converter, via the first flying capacitor, via the inductor, and via the second flying capacitor to the output of the boost power converter, and a second demagnetizing current path from the input of the boost power converter, via the first flying capacitor, via the inductor, and via the reservoir capacitor to a reference potential.

7. The boost power converter of claim 3, wherein the boost power converter is configured to establish, in a magnetizing state, a magnetizing current path from the input of the boost power converter, via the inductor, to a reference potential.

8. The boost power converter of claim 7, wherein the boost power converter is further configured to establish, in the demagnetizing state, a first current path from a reference potential, via the reservoir capacitor, via the second flying capacitor, to the reference potential, and a second current path from the input of the boost power converter, via the first flying capacitor, to the reference potential.

9. A method of operating a boost power converter comprising an inductor, a first stage with a first flying capacitor, and a second stage with a second flying capacitor, the method comprising coupling the first stage between an input of the boost power converter and the inductor, and coupling the second stage between the inductor and an output of the boost power converter.

10. The method of claim 9, wherein the second stage further comprises a reservoir capacitor, and the method comprises alternately coupling a first terminal of the reservoir capacitor to the first terminal of the second flying capacitor, or to a second terminal of the second flying capacitor.

11. The method of claim 10, wherein the method comprises establishing, in a demagnetizing state, a first demagnetizing current path from the input of the boost power converter, via the first flying capacitor, via the inductor, and via the second flying capacitor to the output of the boost power converter, and a second demagnetizing current path from the input of the boost power converter, via the first flying capacitor, via the inductor, and via the reservoir capacitor to a reference potential.

12. The method of claim 11, wherein the method comprises establishing, in a magnetizing state, a magnetizing current path from the input of the boost power converter, via the inductor, to a reference potential.

13. The method of claim 12, wherein the method comprises establishing, in the magnetizing state, a first current path from a reference potential, via the reservoir capacitor, via the second flying capacitor, to the reference potential, and a second current path from the input of the boost power converter, via the first flying capacitor, to the reference potential.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar or identical elements, and in which

[0049] FIG. 1 shows an exemplary power converter;

[0050] FIG. 2 shows current paths when the exemplary power converter is operated in a buck mode in a magnetizing state;

[0051] FIG. 3 shows current paths when the exemplary power converter is operated in a buck mode in a demagnetizing state;

[0052] FIG. 4 shows inductor current ripple for different conversion ratios for a conventional buck power converter and for the proposed multi-level hybrid power converter operated in buck mode;

[0053] FIG. 5 shows current paths when the exemplary power converter is operated in a buck mode in an alternative magnetizing state;

[0054] FIG. 6 shows current paths when the exemplary power converter is operated in a buck mode in an alternative demagnetizing state;

[0055] FIG. 7 shows current paths when the exemplary power converter is operated in a boost mode in a magnetizing state;

[0056] FIG. 8 shows current paths when the exemplary power converter is operated in a boost mode in a demagnetizing state;

[0057] FIG. 9 shows current paths when the exemplary power converter is operated in a boost mode in an alternative magnetizing state;

[0058] FIG. 10 shows current paths when the exemplary power converter is operated in a boost mode in an alternative demagnetizing state.

[0059] FIG. 11 shows a method for operating a buck power converter.

DETAILED DESCRIPTION

[0060] FIG. 1 shows an exemplary power converter 100 according to the teachings of the present document. The exemplary power converter 100 comprises an inductor 1, a first stage, and a second stage. The first stage is coupled between an input of the power converter 100 and the inductor 1, capacitor 2 is connected to a first terminal of the inductor 1, and a first terminal of the second flying capacitor 3 is connected to a second terminal of the inductor 1.

[0061] The first stage of the exemplary power converter 100 comprises a first switching element 11 coupled between the input of the power converter and the first terminal of the first flying capacitor 2. It further comprises a second switching element 12 coupled between the first terminal of the first flying capacitor 2 and an intermediate node. The power converter 100 further comprises a third switching element 13 coupled between the intermediate node and the second terminal of the first flying capacitor 2, and a fourth switching element 14 coupled between the second terminal of the first flying capacitor 2 and a reference potential. A reservoir capacitor 4 is coupled between the intermediate node and the reference potential. The power converter 100 controls the second switching element 12 and the third switching element 13 such that a first terminal of the reservoir capacitor 4 is alternately coupled to (a) the second terminal of the first flying capacitor 2, or (b) to a first terminal of the first flying capacitor 2. In other words, in the first stage, the first flying capacitor C.sub.F1 and the reservoir capacitor C.sub.R are alternately placed in series and in parallel, and therefore develop a voltage of V.sub.IN/2 across them, wherein V.sub.IN denotes the input voltage at the input of power converter 100.

[0062] As illustrated in FIG. 1, the second stage comprises a fifth switching element 15 coupled between the first terminal of the second flying capacitor 3 and the output of the power converter, a sixth switching element 16 coupled between the output of the power converter and a second terminal of the second flying capacitor 3, and a seventh switching element 17 coupled between the second terminal of the second flying capacitor 3 and a reference potential. Moreover, an output capacitor 5 is typically connected between the output of the power converter and the reference potential. In the second stage, the second flying capacitor 3 is periodically connected to the output voltage V.sub.OUT of the power converter, therefore determining its average voltage.

[0063] The proposed power converter 100 may be operated in a forward direction denoted as buck mode, in which power converter 100 regulates an output voltage at the output of the buck power converter which is smaller than an input voltage at the input of the buck power converter. The buck mode is illustrated using respective current flows in FIGS. 2, 3, 5, and 6.

[0064] In the buck mode, the proposed power converter 100 may operate with only two states without the need of regulating the voltage of its flying capacitors 2 and 3. Indeed, the voltages across the flying capacitors are inherently determined by the power converter operation as will be discussed in the following description. For example, the power converter may switch between a magnetizing state and a demagnetizing state.

[0065] FIG. 2 shows current paths (illustrated by respective arrows) when the exemplary power converter is operated in a buck mode in a magnetizing state D1. During the magnetizing state D1, the inductor is magnetized. The voltage of node X is V.sub.IN/2. The first 11 and the third 13 switching element are closed, and the second 12 and the fourth 14 switching element are open. Switching element 16 is closed and switching element 15 and 17 are open. Node Y is at a voltage 2V.sub.OUT. The inductor current is sourced by both the input voltage V.sub.IN via the first flying capacitor C.sub.F1 (at a voltage of V.sub.IN/2) and by the reservoir capacitor C.sub.R (charged at V.sub.IN/2). The second flying capacitor C.sub.F2 (at a voltage of V.sub.OUT) decouples node Y from the output of the power converter.

[0066] In other words, the first flying capacitor and the second flying capacitor are placed in series between V.sub.IN and the reference potential during D1, and in parallel during demagnetizing state D2.

[0067] FIG. 3 shows current paths when the exemplary power converter is operated in a buck mode in a demagnetizing state D2. During the demagnetizing state D2, the inductor is demagnetized by connecting node X to the reference potential and node Y to V.sub.OUT. The first flying capacitor C.sub.F1 is placed in parallel with the reservoir capacitor C.sub.R since S1 and S3 are open, and S2 and S4 are closed. The second flying capacitor C.sub.F2 in parallel with the output capacitor C.sub.OUT. S5 and S7 are closed, and S6 is open.

[0068] The charge balance of the flying and reservoir capacitors is guaranteed during the converter operation as the capacitors experience current flows with opposite directions during the two states D1 and D2. During the magnetizing state D1, the first flying capacitor C.sub.F1 and the second flying capacitor C.sub.F2 charge, while the reservoir capacitor C.sub.R discharges. During the demagnetizing state D2, C.sub.F1 and C.sub.F2 discharge, while C.sub.R charges. The relationship between input and output voltage is obtained by applying the volt-second balance principle (with D1=D and D2=1−D) to the inductor voltage v.sub.L:

[00001]$\begin{array}{cc}\frac{V_{OU\Gamma }}{V_{\mathrm{IN}}}=\frac{0.5.Math.D}{1+D}D\in \left[0,1\right]& \left(1\right)\end{array}$

[0069] The maximum theoretical input-to-output conversion ratio V.sub.OUT/V.sub.IN is 1/4 for D=1. FIG. 4 shows inductor current ripple ΔI.sub.L for different conversion ratios for a conventional buck power converter 410 (0<V.sub.OUT/V.sub.IN<1) and for the proposed multi-level hybrid power converter operated in buck mode 420 (0<V.sub.OUT/V.sub.IN<0.25). Because of the reduced inductor current ripple ΔI.sub.L, inductor core losses are significantly reduced for 0<V.sub.OUT/V.sub.IN<0.25.

[0070] Since the inductor is placed between the two stages, the average inductor current is reduced by the voltage conversion ratio of the second stage compared to topologies that use the inductor at the converter output. Therefore, for a given inductor, DCR losses are reduced by the square of the voltage conversion ratio of the second stage. The reduced current rating for the inductor also allows to reduce its physical dimensions.

[0071] Let us now examine the voltage rating of the FETs in the new converter. Devices with lower voltage rating have typically a better Figure of Merit (smaller specific resistance and smaller gate capacitance). In steady state conditions, the voltage rating for the devices of the new hybrid converter is: [0072] V.sub.IN/2 for S1, S2, S3, S4 [0073] V.sub.OUT for S5, S6, S7

[0074] The voltage rating is reduced compared to that of a conventional buck converter (requiring V.sub.IN-rated devices).

[0075] The operation of the power converter can be improved by allowing the flying capacitor of the second stage C.sub.F2 to further provide part of the load current. This can be achieved by introducing two additional operation states DP and DV. FIG. 5 shows current paths when the exemplary power converter is operated in a buck mode in an alternative magnetizing state DP. FIG. 6 shows current paths when the exemplary power converter is operated in a buck mode in an alternative demagnetizing state DV.

[0076] During state DP, C.sub.F2 is discharged to the output also during the magnetizing phase of the inductor (in the two-phase operation of FIGS. 3 and 4, this is limited to the demagnetizing state D2). During state DV, the charge on C.sub.F2 is balanced by charging it. The charge balance is also guaranteed for C.sub.F1 and C.sub.R as in the previously described two-phase operation of FIGS. 3 and 4.

[0077] In addition, phase DP can be used to reduce the drop of the output voltage when a transient load current has been applied. In a similar way operation phase DV can be inserted into the switching sequence to reduce output voltage overshoot, when load current is suddenly removed.

[0078] The duration of the phases DP and DV can be chosen in a way that limits the losses (non-adiabatic and conduction) due to the discharge current going from C.sub.F2 to C.sub.OUT.

[0079] Therefore, the magnetizing phase of the inductor can be split between states D1 and DP, while the demagnetizing phase can be split between states D2 and DV. The input-to-output voltage conversion ratio for two different example allocations of phase durations is reported below:

[00002]$$\begin{gathered} \begin{array}{cc}\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=\frac{3.Math.D}{10}D1=D,\mathrm{DP}=0,D2=\frac{1}{3},\mathrm{DV}=\frac{2}{3}-DD\in \left[0,\frac{2}{3}\right] \\ & \left(2\right)\end{array} \end{gathered}$$$\begin{array}{cc}\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=\frac{D}{3}D1=\mathrm{DP}=\frac{D}{2},D2=\mathrm{DV}=\frac{1-D}{2}D\in \left[0,1\right]& \left(3\right)\end{array}$

[0080] Therefore, in (2) and (3) the flying capacitor C.sub.F2 is connected to C.sub.our for a fixed duration (during DP and D2): 1/3 and 1/2 of the switching period, respectively. The corresponding charging phase for C.sub.F2 (during D1 and DV) is ⅔ or 1/2 of the switching period for cases (2) and (3), respectively. Therefore, the average C.sub.F2 discharge current is twice or equal to the corresponding charge current in cases (2) and (3), respectively. This results in reduced peak current in switch S5, reduced (40% and 33%, respectively) average inductor current, and a different theoretical maximum input-to-output conversion ratio V.sub.OUT/V.sub.IN (1/5 or 1/3, respectively). It should be noted that an operation with D close to 1 may only be considered theoretically, as the time interval for charge balancing of C.sub.F1 (and C.sub.F2) then approaches zero. From that the real-world maximum input-to-output conversion ratio typically remains V.sub.OUT/V.sub.IN<1/4.

[0081] As already mentioned, the proposed power converter may be denoted as “multi-level” power converter, indicating that the power converter is capable of generating more than two different voltages across this inductor. Specifically, the voltages across the inductor are: [0082] V.sub.IN/2−2V.sub.OUT during D1 [0083] V.sub.OUT during D2 [0084] V.sub.IN/2−V.sub.OUT during DP [0085] −2V.sub.OUT during DV.

[0086] The two converter stages may be integrated into a single converter unit, but alternatively also implemented inside separate units. As an example, switches S1-S4, the flying capacitor C.sub.F1 and the inductor L could become part of a pre-converter stage generating a PWM signal with an average level close to the required bus voltage. Its operation may be limited to compensate the variations of the converter input voltage (line regulation). Switches S5-S7 and the flying capacitor C.sub.F2, instead, can serve as a second stage that adapts its duty cycle to fine-tune the overall converter output voltage, i.e. handling the drop caused by variable load current (load regulation). The 2.sup.nd stage may even be combined with the POL (Point of Load), i.e. go into the package of a microprocessor. This is supported by the fact that capacitors can store ˜1000 times the energy of an inductor with the same volume, and by the fact that the switches need to handle only voltages in the range of the input voltage of the load. Therefore, the second stage could eventually become part of the microprocessor IC itself.

[0087] Finally, by inverting the roles of input and output ports the described topology can be used to perform an efficient boost power conversion with large conversion ratio. The magnetizing (de-magnetizing) phase in the buck operation becomes a de-magnetizing (magnetizing) phase in the boost operation. FIG. 7 shows current paths when the exemplary power converter is operated in a boost mode in a magnetizing state. FIG. 8 shows current paths when the exemplary power converter is operated in a boost mode in a demagnetizing state. The voltage on the flying capacitors C.sub.F1 and C.sub.F2 is V.sub.OUT/2 and V.sub.IN, respectively. During D1, the inductor is demagnetized and C.sub.F1 and C.sub.F2 discharge, while C.sub.R charges. During D2, C.sub.F1 and C.sub.F2 charge, while C.sub.R discharges. As for the buck operation, also for the boost operation it is possible to introduce two extra states as shown in FIGS. 9 and 10.

[0088] FIG. 11 shows 1100, a method for operating a buck power converter. The steps include 1110, providing a buck power converter, comprising an inductor, a first stage with a first flying capacitor, and a second stage with a second flying capacitor. The steps also include 1120, coupling the first stage between an input of the buck power converter and the inductor, and 1130, coupling the second stage between the inductor and an output of the buck power converter.

[0089] In summary, the proposed power converter offers the advantage that flying capacitor regulation is inherently achieved by the topology. That is, the voltage across the capacitors is defined by Kirchhoff Voltage Law (KVL) during the operation of the converter. Furthermore, the proposed power converter offers the following advantages: reduced voltage rating for MOSFET devices for the same input and output voltages, reduced losses associated to the inductor DCR (i.e. the direct current parasitic resistance DCR of the inductor) for the same output current, reduced current rating (thermal and saturation limit) for inductor, improved transient load response, and reduced peak input current ripple.

[0090] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and embodiment outlined in the present document are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.