ARRANGEMENT HAVING AN INSULATION MONITOR, AND IT SYSTEM

Abstract

An arrangement having an insulation monitor for an IT system and a discharge resistor for discharging a ground discharge capacitance of the IT system is provided. The arrangement has two Z diodes that are arranged back-to-back and connected in series with the discharge resistor. Each of the two Z diodes has a reverse voltage above a test voltage of the insulation monitor.

Claims

1. An arrangement comprising: an insulation monitor for an IT system; a discharge resistor configured for discharging a ground discharge capacitance of the IT system; and two Z diodes that are arranged back-to-back and connected in series with the discharge resistor, wherein each of the two Z diodes has a reverse voltage above a test voltage of the insulation monitor.

2. The arrangement of claim 1, further comprising an interference suppression capacitor arranged in parallel with a series circuit that includes the discharge resistor and the two Z diodes that are arranged back-to-back.

3. The arrangement of claim 1, wherein the discharge resistor is a first discharge resistor, wherein the arrangement further comprises a second discharge resistor that is arranged in parallel with the two Z diodes that are arranged back-to-back, and in series with the first discharge resistor, and wherein the second discharge resistor has a higher resistance value than the first discharge resistor, which is arranged in series with the two Z diodes that are arranged back-to-back.

4. The arrangement of claim 2, wherein the discharge resistor is a first discharge resistor, wherein the arrangement further comprises a second discharge resistor that is arranged in parallel with the two Z diodes that are arranged back-to-back, and in series with the first discharge resistor, and wherein the second discharge resistor has a higher resistance value than the first discharge resistor, which is arranged in series with the two Z diodes that are arranged back-to-back.

5. An IT system comprising: an arrangement comprising: an insulation monitor for an IT system; a discharge resistor configured for discharging a ground discharge capacitance of the IT system; and two Z diodes that are arranged back-to-back and connected in series with the discharge resistor, wherein each of the two Z diodes has a reverse voltage above a test voltage of the insulation monitor.

6. The IT system of claim 5, wherein the arrangement further comprises an interference suppression capacitor arranged in parallel with a series circuit that includes the discharge resistor and the two Z diodes that are arranged back-to-back.

7. The IT system of claim 5, wherein the discharge resistor is a first discharge resistor, wherein the arrangement further comprises a second discharge resistor that is arranged in parallel with the two Z diodes that are arranged back-to-back, and in series with the first discharge resistor, and wherein the second discharge resistor has a higher resistance value than the first discharge resistor, which is arranged in series with the two Z diodes that are arranged back-to-back.

8. The IT system of claim 6, wherein the discharge resistor is a first discharge resistor, wherein the arrangement further comprises a second discharge resistor that is arranged in parallel with the two Z diodes that are arranged back-to-back, and in series with the first discharge resistor, and wherein the second discharge resistor has a higher resistance value than the first discharge resistor, which is arranged in series with the two Z diodes that are arranged back-to-back.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIGS. 1, 2, and 3 each show a schematic circuit diagram of an embodiment.

DETAILED DESCRIPTION

[0018] Functionally same components are sometimes provided with same reference signs. Functionally same components are sometimes not identified in all figures and are also not explained separately again for each individual figure. It may be assumed, in principle, that these components in the different illustrations each have a substantially same function.

[0019] The embodiments shown schematically as a circuit diagram in each of FIGS. 1, 2 and 3 relate in each case to an arrangement ARG having an insulation monitor ISG for an IT system IST and a discharge resistor DCR for discharging a ground discharge capacitance TCP of the IT system IST.

[0020] The IT system IST is supplied with power using alternating current (AC phases L1, L2, L3). A common-mode choke CMC is used to limit the current in the IT system IST. The individual AC phases are each connected to a filter capacitor FTC in order to divert undesired frequencies to ground. This connection is interrupted when the arrangement ARG is operated in accordance with the present embodiments in the IT network. The alternating current is subsequently rectified by a B6 rectifier BSE. DC link capacitors CZK enable the removal of unwanted frequencies after rectification.

[0021] A load that is connected, for example, as a motor MTR with a shielded motor cable SCC to a circuit breaker IVT is connected at the output of the arrangement ARG.

[0022] The circuit diagram shows ground discharge capacitances TCP. These ground discharge capacitances TCP illustrate in this case the capacitance of the IT system IST with respect to ground PE and may also include interference suppression capacitors SPC. For the safe discharge of the ground discharge capacitances TCP, a discharge resistor DCR is provided on each of the DC lines (e.g., in parallel with the ground discharge capacitance TCP). In order that the insulation monitor ISG does not concomitantly measure these discharge resistors DCR during a test run with a test voltage TSV with alternating polarity, it is provided according to the present embodiments that in each case two Z diodes ZDI that are arranged back-to-back are connected in series SCT with the discharge resistor DCR, where the Z diodes ZDI each have a reverse voltage RBV above a test voltage TSV of the insulation monitor ISG.

[0023] The arrangement ARG, which is illustrated in simplified form in FIG. 2, is basically similar and provides a converter-controlled servo motor (e.g., a SINAMICS S210 servo drive system from Siemens). The converter CVT shown includes a power unit PBO and a control unit CTR. These components of the converter CVT are supplied with a rectified voltage by a 24 V power supply. An insulation monitor ISG is connected in the IT system IST shown in order to monitor ground faults between the ground PE and the AC phases L1, L2, L3.

[0024] For each component of the converter CVT, a respective ground discharge capacitance TCP is provided with a parallel-connected discharge resistor DCR. According to the present embodiments, in each case, two Z diodes ZDI that are arranged back-to-back are connected in series SCT with the discharge resistor DCR. The Z diodes ZDI each have a reverse voltage RBV above a test voltage TSV of the insulation monitor ISG. To avoid undetermined potentials between the series circuit SCT of the pair of Z diodes and the discharge resistor DCR, an additional discharge resistor DRA is arranged in series with the discharge resistor DCR. The additional discharge resistor DRA has a higher resistance value than the discharge resistor DCR arranged in series with the two Z diodes ZDI that are arranged back-to-back. The insulation monitor as a result only sees the higher resistance value of the additional discharge resistor DRA in each case. As a result of this, a rapid discharge is provided by the lower-resistance discharge resistor DCR.

[0025] The respective discharge resistor may be adjusted as required. According to the present embodiments, the resistance is blanked out for the insulation monitor ISG, or the resistance measured by the insulation monitor ISG is significantly increased compared to the actual discharge resistance. The adjustable measurement voltages of the insulation monitor ISG are typically between 10 V-60 V depending on the mode. This test voltage TSV is applied during the measurement with alternating polarity. The following table shows the measurement results with different combinations in DC power mode (e.g., measurement voltage of the Bender Isometer 685=50 V, configuration according to FIG. 1):

TABLE-US-00001 Discharge resistance Measured resistance of used [k] Z diodes used Isometer 685 [k] any any >10000 18 none 18 18 30 V Z diode 335 330 none 330 330 24 V Z diode 780 none 15 V Z diode 81

[0026] The measurement results show that the resistance measured using the insulation monitor increases significantly through the use of the Z diodes.

[0027] FIG. 3 schematically shows a circuit diagram of the arrangement ARG having an insulation monitor ISG for an IT system IST and a discharge resistor DCR for discharging a ground discharge capacitance TCP of the IT system IST in a basic configuration. The arrangement ARG and the function thereof correspond to that of FIG. 1 with the difference that the insulation monitor ISG is connected upstream of the common-mode choke CMC of the IT system IST. In this way, a larger area of the circuit shown is operated as an IT system and monitored using the insulation monitor ISG. The crossed-out line in the area of the three filter capacitors FTC symbolizes a line disconnection when the arrangement ARG is operated as an IT system IST.

[0028] Irrespective of the grammatical gender of a specific term, persons with male, female, or other gender identity are also included in this document.

[0029] The elements and features recited in the appended claims may be combined in different ways to produce new claims that likewise fall within the scope of the present invention. Thus, whereas the dependent claims appended below depend from only a single independent or dependent claim, it is to be understood that these dependent claims may, alternatively, be made to depend in the alternative from any preceding or following claim, whether independent or dependent. Such new combinations are to be understood as forming a part of the present specification.

[0030] While the present invention has been described above by reference to various embodiments, it should be understood that many changes and modifications can be made to the described embodiments. It is therefore intended that the foregoing description be regarded as illustrative rather than limiting, and that it be understood that all equivalents and/or combinations of embodiments are intended to be included in this description.