Method for transferring compound semiconductor single crystal thin film layer and method for preparing single crystal GaAs-OI composite wafer

Abstract

Provided are a method for transferring a compound semiconductor single crystal thin film layer and a method for preparing a single crystal GaAs—OI composite wafer, including: preparing a graphite transition layer on a first substrate; growing the compound semiconductor single crystal thin film layer on the graphite transition layer; preparing a first dielectric layer on the compound semiconductor single crystal thin film layer; preparing a second dielectric layer on a second substrate; combining the first substrate and the second substrate by bonding the first dielectric layer and the second dielectric layer; applying a lateral external pressure, such that the compound semiconductor single crystal thin film layer and the first substrate are transversely split at the graphite transition layer, and the compound semiconductor single crystal thin film layer is transferred to the second substrate.

Claims

1. A method for transferring a compound semiconductor single crystal thin film layer, comprising: preparing a graphite transition layer on a first substrate; growing the compound semiconductor single crystal thin film layer on the graphite transition layer, wherein the compound semiconductor single crystal thin film layer has the same lattice structure as the first substrate; preparing a first dielectric layer on the compound semiconductor single crystal thin film layer; preparing a second dielectric layer on a second substrate; combining the first substrate and the second substrate by bonding the first dielectric layer and the second dielectric layer; and applying a lateral external pressure, such that the compound semiconductor single crystal thin film layer and the first substrate are transversely split at the graphite transition layer, and the compound semiconductor single crystal thin film layer is transferred to the second substrate, wherein each of the first dielectric layer and the second dielectric layer is an Si.sub.3N.sub.4 layer, and the second dielectric layer serves as a buried insulating layer of the second substrate, wherein an SiO.sub.2 layer is further provided between the second substrate and the Si.sub.3N.sub.4 dielectric layer.

2. The method for transferring a compound semiconductor single crystal thin film layer of claim 1, wherein the first substrate is a single crystal GaAs substrate or a single crystal Ge substrate.

3. The method for transferring a compound semiconductor single crystal thin film layer of claim 2, wherein the compound semiconductor single crystal thin film layer is a GaAs single crystal thin film layer.

4. The method for transferring a compound semiconductor single crystal thin film layer of claim 1, wherein the second substrate is an Si substrate.

5. A method for preparing a single crystal GaAs—OI composite wafer, comprising: preparing an A wafer, comprising: preparing a graphite transition layer on a single crystal GaAs substrate or a single crystal Ge substrate; epitaxially growing a GaAs single crystal thin film layer on the graphite transition layer; and preparing a Si.sub.3N.sub.4 dielectric layer on the GaAs single crystal thin film layer; preparing a B wafer, comprising: preparing a SiO.sub.2 layer on a surface of a Si substrate; and preparing a Si.sub.3N.sub.4 dielectric layer on a surface of the SiO.sub.2 layer as a buried insulating layer; and preparing the single crystal GaAs—OI composite wafer, comprising: bonding the Si.sub.3N.sub.4 layer on a top layer of the A wafer and the Si.sub.3N.sub.4 layer on a top layer of the B wafer, such that the A wafer and the B wafer are closely combined; and applying a lateral external pressure onto the A wafer, such that the composite wafer is split transversely at the graphite transition layer, removing the single crystal GaAs substrate or the single crystal Ge substrate, and removing the graphite transition layer, thus the single crystal GaAs—OI composite wafer, which has a structure of a Si substrate, a SiO.sub.2 layer, a Si.sub.3N.sub.4 dielectric layer and a GaAs single crystal thin film layer arranged in sequence, is obtained.

6. The method for preparing a single crystal GaAs—OI composite wafer of claim 5, wherein, in the A wafer: a thickness of the graphite transition layer is 50-100 nm, a thickness of the GaAs single crystal thin film layer is 10-2000 nm, and a thickness of the Si.sub.3N.sub.4 layer is 100-400 nm.

7. The method for preparing a single crystal GaAs—OI composite wafer of claim 5, wherein, in the B wafer: a thickness of the Si.sub.3N.sub.4 layer is 100-400 nm.

8. The method for preparing a single crystal GaAs—OI composite wafer of claim 5, wherein, after the single crystal GaAs substrate or the single crystal Ge substrate and the graphite transition layer are split transversely and removed under the external pressure, the graphite transition layer remaining on the GaAs single crystal thin film layer is ground away by chemical etching and mechanical grinding and polishing methods to obtain a high-quality GaAs single crystal thin film layer surface.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1 is a flowchart of a method for transferring a compound semiconductor single crystal thin film layer disclosed in an embodiment of the present disclosure;

(2) FIG. 2 is a flowchart illustrating structure and preparation of an A wafer disclosed in an embodiment of the present disclosure;

(3) FIG. 3 is a flowchart illustrating structure and preparation of a first B wafer disclosed in an embodiment of the present disclosure;

(4) FIG. 4 is a flowchart illustrating structure and preparation of a second B wafer disclosed in an embodiment of the present disclosure;

(5) FIG. 5 is a flowchart illustrating structure and preparation of a first single crystal GaAs—OI composite wafer disclosed in an embodiment of the present disclosure;

(6) FIG. 6 is a flowchart illustrating structure and preparation of a second single crystal GaAs—OI composite wafer disclosed in an embodiment of the present disclosure.

(7) In the figures:

(8) 10: A wafer; 11: single crystal GaAs substrate; 12: graphite transition layer; 13: GaAs single crystal thin film layer; 14: Si.sub.3N.sub.4 dielectric layer;

(9) 20: B wafer; 21: Si substrate; 22: SiO2 layer; 23: Si3N4 layer;

(10) 30: single crystal GaAs—OI composite wafer; 31: Si substrate; 32: SiO.sub.2 layer; 33: Si.sub.3N.sub.4 layer; 34: GaAs single crystal thin film layer.

DETAILED DESCRIPTION

(11) In order to make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be described clearly and completely in combination with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, but not all embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative work shall fall within the protection scope of the present disclosure.

(12) In the description of the present disclosure, it should be noted that the orientation or positional relationship indicated by the terms “center”, “on”, “below”, “left”, “right”, “vertical”, “horizontal”, “inner”, “outer”, etc. is the orientation or positional relationship shown based on the drawings, and is only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation or be constructed and operated in a specific orientation, therefore they cannot be understood as a limitation to the present disclosure. In addition, the terms “first”, “second”, and “third” are for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

(13) In the description of the present disclosure, it should also be noted that, unless otherwise clearly specified and defined, the terms “mounting”, “connecting”, “connected” should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or it can be an internal communication between two components. For those of ordinary skill in the art, the specific meaning of the above terms in the present disclosure can be understood according to specific situations.

(14) The present disclosure will be further described in detail below with reference to the drawings.

(15) As shown in FIG. 1, the present disclosure provides a method for transferring a compound semiconductor single crystal thin film layer, including:

(16) S1: preparing a graphite transition layer on a first substrate; wherein,

(17) a layer of graphite transition layer is deposited on the first substrate by magnetron sputtering; the first substrate is preferably a single crystal GaAs substrate or a single crystal Ge substrate;

(18) S2: epitaxially growing the compound semiconductor single crystal thin film layer on the graphite transition layer, wherein the compound semiconductor single crystal thin film layer has the same lattice structure as the first substrate; wherein,

(19) when the first substrate is the single crystal GaAs substrate or the single crystal Ge substrate, the compound semiconductor single crystal thin film layer is a GaAs single crystal thin film layer; meanwhile, other compound semiconductor single crystal thin film layers and corresponding substrates may also be selected according to actual needs;

(20) S3: preparing a first dielectric layer on the compound semiconductor single crystal thin film layer; wherein,

(21) the first dielectric layer is a Si.sub.3N.sub.4 layer, a SiO.sub.2 layer, an Al.sub.2O.sub.3 layer or an AlN layer, preferably a Si.sub.3N.sub.4 layer;

(22) S4: preparing a second dielectric layer on a second substrate; wherein,

(23) the second substrate is a Si substrate, and the second dielectric layer is a Si.sub.3N.sub.4 layer, a SiO.sub.2 layer, an Al.sub.2O.sub.3 layer or an AlN layer, preferably a Si.sub.3N.sub.4 layer;

(24) S5: combining the first substrate and the second substrate by bonding the first dielectric layer and the second dielectric layer;

(25) S6: applying a lateral external pressure, such that the compound semiconductor single crystal thin film layer and the first substrate are transversely split at the graphite transition layer, and the compound semiconductor single crystal thin film layer is transferred to the second substrate.

(26) The present disclosure provides a method for preparing a single crystal GaAs—OI composite wafer based on the above transfer method, including: preparing an A wafer 10 with a GaAs single crystal thin film layer, preparing a B wafer 20 having a SOI substrate with a Si.sub.3N.sub.4 layer as a buried insulating layer thereof, and preparing the single crystal GaAs—OI composite wafer, i.e., C wafer.

(27) As shown in FIG. 2, the A wafer 10 of the present disclosure comprises a single crystal GaAs substrate 11, a graphite transition layer 12, a GaAs single crystal thin film layer 13 and a Si.sub.3N.sub.4 dielectric layer 14, the method for preparing the A wafer is as follows.

(28) A layer of graphite transition layer 12 is deposited on the single crystal GaAs substrate 11 or the single crystal Ge substrate by using a magnetron sputtering method, and a specific preparation method thereof is as follows:

(29) The graphite transition layer is prepared on a single crystal GaAs substrate or a Ge substrate by using a magnetron sputtering method. First, the graphite sheet is subjected to processes such as cutting, grinding, polishing, etc., then the powder on a surface of the graphite sheet is purged with nitrogen, and then the graphite sheet is placed in a vacuum environment at high temperature of about 1000° C. for 60 minutes, so that various impurities contained in the graphite sheet can be volatilized, thus the impurities on the surface and inside of the graphite sheet are further removed. After the above treatment, the purity of the graphite can reach to 99.99%, and a graphite transition layer 12 with a thickness of 50-100 nm is DC sputtered at a rate of 1.2 nm/min using the above high-purity graphite target material.

(30) The GaAs single crystal thin film layer 13 is epitaxially grown on the graphite transition layer 12; furthermore, the thickness of the GaAs single crystal thin film layer is 10-2000 nm, preferably 100-500 nm.

(31) The Si.sub.3N.sub.4 dielectric layer 14 is prepared on the GaAs single crystal thin film layer 13, and a specific preparation method thereof is as follows:

(32) Using several gases among N.sub.2, SiH.sub.4, NH.sub.3, HCl.sub.4, and H.sub.2Cl.sub.2 as reaction gases, the Si.sub.3N.sub.4 dielectric layer is prepared by a PECVD method in the temperature range of 300-500° C.

(33) As shown in FIG. 3, the B wafer 20 of the present disclosure comprises a Si substrate 21 and a Si.sub.3N.sub.4 layer 23, and the method for preparing the B wafer 20 is as follows.

(34) The Si.sub.3N.sub.4 dielectric layer 23 is prepared on a surface of the Si substrate 21 as a buried insulating layer, and a specific preparation method thereof is as follows.

(35) Using several gases among N.sub.2, SiH.sub.4, NH.sub.3, HCl.sub.4, and H.sub.2Cl.sub.2 as reaction gases, the Si.sub.3N.sub.4 dielectric layer is prepared by a PECVD method in the temperature range of 300-500° C.

(36) As shown in FIG. 4, the B wafer 20 of the present disclosure comprises a Si substrate 21, a SiO.sub.2 layer 22 and a Si.sub.3N.sub.4 layer 23, the method for preparing the B wafer is as follows.

(37) The SiO.sub.2 layer 22 is prepared on a surface of the Si substrate 21, and the Si.sub.3N.sub.4 dielectric layer 23 is prepared on a surface of the SiO.sub.2 layer 22; furthermore, the thickness of the Si.sub.3N.sub.4 layer is 100-400 nm.

(38) As shown in FIG. 5, the single crystal GaAs—OI composite wafer 30 of the present disclosure comprises a Si substrate 31, a Si.sub.3N.sub.4 dielectric layer 33, and a GaAs single crystal thin film layer 34, and the method for preparing the single crystal GaAs—OI composite wafer includes:

(39) Bonding the Si.sub.3N.sub.4 layer on a top layer of the A wafer 10 and the Si.sub.3N.sub.4 layer on a top layer of the B wafer 20 illustrated in FIG. 3 by means of interatomic force bonding, such that the A wafer and the B wafer are closely combined;

(40) Applying a lateral external pressure onto the A wafer, such that the composite wafer is split transversely at the graphite transition layer, removing the single crystal GaAs substrate or the single crystal Ge substrate, and removing the graphite transition layer, thus the single crystal GaAs—OI composite wafer, which has a structure of a Si substrate, a Si.sub.3N.sub.4 dielectric layer and a GaAs single crystal thin film layer arranged in sequence, is obtained;

(41) Grinding away the graphite transition layer remained on the GaAs single crystal thin film layer by chemical etching and mechanical grinding and polishing methods to obtain a high-quality GaAs single crystal thin film layer surface.

(42) As illustrated in FIG. 6, the single crystal GaAs—OI composite wafer 30 of the present disclosure comprises a Si substrate 31, a SiO.sub.2 layer 32, a Si.sub.3N.sub.4 dielectric layer 33, and a GaAs single crystal thin film layer 34, the method for preparing the single crystal GaAs—OI composite wafer includes:

(43) Bonding the Si.sub.3N.sub.4 layer on a top layer of the A wafer 10 and the Si.sub.3N.sub.4 layer on a top layer of the B wafer 20 illustrated in FIG. 4 by means of interatomic force bonding, such that the A wafer and the B wafer are closely combined;

(44) Applying a lateral external pressure onto the A wafer, such that the composite wafer is split transversely at the graphite transition layer, removing the single crystal GaAs substrate or the single crystal Ge substrate, and removing the graphite transition layer, thus the single crystal GaAs—OI composite wafer, which has a structure of a Si substrate, a Si.sub.3N.sub.4 dielectric layer and a GaAs single crystal thin film layer arranged in sequence, is obtained;

(45) Grinding away the graphite transition layer remained on the GaAs single crystal thin film layer by chemical etching and mechanical grinding and polishing methods to obtain a high-quality GaAs single crystal thin film layer surface.

(46) The present disclosure has the following advantages.

(47) The method for transferring a GaAs single crystal thin film layer and the method for preparing a GaAs—OI composite wafer provided by the present disclosure, can transfer the grown high-quality GaAs single crystal thin film layer to the Si-based substrate by means of dielectric layer bonding, and can realize the preparation of a high-quality, large-area, low-cost GaAs single crystal thin film layer on a SOI substrate, thereby promoting the industrial applications of semiconductor device on GaAs—OI. The epitaxial structure provided by the present disclosure takes into account the actual requirements of both epitaxial growth and device performance, and the thickness of each layer and the manufacturing process can be adjusted within a certain range according to specific materials and device parameters; and on the premise that epitaxial growth can be realized, the transfer of GaAs single crystal thin film layer and the preparation of the composite wafer are realized.

(48) The single crystal GaAs thin film of the present disclosure is epitaxially grown on the single crystal GaAs substrate or the single crystal Ge substrate, the single crystal Ge and the single crystal GaAs have the same lattice structure, the graphite is a multilayer reticular superimposed body formed by connecting and superimposing hexagonal carbon rings to each other, and the molecular layers are interconnected by Van der Waals force. During the epitaxy process, a sliding motion may occur between graphite monolayers, and the compressive stress inside the thin film is released, thus the lattice mismatch can be eliminated.

(49) In the present disclosure, the Si.sub.3N.sub.4 dielectric layer is used as both the buried insulating layer on the Si substrate and the dielectric layer on the single crystal GaAs thin film. This is not only because Si.sub.3N.sub.4 can replace SiO.sub.2 as the buried insulating layer due to the property of Si.sub.3N.sub.4, but also because the Si—Si bond of the Si.sub.3N.sub.4 dielectric and the single crystal Si can be bonded at the heterogeneous surface in manner of interatomic force, and the As—N bond of the Si.sub.3N.sub.4 dielectric and the GaAs single crystal thin film layer can be bonded at the heterogeneous surface in manner of interatomic force. Such a bonding manner of the Si—Si bond and As—N bond enables the prepared composite wafer to withstand high temperature in the subsequent epitaxial process. However, in other existing technical means, there is no interatomic bonding force of the Si—Si bond and the As—N bond, as a result, fracture occurs during the subsequent epitaxial growth process since it is difficult to withstand the high temperature of thousands of degrees Celsius.

(50) The above are only preferred embodiments of the present disclosure and are not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.