Method and apparatus for a parallel frequency-mask trigger

Abstract

The frequency-mask trigger unit comprises n trigger machines, where n2, in order to evaluate a total of n signal paths. In this context, the n trigger machines are connected to an evaluation unit. For this purpose, at least one trigger range is transferred to the n trigger machines. Moreover, a plurality of result vectors of a signal under analysis transformed into the frequency domain are transferred via the n signal paths to the n trigger machines. Finally, each of the n trigger machines checks whether at least one of the plurality of result vectors of the signal under analysis transformed into the frequency domain infringes the at least one trigger range.

Claims

1. A method for operating a frequency-mask trigger unit, in order to evaluate a signal under analysis via a plurality of signal paths, wherein the signal under analysis has been converted into the frequency domain, the method comprising: providing at least one trigger range to a plurality of trigger machines; transmitting each of a plurality of result vectors of the signal under analysis via the plurality of signal paths to a respective one of the trigger machines, wherein each signal path connects an output of one of a plurality of transformation units to an input of a respective one of the trigger machines; determining, by each of the transformation units, a Fast Fourier Transform (FFT) via a filter and a delay device; identifying an interferer occurring within an edge region in a spectrum determined by each of the transformation units; and determining, by each of the trigger machines, whether at least one of the plurality of result vectors infringes the at least one trigger range.

2. The method according to claim 1, further comprising: providing a trigger status of each of the trigger machines to an evaluation unit once the respective trigger machine has determined whether the respective result vector infringes the at least one trigger range.

3. The method according to claim 1, further comprising: delaying at least one of the result vectors by at least one system-clock pulse relative to the other result vectors, so that they do not arrive synchronously at the plurality of trigger machines.

4. The method according to claim 1, further comprising a one of the following steps: storing each of the result vectors that is determined as infringing the at least one trigger range in at least one storage unit; and generating a timestamp for each of the result vectors and storing the result vectors with the respective timestamps in at least one storage unit, wherein the timestamp of each of the result vectors that is determined as infringing the at least one trigger range is stored separately in the at least one storage unit.

5. The method according to claim 1, wherein: a plurality of signals under analysis are evaluated via the plurality of signal paths, wherein each of the plurality of signals under analysis has been converted into the frequency domain; and a plurality of result vectors of the plurality of signals under analysis are transmitted via the plurality of signal paths to the plurality of trigger machines.

6. The method according to claim 1, wherein: the plurality of signal paths are evaluated in parallel; and/or the plurality of result vectors provide a time reference to one another; and/or each of the trigger machines processes a respective one of the result vectors; and/or a number of vector elements in each result vector corresponds to the length of the FFT in the transformation units; and/or a trigger status of each of the trigger machines is provided to the evaluation unit once the respective trigger machine has evaluated a last vector element of the respective result vector with regard to the at least one trigger range; and/or the at least one trigger range comprises either a mask that defines an area within a spectrum, or a line, and the at least one trigger range is infringed whenever a vector element of at least one result vector either is disposed within the area defined by the mask, or undershoots or overshoots the line.

7. A frequency-mask trigger unit, for evaluating a signal under analysis via a plurality of signal paths, the frequency-mask trigger unit comprising: a plurality of trigger machines connected to an evaluation unit; and a plurality of transformation units, each configured to configured to determine a Fast Fourier Transform (FFT) via a filter and a delay device; and wherein each signal path connects an output of one of the plurality of transformation units to an input of a respective one of the trigger machines, wherein an interferer occurring within an edge region in a spectrum determined by each of the transformation units is identified, wherein the trigger machines are configured to receive a plurality of result vectors of the signal under analysis via the plurality of signal paths, and wherein each of the trigger machines is configured to determine whether at least one of the plurality of result vectors infringes the at least one trigger range.

8. The frequency-mask trigger unit according to claim 7, wherein each of the trigger machines provides a trigger status to the evaluation unit once the respective trigger machine has determined whether the respective result vector infringes the at least one trigger range.

9. The frequency-mask trigger unit according to claim 7, further comprising: a delay unit configured to delay at least one of the result vectors by at least one system-clock pulse relative to the other result vectors, so that they do not arrive synchronously at the plurality of trigger machines.

10. The frequency-mask trigger unit according to claim 7, further comprising: at least one storage unit; wherein the evaluation unit is configured either (1) to store each of the result vectors that is determined as infringing the at least one trigger range in the at least one storage unit, or (2) to generate a timestamp for each of the result vectors and to store the result vectors with the respective timestamps in the at least one storage unit, wherein the timestamp of each of the result vectors that is determined as infringing the at least one trigger range is stored separately in the at least one storage unit.

11. The frequency-mask trigger unit according to claim 7, wherein: a plurality of signals under analysis are evaluated via the plurality of signal paths, wherein each of the plurality of signals under analysis has been converted into the frequency domain; and a plurality of result vectors of the plurality of signals under analysis are transmitted via the plurality of signal paths to the plurality of trigger machines.

12. The frequency-mask trigger unit according to claim 7, wherein: the trigger machines are arranged in a manner facilitating evaluation of the plurality of signal paths in parallel; and/or the plurality of result vectors provide a time reference to one another; and/or each of the trigger machines is configured to process a respective one of the result vectors; and/or a number of vector elements in each result vector corresponds to the length of the FFT in the transformation units; and/or each trigger machine provides a trigger status to the evaluation unit once it has evaluated a last vector element of the respective result vector with regard to the at least one trigger range; and/or the at least one trigger range comprises either a mask that defines an area within a spectrum, or a line, and the at least one trigger range is infringed whenever a vector element of at least one result vector either is disposed within the area defined by the mask, or undershoots or overshoots the line.

13. A non-transitory computer-readable storage medium carrying one or more sequences of one or more instructions which, when executed by one or more processors, cause an apparatus to at least perform the following steps: providing at least one trigger range to a plurality of trigger machines; transmitting each of a plurality of result vectors of a signal under analysis via a plurality of signal paths, wherein each signal path connects an output of one of a plurality of transformation units to an input of a respective one of the trigger machines, wherein the signal under analysis has been converted into the frequency domain; determining, by each of the transformation units, a Fast Fourier Transform (FFT) via a filter and a delay device; identifying an interferer occurring within an edge region in a spectrum determined by each of the transformation units; and determining, by each of the trigger machines, whether at least one of the plurality of result vectors infringes the at least one trigger range.

14. The non-transitory computer-readable storage medium according to claim 13, wherein the apparatus is caused to further perform: providing a trigger status of each of the trigger machines to an evaluation unit once the respective trigger machine has determined whether the respective result vector infringes the at least one trigger range.

15. The non-transitory computer-readable storage medium according to claim 13, wherein the apparatus is caused to further perform: delaying at least one of the result vectors by at least one system-clock pulse relative to the other result vectors, so that they do not arrive synchronously at the plurality of trigger machines.

16. The non-transitory computer-readable storage medium according to claim 13, wherein the apparatus is caused to further perform a one of the following steps: storing each of the result vectors that is determined as infringing the at least one trigger range in at least one storage unit; and generating a timestamp for each of the result vectors and storing the result vectors with the respective timestamps in at least one storage unit, wherein the timestamp of each of the result vectors that is determined as infringing the at least one trigger range is stored separately in the at least one storage unit.

17. The non-transitory computer-readable storage medium according to claim 13, wherein: a plurality of signals under analysis are evaluated via the plurality of signal paths, wherein each of the plurality of signals under analysis has been converted into the frequency domain; and a plurality of result vectors of the plurality of signals under analysis are transmitted via the plurality of signal paths to the plurality of trigger machines.

18. The non-transitory computer-readable storage medium according to claim 13, wherein: the plurality of signal paths are evaluated in parallel; and/or the plurality of result vectors provide a time reference to one another; and/or each of the trigger machines processes a respective one of the result vectors; and/or a number of vector elements in each result vector corresponds to the length of the FFT in the transformation units; and/or a trigger status of each of the trigger machines is provided to the evaluation unit once the respective trigger machine has evaluated a last vector element of the respective result vector with regard to the at least one trigger range; and/or the at least one trigger range comprises either a mask that defines an area within a spectrum, or a line, and the at least one trigger range is infringed whenever a vector element of at least one result vector either is disposed within the area defined by the mask, or undershoots or overshoots the line.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Various exemplary embodiments of the invention are described by way of example below with reference to the drawings. Identical subject matters provide the same reference numbers. In detail, the corresponding figures of the drawings show:

(2) FIG. 1 a block-circuit diagram, which illustrates a measuring device, which contains the frequency-mask trigger unit according to example embodiments of the invention;

(3) FIG. 2 a block-circuit diagram, which illustrates how n parallel signal paths are generated from a serial datastream by means of n parallel transformation units according to example embodiments of the invention;

(4) FIG. 3 a block-circuit diagram, which illustrates how the result vectors are structured in parallel signal paths according to example embodiments of the invention;

(5) FIG. 4 a block-circuit diagram, which illustrates how mutually parallel and synchronized result vectors are generated from a serial datastream by means of parallel transformation unit and a synchronization unit according to example embodiments of the invention;

(6) FIG. 5 a block-circuit diagram, which illustrates how the mutually parallel and synchronized result vectors are transferred, filtered and delayed, to the parallel frequency-mask trigger unit according to example embodiments of the invention;

(7) FIG. 6A a block-circuit diagram, which further illustrates the structure of the frequency-mask trigger unit for three signal paths according to example embodiments of the invention;

(8) FIG. 6B a block-circuit diagram, which further illustrates the structure of the frequency-mask trigger unit for n signal paths according to example embodiments of the invention;

(9) FIG. 7 a flow chart, which illustrates operation of a frequency-mask trigger unit according to example embodiments of the invention;

(10) FIG. 8 a flow chart, which further illustrates how a trigger status of the respective n trigger machines is transferred within a frequency-mask trigger unit to the evaluation unit according to example embodiments of the invention;

(11) FIG. 9 a flow chart, which further illustrates how the result vectors are delayed relative to one another on the n parallel signal paths according to example embodiments of the invention;

(12) FIG. 10 a flow chart, which illustrates the result vectors that are stored in the at least one storage unit according to example embodiments of the invention; and

(13) FIG. 11 a flow chart, which further illustrates how a plurality of result vectors, which originate from different signals under analysis, are transferred to the n trigger machines according to example embodiments of the invention.

DETAILED DESCRIPTION

(14) FIG. 1 shows a block-circuit diagram which illustrates the structure of a measuring device 1, for example, a real-time spectrum analyzer, which contains the frequency-mask trigger unit 50 according to example embodiments of the invention. In this context, the measuring device 1 for calculating a spectrum of a signal 6 under analysis comprises at least one central data-processing unit 3. The at least one central data-processing unit 3 may comprise, for example, one or more processors and/or field programmable gate arrays (FPGAs) and/or digital signal processors (DSPs) and/or application specific integrated circuits (ASICs). At least one storage unit 2, a screen unit 4 and an input unit 5 are connected to the at least one central data-processing unit 3.

(15) The at least one storage unit 2 can be, for example, a random access memory, which is embodied within the measuring device 1 and provides a very fast data rate. Special flash memories can also be used. As will be explained in greater detail below, the spectrum of the signal 6 under analysis is determined in the central data-processing unit 3 and compared within the frequency-mask trigger unit 50 with at least one adjustable trigger range.

(16) A high-frequency signal 6 under analysis is amplified in its amplitude by an amplifier 7. Following this, the amplified high-frequency communications signal 6 is filtered through a bandpass 8, before it is digitized by an analog-digital converter 9. The digitized high-frequency signal is then stored in the storage unit 2. For example, the storage unit 2 is structured as a fast ring memory. If the signal 6 under analysis is a signal 6 which is broadcast, for example, from a base station, an attenuation element or a coupler, at the output of which a signal with substantially smaller amplitude is present, is used instead of an amplifier 7.

(17) FIG. 2 shows a block-circuit diagram, which illustrates how several result vectors 22.sub.1, 22.sub.2 to 22.sub.n which are output on n parallel signal paths 20.sub.1, 20.sub.2 to 20.sub.n are generated from a serial datastream by means of n parallel transformation units 21.sub.1, 21.sub.2 to 21.sub.n according to example embodiments of the invention. The analog-digital converter 9, which digitizes the signal 6 under analysis with a sampling rate of 300 MHz and stores it in the at least one storage unit 2 is shown. In the exemplary embodiment from FIG. 2, the transformation units 21.sub.1, 21.sub.2 to 21.sub.n are connected to the at least one storage unit 2. The system-clock pulse with which the transformation units 21.sub.1, 21.sub.2 to 21.sub.n are operated, corresponds in the exemplary embodiment from FIG. 2 to the sampling rate of the analog-digital converter 9 and is therefore, for example, 300 MHz. Accordingly, each of the n transformation units 21.sub.1, 21.sub.2 to 21.sub.n is capable of calculating the spectrum of the signal 6 under analysis in step, that is, in real-time. The Fast Fourier Transform (FFT) length L, which the transformation units 21.sub.1, 21.sub.2 to 21.sub.n use, is identical for all of these transformation units 21.sub.1, 21.sub.2 to 21.sub.n. For example, in order to realize an increased overlap, the individual transformation units 21.sub.1, 21.sub.2 to 21.sub.n do not use the same sampling values for calculating the Fourier transform but begin with an offset. At the start of the individual transformation units 21.sub.1, 21.sub.2 to 21.sub.n, a result vector 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4 is present in each case which comprises precisely as many vector elements as the length L of the, preferably fast, Fourier transform.

(18) It is evident that the signal 6 under analysis is transformed into the frequency domain by means of the n transformation units 21.sub.1, 21.sub.2 to 21.sub.n arranged in parallel. As a result of the overlapping, an interferer which occurs within the edge region in one of the spectrum calculated by a transformation unit 21.sub.1, 21.sub.2 to 21.sub.n is less strongly attenuated and can still be securely identified, so that it is possible to speak of a gap-free observation, that is, a real-time observation. At the output of the n transformation units 21.sub.1, 21.sub.2 to 21.sub.n, the result vectors 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4 are output on the n parallel signal paths 20.sub.1, 20.sub.2 to 20.sub.n.

(19) FIG. 3 shows a block-circuit diagram, which illustrates how the result vectors 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4 are structured in the parallel signal paths 20.sub.1, 20.sub.2, 20.sub.3, 20.sub.4 according to example embodiments of the invention. It is evident that, in the exemplary embodiment, eight result vectors are present, which are transmitted on four signal paths 20.sub.1, 20.sub.2, 20.sub.3, 20.sub.4. The fast Fourier transform, as can be calculated, for example, in the computer units 21.sub.1, 21.sub.2 to 21.sub.n in FIG. 2, provides a length of 32. This means that each result vector 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4 from FIG. 2 also comprises 32 vector elements. FIG. 3 shows the sampled values from which the frequency bins disposed in result vector 22.sub.1, 22.sub.2, 22.sub.3 and 22.sub.4 are composed within each result vector 22.sub.1, 22.sub.2, 22.sub.3 and 22.sub.4. In the result vector 22.sub.1, the 32 frequency bins, which are stored in the 32 vector elements, are composed of the sampled values 1 to 32, which are transformed into the frequency domain. The 32 frequency bins of the second result vector 22.sub.2 are composed of a Fourier transform of the sampled values 9 to 40. In the exemplary embodiment from FIG. 3, this composition is presented for all eight result vectors 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4, whereas the corresponding reference numbers are entered in the figures of the drawings only for four result vectors 22.sub.1, 22.sub.2, 22.sub.3, 22.sub.4. In total, m result vectors 22.sub.1, 22.sub.2 to 22.sub.m are transmitted on n signal paths 20.sub.1, 20.sub.2 to 20.sub.n, whereas mn. In this context, a total of n result vectors 22.sub.1, 22.sub.2 to 22.sub.n are transmitted in parallel on the n signal paths 20.sub.1, 20.sub.2 to 20.sub.n.

(20) As will be explained in greater detail below, the frequency-mask trigger unit 50 according to example embodiments of the invention checks whether at least one of the plurality of result vectors 22.sub.1, 22.sub.2 to 22.sub.m of the signal 6 under analysis transformed into the frequency domain infringes the at least one trigger range.

(21) FIG. 4 shows a block-circuit diagram, which illustrates how mutually parallel and synchronized result vectors 22.sub.1, 22.sub.2, 22.sub.3 are generated from a serial datastream by means of parallel transformation units 21.sub.1, 21.sub.2, 21.sub.3 and a synchronization unit 40 according to example embodiments of the invention. In the exemplary embodiment from FIG. 4, a total of nine result vectors are shown, whereas only three result vectors 22.sub.1, 22.sub.2, 22.sub.3 are provided with reference numbers.

(22) An analog-digital converter 9 digitizes the signal 6 under analysis with a sampling rate of, for example, 300 MHz and stores the digitized signal 6 under analysis in the at least one storage unit 2. The at least one storage unit 2 is further connected to a synchronization unit 40. The synchronization unit 40 is once again connected to the individual parallel transformation units 21.sub.1, 21.sub.2, 21.sub.3. As a result of the synchronization, the identical vector elements of the different result vectors 22.sub.1, 22.sub.2, 22.sub.3 are disposed at the output of the different parallel transformation units 21.sub.1, 21.sub.2 and 21.sub.3 with the same vector index with pulse synchronized relative to one another. Simplifications in filtering (resampling), for example, are achieved as a result of the synchronization, because the same filter coefficient can be used on all result vectors 22.sub.1, 22.sub.2, 22.sub.3, and different filter coefficients need not be loaded within one system-clock pulse for the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3. Moreover, a decimation of the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3 to form a single result vector 22.sub.1, 22.sub.2, 22.sub.3 is very readily realized, because no further intermediate buffering is necessary, in order to wait until the same vector element is present in all result vectors 22.sub.1, 22.sub.2, 22.sub.3.

(23) FIG. 5 shows a block-circuit diagram, which illustrates how the mutually parallel and synchronized result vectors 22.sub.1, 22.sub.2, 22.sub.3 are transferred to the parallel frequency-mask trigger unit 50 according to example embodiments of the invention, filtered and delayed. In the exemplary embodiment from FIG. 5, the result vectors 22.sub.1, 22.sub.2, 22.sub.3 generated in FIG. 4 are supplied on the three signal paths 20.sub.1, 20.sub.2 and 20.sub.3 to a filter unit 51. On the basis of the fact that the result vectors 22.sub.1, 22.sub.2, 22.sub.3 in FIG. 4 have been synchronized by the synchronization unit 40, the respective vector elements are available in the result vectors 22.sub.1, 22.sub.2, 22.sub.3 at the same time within the filter unit 51. In the further course, the filter unit 51 can use the same filter coefficients on all result vectors 22.sub.1, 22.sub.2, 22.sub.3 and need not load different filter coefficients for the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3 within one system-clock pulse and within these, for the individual vector elements.

(24) Following this, the filtered result vectors 22.sub.1, 22.sub.2, 22.sub.3 at the output of the filter unit 51 are supplied via the signal paths 20.sub.1, 20.sub.2, 20.sub.3 to the input of a delay unit 52. At the output of the delay unit 52, the filtered result vectors 22.sub.1, 22.sub.2, 22.sub.3 are present with a delay relative to one another. It is evident that the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3, which are transmitted on the different signal paths 20.sub.1, 20.sub.2, 20.sub.3 provide a time offset relative to one another.

(25) In the exemplary embodiment from FIG. 5, the result vector 22.sub.2 is delayed relative to the result vector 22.sub.1 by at least one system-clock pulse. The same also applies for the result vector 22.sub.3, which is delayed by comparison with the result vector 22.sub.2 and therefore also relative to the result vector 22.sub.1 by at least one system-clock pulse. By contrast, the result vectors which follow one another within a signal path 20.sub.1 or 20.sub.2 or 20.sub.3 are not additionally delayed. The output of the delay unit 52 is connected to the frequency-mask trigger unit 50 according to example embodiments of the invention. The delayed result vectors 22.sub.1, 22.sub.2, 22.sub.3 are transmitted on the signal paths 20.sub.1, 20.sub.2, 20.sub.3 to the frequency-mask trigger unit 50.

(26) FIG. 6A shows a block-circuit diagram, which further illustrates the structure of the frequency-mask trigger unit 50 according to example embodiments of the invention for three signal paths 20.sub.1, 20.sub.2, 20.sub.3. The result vectors 22.sub.1, 22.sub.2, 22.sub.3 transmitted on the individual signal paths 20.sub.1, 20.sub.2, 20.sub.3, which are delayed relative to one another by at least one system-clock pulse, are evident. The frequency-mask trigger unit 50 provides n trigger machines 61.sub.1, 61.sub.2, 61.sub.3, whereas n is at least 2, in order to evaluate a total of n signal paths 20.sub.1, 20.sub.2, 20.sub.3. In the exemplary embodiment from FIG. 6A, the value 3 is provided for n, so that there are a total of three trigger machines 61.sub.1, 61.sub.2, 61.sub.3, of which the input is also connected to the three signal paths 20.sub.1, 20.sub.2, 20.sub.3.

(27) At least one trigger range is supplied to the three trigger machines 61.sub.1, 61.sub.2, 61.sub.3. This at least one trigger range can be entered by a user with the entry unit 5. However, this one trigger range can also be loaded by the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 from the at least one storage unit 2. Within the at least one storage unit 2, different trigger ranges can be stored. Dependent upon the type of signal 6 under analysis, the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 load the corresponding trigger range from the at least one storage unit 2. If the signal 6 under analysis is, for example, a Global System for Mobile Communications (GSM) signal, the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 naturally only load from the at least one storage unit 2 a trigger range which covers the frequency range in which GSM networks are normally operated.

(28) Such a trigger range can be, for example, a mask, which is defined in the spectrum and can be described in frequency and amplitude by an area. It is also possible for the at least one trigger range to be only a line which is drawn over a given frequency range with a given amplitude. Altogether, several trigger ranges can be plotted. In this context, the trigger ranges can also be displayed on the screen unit 4.

(29) Furthermore, each of the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 checks, for every vector element of every result vector 22.sub.1, 22.sub.2, 22.sub.3, whether the vector element infringes the trigger range or not. The vector elements are the sampled values of the digitized signal 6 under analysis transformed into the frequency domain. The vector elements are also the individual frequency bins which provide a given amplitude. A vector element infringes the trigger range, if the trigger machine 61.sub.1, 61.sub.2, 61.sub.3 determines that the vector element is disposed within a region defined by a mask, or overshoots or undershoots the line which is defined in frequency and amplitude and represents the trigger range. In this context, each trigger machine 61.sub.1, 61.sub.2, 61.sub.3 determines whether vector elements within the result vectors 22.sub.1, 22.sub.2, 22.sub.3 infringe the trigger range. Accordingly, it is also possible for each trigger machine 61.sub.1, 61.sub.2, 61.sub.3 to determine which vector element within the result vectors 22.sub.1, 22.sub.2, 22.sub.3 infringes the trigger range. As soon as each of the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 has checked the last vector element of the result vector 22.sub.1, 22.sub.2, 22.sub.3 against the trigger range, the trigger status is transferred to the evaluation unit 60. If one of the L vector elements within a result vector 22.sub.1, 22.sub.2, 22.sub.3 infringes the at least one trigger range, the corresponding trigger machine 61.sub.1, 61.sub.2, 61.sub.3 outputs the message to the evaluation unit 60 that the trigger has been released. If none of the L vector elements of the result vectors 22.sub.1, 22.sub.2, 22.sub.3 infringes the at least one trigger range, the corresponding trigger machine 61.sub.1, 61.sub.2, 61.sub.3 either outputs no message to the evaluation unit 60, or the message that the trigger has not been released.

(30) In view of the fact that the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3 are delayed by at least one system-clock pulse by comparison with the vector elements 22.sub.1, 22.sub.2, 22.sub.3 which are disposed on other signal paths 20.sub.1, 20.sub.2, 20.sub.3, as described in FIG. 5, the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 transmit the message to the evaluation unit 60 that the trigger has been released at different times. This is because of the fact that the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 only generate the corresponding message and transmit it to the evaluation unit 60 after the evaluation of the last vector element of the corresponding result vector 22.sub.1, 22.sub.2, 22.sub.3. For this reason, the evaluation unit 60 must evaluate, as a maximum, the message from one trigger machine 61.sub.1, 61.sub.2, 61.sub.3 per system-clock pulse. This allows the evaluation unit 60 to be structured in a very simple manner. As soon as the evaluation unit 60 receives from one of the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 the message that a trigger range has been infringed, the latter stores the relevant result vector 22.sub.1, 22.sub.2, 22.sub.3 in the at least one storage unit 2. Furthermore, it is possible for the relevant result vector 22.sub.1, 22.sub.2, 22.sub.3 to be decimated in such a manner that it corresponds to the resolution of the screen unit 4 and is preferably displayed on the screen unit 4 with the at least one trigger range. The analysis of the individual result vectors 22.sub.1, 22.sub.2, 22.sub.3 is not interrupted because of the fact that one of the trigger machines 61.sub.1, 61.sub.2, 61.sub.3 outputs to the evaluation unit 60 the message that a trigger range has been infringed, so that the digitized signal 6 under analysis can be analyzed continuously. This allows interferers occurring only very briefly and rarely within the time domain to be identified securely.

(31) In view of the fact that all result vectors 22.sub.1, 22.sub.2, 22.sub.3 which infringe the at least one trigger range are stored in the at least one storage unit 2, these are still available for subsequent evaluation.

(32) FIG. 6B shows a block-circuit diagram, which further illustrates the structure of the frequency-mask trigger unit 50 according to example embodiments of the invention for n signal paths 20.sub.1, 20.sub.2 to 20.sub.n. It is readily evident that the frequency-mask trigger unit 50 contains n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n, to which n result vectors 22.sub.1, 22.sub.2 to 22.sub.n are supplied on n signal paths 20.sub.1, 20.sub.2 to 20.sub.n with a time delay in each case of at least one system-clock pulse, whereas n must have at least the value two. The n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n are once again connected to the evaluation unit 60, which can, according to example embodiments of the invention, receive a maximum of one message from one of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n in each system-clock pulse. The evaluation unit 60 stores that one of the n result vectors 22.sub.1, 22.sub.2 to 22.sub.n which has infringed the trigger range in the at least one storage unit 2. This storage can also be implemented directly from each of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n. It is also possible for the evaluation unit 60 or each of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n to store all result vectors 22.sub.1, 22.sub.2 to 22.sub.n directly in the at least one storage unit 2, whereas the evaluation unit 60 also generates for each result vector 22.sub.1, 22.sub.2 to 22.sub.n a timestamp, which indicates, for example, when the result vector 22.sub.1, 22.sub.2 to 22.sub.n arrived in the frequency-mask trigger unit 50 according to example embodiments of the invention and stores the latter together with the result vector 22.sub.1, 22.sub.2 to 22.sub.n. Furthermore, the timestamp from the result vector 22.sub.1, 22.sub.2 to 22.sub.n which infringes the trigger range is stored separately by the evaluation unit 60 in the at least one storage unit 2.

(33) FIG. 7 shows a flow chart which illustrates a method for operating a frequency-mask trigger unit 50 according to example embodiments of the invention. In a first method step S.sub.1, at least one trigger range is transferred to the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n. This trigger range can be entered by a user via the entry unit 5. However, the trigger range can also be loaded by the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n from the at least one storage unit 2. In this context, the trigger range can be a mask, which describes an area in the spectrum. The trigger range can also be a line, which is drawn in the spectrum in frequency and amplitude.

(34) Following this, the method step S.sub.2 is implemented. Within method step S.sub.2, a plurality of result vectors 22.sub.1, 22.sub.2 to 22.sub.n from a signal 6 under analysis transformed into the frequency domain is transferred via n signal paths 20.sub.1, 20.sub.2 to 20.sub.n to the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n.

(35) Following this, method step S.sub.3 is performed. Within method step S.sub.3, a check is carried out to determine whether at least one of the plurality of result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m of the signal 6 under analysis transformed into the frequency domain infringes the at least one trigger range. This is implemented by each of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n.

(36) FIG. 8 shows a flow chart which illustrates how a trigger status of the respective n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n is transferred within the frequency-mask trigger unit 50 to the evaluation unit 60 according to example embodiments of the invention. For this purpose, method step S.sub.4 is provided, which can be implemented after method step S.sub.3. Within method step S.sub.4, a trigger status of each of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n is transferred to the evaluation unit 60, as soon as the respective trigger machine 61.sub.1, 61.sub.2 to 61.sub.n has compared the respective result vector 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m with the at least one trigger range. In this context, the trigger status describes the status of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n and indicates whether one of the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n has been triggered. Accordingly, the trigger status is preferably transferred to the evaluation unit 60, as soon as the last vector element within the each result vector 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m has been checked by the corresponding trigger machine 61.sub.1, 61.sub.2 to 61.sub.n with regard to an infringement of the trigger range.

(37) FIG. 9 shows a flow chart which illustrates how the result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m are delayed relative to one another on the n parallel signal paths 20.sub.1, 20.sub.2 to 20.sub.n according to example embodiments of the invention. For this purpose, method step S.sub.5, which can be implemented after method step S.sub.1, is carried out. Within method step S.sub.5, the result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m are delayed on the n signal paths 20.sub.1, 20.sub.2 to 20.sub.n by at least one system-clock pulse relative to one another, so that they do not arrive synchronously at the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n. Accordingly, all result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m on one signal path 20.sub.1, 20.sub.2 to 20.sub.n are delayed by at least one system-clock pulse by comparison with the result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m on the other n1 signal paths 20.sub.1, 20.sub.2 to 20.sub.n. This is achieved by a delay unit 52, which is arranged upstream of the frequency-mask trigger unit 50 according to example embodiments of the invention.

(38) FIG. 10 shows a flow chart which illustrates which of the result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m are stored in the at least one storage unit 2 according to example embodiments of the invention. For this purpose, method step S.sub.6.sub._.sub.1 or method step S.sub.6.sub._.sub.2, which can be implemented after method step S.sub.4, is performed. Within method step S.sub.6.sub.1, the respective result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m which have infringed a trigger range are stored in the at least one storage unit 2. This is implemented by the evaluation unit 60. This allows the respective result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m to be evaluated in greater detail at a subsequent time, so that the measuring device, in which the frequency-mask trigger unit 60 according to example embodiments of the invention is implemented, can continue with the analysis of the digitized signal 6 under analysis without interruption.

(39) Within method step S.sub.6.sub._.sub.2, timestamps are generated by the evaluation unit 60 for all result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m. These timestamps indicate, for example, at which time the result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m have been supplied to the frequency-mask trigger unit 50 according to example embodiments of the invention. Furthermore, all result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m are stored in the at least one storage unit 2. Additionally, the timestamp of the result vector which has infringed the at least one trigger range is stored again in the at least one storage unit 2 by the evaluation unit 60. In a subsequent evaluation, all result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m of which the timestamp corresponds to the additionally stored timestamps can be loaded from the storage unit 2. This means that, in the subsequent evaluation, result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m which are disposed directly before or after the result vector 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m which infringes the at least one trigger range can also be observed, whereas these result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m themselves have not infringed a trigger range. This would not be possible with the method step from S.sub.6.sub._.sub.1, whereas the method step S.sub.6.sub._.sub.2 requires more storage space in the at least one storage unit 2.

(40) FIG. 11 shows a flow chart which further illustrates how a plurality of result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m which originate from different signals under analysis, are transferred to the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n according to example embodiments of the invention. For this purpose, the sub-method step S.sub.2.sub._.sub.1 is implemented, which can be implemented within method step S.sub.2. Within the sub-method step S.sub.2.sub._.sub.1, a plurality of result vectors 22.sub.1, 22.sub.2, 22.sub.n to 22.sub.m of different signals under analysis transformed into the frequency domain are transferred via the n signal paths 20.sub.1, 20.sub.2 to 20.sub.n to the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n. It is advantageous that different signals under analysis, which are supplied, for example, via a plurality of ports to the measuring device 1, can be analyzed in this manner.

(41) It is further advantageous that all trigger machines 61.sub.1, 61.sub.2 to 61.sub.n are structured in an identical manner and determine all possible trigger statuses for every signal path 20.sub.1, 20.sub.2 to 20.sub.n independently from one another.

(42) One advantage with the delay of the n signal paths 20.sub.1, 20.sub.2 to 20.sub.n is that, within one system-clock pulse, only one trigger status is transmitted to the evaluation unit 60. If there are n signal paths 20.sub.1, 20.sub.2 to 20.sub.n and every trigger machine 61.sub.1, 61.sub.2 to 61.sub.n can output k different trigger statuses, the evaluation unit 60 would have to be capable of processing n.Math.k different messages per system-clock pulse from the n trigger machines 61.sub.1, 61.sub.2 to 61.sub.n. Here, it is very evident that the necessary computational cost within the evaluation unit 60 can be significantly reduced through the introduction of the delay unit 52 according to example embodiments of the invention, because the latter only needs to be able to process one trigger status per system-clock pulse.

(43) The signal path 20.sub.1, 20.sub.2 to 20.sub.n is a connection across which data can be transmitted. If the signal under analysis is sampled with a resolution of twelve bits, the signal path also comprises at least so many individual connections, in order to transmit the twelve bits, that is, the sampling value, within one system-clock pulse.

(44) Within the scope of the invention, all of the features described and/or illustrated can be combined with one another as required. In particular, the dependent claims relating to the method can also be combined with the device claims relating to the frequency-mask trigger unit and vice versa.