Method of producing a hybridized device including microelectronic components
10002842 · 2018-06-19
Assignee
Inventors
Cpc classification
H01L2224/81193
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L2224/13687
ELECTRICITY
H01L2225/06513
ELECTRICITY
H01L2224/13023
ELECTRICITY
Y10T29/49117
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H05K3/10
ELECTRICITY
H01L2224/13566
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L2224/13687
ELECTRICITY
H01L2224/13011
ELECTRICITY
H01L2224/81355
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L25/50
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/13019
ELECTRICITY
H01L2224/114
ELECTRICITY
International classification
H05K3/10
ELECTRICITY
H01L25/065
ELECTRICITY
Abstract
A method of producing a hybridized device including two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on a surface opposed to the connection surface, is provided. The method includes the steps of hybridizing the first and second electronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads, and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, inserts of the first microelectronic component, provided with a second metal sub-layer, into the ductile conductive pads of the second microelectronic component.
Claims
1. A method of producing a hybridized device comprising two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on one surface that is opposed to the connection surface of the first microelectronic device, wherein each conductive insert of the first microelectronic component comprises a hollow metal core formed of a bottom arranged on the connection surface and of a lateral wall protruding from said bottom, defining an internal surface of the insert, at least a portion of said internal surface being non-oxidized, and a metal layer substantially only covering the internal surface of the metal core and adapted to contact one of the ductile conductive pads of the second microelectronic component associated with the insert, the metal layer being made of an inoxidizable metal, or the metal layer comprising a first metal sub-layer non-oxidized over at least a portion of its surface, covering at least the non-oxidized portion of the internal surface of the core, wherein the first sub-layer has a greater plasticity than the core, and a second sub-layer covering at least the first sub-layer over its non-oxidized portion and having a lower plasticity than the first sub-layer, and wherein the pads of the second microelectronic component are made of a material with a lower hardness than that of the metal core of the hollow inserts of the first microelectronic component, the method comprising the steps of: hybridizing the first and second microelectronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads; and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, the inserts of the first microelectronic component, provided with the second metal sub-layer, into the ductile conductive pads of the second microelectronic component.
2. The method of claim 1, wherein an interconnect pitch between the first and second microelectronic components is smaller than 10 micrometers.
3. The method of claim 1, wherein the first sub-layer is made of an oxidizable metal and wherein the second sub-layer is made by oxidizing the first sub-layer to create a layer of native oxide of the metal forming the first sub-layer having a plasticity lower than that of the first sub-layer.
4. The method of claim 3, wherein the first sub-layer is made of aluminum, and the second sub-layer is made of an aluminum oxide.
5. The method of claim 1, wherein the hollow metal core is made of a hard material.
6. The method of claim 5, wherein the hard material is selected from the group consisting of titanium nitride, tungsten nitride, copper, vanadium, molybdenum, nickel, titanium tungstenate, WSi, and tungsten.
7. The method of claim 1, wherein the adherence of the second sub-layer to the first sub-layer is low so that the second sub-layer slides on the first sub-layer under the effect of a shearing applied to the stack of the first and second sub-layers.
8. The method of claim 1, wherein the first sub-layer has a ductility substantially equal to that of the pads.
9. The method of claim 1, wherein the inoxidizable metal is a noble metal.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The present invention will be better understood on reading of the following description provided as an example only in relation with the accompanying drawings, where the same reference numerals designate the same or similar elements, among which:
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
DETAILED DESCRIPTION OF THE INVENTION
(13) A method according to the invention of manufacturing inserts for a flip-chip hybridizing of a first and of a second microelectronic components similar to that described in relation with
(14) It should be noted that the inserts may take any shape, although inserts having a decreased bearing surface area, such as hollow cylinders, for example, are preferred to decrease the pressure necessary for their insertion into the pads. In the following, U-shaped cylindrical and hollow inserts will however be described, this shape being a preferred embodiment. However, it should be understood that considerations bearing on the materials forming the inserts and the pads are independent from the shape selected for them. For example, the inserts may be solid and/or have a triangular, square, and more generally polygonal, star, or other shape.
(15) The method starts similarly to the manufacturing steps described in relation with
(16) Advantageously, metal 44 forming central core 50 is made of a hard metal, such as titanium nitride (TiN), tungsten nitride (NiW), copper (Cu), vanadium (V), molybdenum (Mo), nickel (Ni), titanium tungstenate (TiW), WSi, or tungsten (W), for example, and pads 18 are made of a ductile metal, for example, aluminum, tin, indium, lead, silver, copper, zinc, or an alloy of these metals.
(17) The method carries on with the full-plate deposition of a metal layer or multilayer 70 having the function of protecting the internal surface of central core 50 of the inserts from oxidation and optionally having a smaller electric resistivity than the metal 44, metal 44 forming the core remaining non-oxidized at this step of the method. The deposition for example is a chemical vapor deposition or CVD carried out at a temperature compatible with the microscopic elements of component 10, especially a temperature smaller than 425 C. for a component 10 implementing CMOS technology (
(18) Layer 70 is preferably made of aluminum, this metal having the advantage of having a very high melting temperature greater than 500 C.
(19) A removal of the portion of hard metal 44 deposited between holes 42 is then performed, for example, by means of a damascene or gap-fill etching well known per se.
(20) For example, a gap-fill etching similar to that described in relation with
(21) The method thus comprises three manufacturing sequences, that is, a first manufacturing sequence relative to the forming of openings 42 (
(22)
(23) Still with the simplified assumption of cylindrical connection areas 22 aligned with their respective inserts 16, the minimum interconnect pitch P obtained due to the invention is equal to the sum of width L1 of connection area 22, of twice width G1 between the external diameter of core 50 of an insert 16 and of width L5 separating the external diameters of adjacent inserts 72, that is, P=L1+2G1+L5.
(24) Taking the previously-described numerical examples, that is, a minimum value of L1 equal to 3 micrometers, a minimum value of G1 equal to 1 micrometer, and a value of L5 equal to 3 micrometers, a minimum interconnect pitch P equal to 8 micrometers is obtained, that is, an interconnect surface density equal to approximately 1.625.Math.10.sup.4 interconnects/mm.sup.2.
(25) According to a first variation, metal layer 70 is made of a noble metal, such as gold or platinum, for example.
(26) According to a second variation, illustrated in simplified cross-section view in
(27) First metal sub-layer 80, apart from being electrically conductive and from strongly adhering to central core 50 of insert 72 due to the metal-metal interface that it forms with core 50, has the function of deforming, while remaining attached to core 50, during the penetration of the insert into a pad 18. It has, for this purpose, a greater plasticity than core 50. Sub-layer 80 may thus be formed of a ductile metal. Particularly, a ductile metal having a Young's modulus greater than 1.5 time that of the material of core 50 has an appropriate plasticity.
(28) Preferably, sub-layer 80 has a ductility substantially equal to that of pads 18 to enable the penetration of hard core 50 without breaking and obtain relative deformations of sublayer 80 and of pad 18 in substantially equal fashion.
(29) Sub-layer 80 is thus advantageously made of aluminum, tin, indium, lead, silver, copper, zinc, or an alloy of these metals. Further, metal sub-layer 80 is not oxidized.
(30) Protection sub-layer 82 has as a first function to protect metal sub-layer 80 from oxidation and as a second function to expose at least a portion of metal sub-layer 80 on insertion of insert 72 into a pad 18 to create an electric connection between the material of pad 18 and central core 50. To achieve this, protection sub-layer 82 is selected to crack under the effect of the deformation of metal sub-layer 80. Protection sub-layer 82 thus has a lower plasticity than metal sub-layer 80.
(31) Preferably, protection sub-layer 82 is selected to have a very low breakage threshold under deformation stress, that is, is very brittle. Protection sub-layer 82 may be a protection film placed on metal sub-layer 80, such as for example an epoxy resist or a polymer layer such as parylene, for example, or a hard metal layer or a layer of hard and brittle insulator, such as for example SiO.sub.2 or SiN.
(32) Preferably, protection sub-layer 82 is made of the native oxide of the metal forming metal sub-layer 80, which has the triple advantage of: providing a very thin protection layer 82, in the order of a few nanometers, being hard and brittle, and especially having a plasticity and a ductility much lower than those of the actual metal 80, and having a very low adherence to metal sub-layer 80.
(33) Further, this embodiment has the advantage that no specific measures are necessary to avoid the oxidation of inserts during their storage since inserts 72 are left to oxidize on purpose.
(34) As illustrated in
(35) A central core 50 non oxidized over its entire internal surface has been described. As a variation, only a portion of the internal surface of central core 50 is non-oxidized. Central core 50 is then covered with layer 70 at least on this non-oxidized portion. In the second variation, the sub-layer covers at least this non-oxidized portion and protection sub-layer 82 covers at least the portion of sub-layer 80 covering the non-oxidized portion of core 50, this portion of sub-layer 80 being non-oxidized.
(36) As mentioned hereabove, inserts 72 are preferably hollow cylinders having very small bearing surfaces S (
(37) Advantageously, the pressure exerted on bearing surface S on insertion of inserts comprising a first aluminum sub-layer 80 covered with a native oxide layer 82 (alumina Al.sub.2O.sub.3) in aluminum pads 18 is greater than 1,800 megaPascals. The inventors have indeed observed that for lower pressure values, the interconnects formed of inserts 16 in pads 18 have a high electric resistance, which means that the peeling-off of oxide layer 82 is not complete. The inventors have however observed that for the previous configuration of inserts and pads, pressures greater than 1,800 megaPascals (MPa) provide high-quality interconnects, that is, having an electric resistance close to that of aluminum, which means that the oxide layer has been almost fully peeled off.
(38) Advantageously, the general insertion force or, equivalently, the general insertion pressure, exerted on circuits 10 and 12 to hybridize them, for example that exerted on circuit 10 such as illustrated by arrows in
(39) For example, a hollow cylinder having a diameter equal to 4 m, with a wall thickness equal to 0.2 m, has a bearing surface area S equal to 2.512 m.sup.2. When such an insert is submitted to a 5-mN insertion force, the pressure exerted on its bearing surface S is equal to 1,990 MPa.
(40) Knowing the general insertion force and the number of interconnects between circuits 10 and 12, the unit insertion force applied to each insert 16 can be deduced. Knowing the unit insertion force, a maximum bearing area to obtain at least the minimum 1,800-MPa pressure can thus be deduced. Finally, bearing surface S of a hollow cylinder being provided by relation S=2(R.sub.2R.sub.1)R.sub.2, where R.sub.2R.sub.1 is the thickness of the walls of inserts 16 and 2R.sub.2 is the external diameter of inserts 16 (