GATE DRIVER CIRCUIT FOR A POWER SUPPLY VOLTAGE CONVERTER

Abstract

A gate driver circuit comprises an auxiliary winding, a voltage summer, an auxiliary voltage bus, a gate driver integrated circuit (IC), and a controller. The auxiliary winding is positioned adjacently to the inductor and configured to inductively couple with the inductor. The voltage summer comprises a pair of diodes coupled to the auxiliary winding and a pair of capacitors coupled to the pair of diodes. The auxiliary voltage bus is configured to receive a summed voltage from the voltage summer based on a sum of voltages stored in the pair of capacitors. The gate driver IC is configured to receive a voltage from a positive rail of the auxiliary voltage bus and to output a gate control signal to control a switching device based on the received voltage and based on a pulse signal generated by the controller.

Claims

1-20. (canceled)

21. A voltage converter comprising: a transformer comprising: a primary winding; and a secondary winding inductively coupleable with the primary winding; a voltage summer comprising: a first diode coupled to the secondary winding; a second diode coupled to the secondary winding; a first capacitor coupled to the first diode; and a second capacitor coupled to the second diode; an auxiliary voltage bus coupled with the voltage summer; a controller configured to generate a pulse signal; a gate driver integrated circuit (IC) comprising: a voltage input coupled to the auxiliary voltage bus; and a logic input configured to receive the pulse signal; wherein the gate driver IC is configured to control a conducting state of a switching device based on a summed voltage and based on the pulse signal.

22. The voltage converter of claim 21, wherein the voltage input is coupled to a positive rail of the auxiliary voltage bus.

23. The voltage converter of claim 22, wherein the auxiliary bus is configured to receive the summed voltage from the voltage summer based on a sum of voltages stored in the first and second capacitors.

24. The voltage converter of claim 23, wherein the secondary winding comprises a center-tapped winding having a center tap; wherein a first auxiliary winding is formed between a first end of the secondary winding and the center tap; and wherein a second auxiliary winding is formed between a second end of the secondary winding and the center tap.

25. The voltage converter of claim 24, wherein: the first diode is coupled between the first end of the first auxiliary winding and a first terminal of the first capacitor; the second diode is coupled between the second end of the first auxiliary winding and a first terminal of the second capacitor; and a second terminal of the first capacitor and a second terminal of the second capacitor are coupled together and to the center tap.

26. The voltage converter of claim 25, wherein: the first and second auxiliary windings are configured to: generate a first auxiliary voltage in response to a first inductor voltage generated in the primary winding; and generate a second auxiliary voltage in response to a second inductor voltage generated in the primary winding; the first capacitor is configured to store a first charge voltage in response to the first auxiliary voltage being generated in the first auxiliary winding; and the second capacitor is configured to store a second charge voltage in response to the second auxiliary voltage being generated in the second auxiliary winding.

27. The voltage converter of claim 23, wherein the gate driver circuit further comprises a switching startup circuit coupled to the auxiliary voltage bus and configured to provide a startup voltage to the auxiliary voltage bus prior to the auxiliary voltage bus receiving the summed voltage.

28. The voltage converter of claim 27, wherein the switching startup circuit comprises: a first terminal coupled to the positive rail of the auxiliary voltage bus; a second terminal coupled to a negative rail of the auxiliary voltage bus; a first diode coupled to the first terminal; a second diode coupled to the first diode at a first node and coupled to the second terminal; and a resistor coupled to the first node and configured to receive a voltage based on an input voltage.

29. The voltage converter of claim 28, wherein the switching start-up circuit further comprises an enable circuit coupled to the resistor and comprising: a switching device coupled to the resistor; and a control network coupled to the switching device and configured to control switching of the switching device into conducting and non-conducting states, the control network comprising: a resistor divider coupled to a control terminal of the switching device; a switching device coupled to the resistor divider; and an enable input configured to receive a signal for controlling the switching device into an on state or into an off state.

30. The voltage converter of claim 28, wherein the voltage converter comprises a non-synchronous buck converter.

31. A method of manufacturing a voltage converter comprising: coupling a first diode of a voltage summer to a secondary winding of a transformer, the transformer further comprising a primary winding inductively coupleable with the secondary winding; coupling a second diode of the voltage summer to the secondary winding; coupling a first capacitor of the voltage summer to the first diode; coupling a second capacitor of the voltage summer to the second diode; coupling an auxiliary voltage bus with the voltage summer; coupling a voltage input of a gate driver integrated circuit (IC) to the auxiliary voltage bus; coupling a logic input of the gate driver IC to a pulse signal output of a controller; and configuring the gate driver IC to control a conducting state of a switching device based on a summed voltage and based on the pulse signal.

32. The method of claim 31, wherein coupling the voltage input of the gate driver IC to the auxiliary voltage bus comprises coupling the voltage input of the gate driver IC to a positive rail of the auxiliary voltage bus.

33. The method of claim 32, further comprising configuring the auxiliary bus is to receive the summed voltage from the voltage summer based on a sum of voltages stored in the first and second capacitors.

34. The method of claim 33, further comprising forming the secondary winding into a center-tapped winding having a center tap; wherein a first auxiliary winding is formed between a first end of the secondary winding and the center tap; and wherein a second auxiliary winding is formed between a second end of the secondary winding and the center tap.

35. The method of claim 34 further comprising: coupling the first diode between the first end of the first auxiliary winding and a first terminal of the first capacitor; coupling the second diode between the second end of the first auxiliary winding and a first terminal of the second capacitor; and coupling a second terminal of the first capacitor and a second terminal of the second capacitor together and to the center tap.

36. The method of claim 33 further comprising coupling a switching startup circuit to the auxiliary voltage bus.

37. The method of claim 36 further comprising configuring the switching startup circuit to provide a startup voltage to the auxiliary voltage bus prior to the auxiliary voltage bus receiving the summed voltage.

38. The method of claim 36, wherein coupling the switching startup circuit to the auxiliary voltage bus comprises: coupling a first terminal of the switching startup circuit to the positive rail of the auxiliary voltage bus; coupling a second terminal of the switching startup circuit to a negative rail of the auxiliary voltage bus; coupling a first diode of the switching startup circuit to the first terminal; coupling a second diode of the switching startup circuit to the first diode at a first node and to the second terminal; and coupling a resistor of the switching startup circuit to the first node; wherein the resistor is configured to receive a voltage based on an input voltage.

39. The method of claim 38, wherein coupling the switching startup circuit to the auxiliary voltage bus further comprises: coupling a switching device coupled to the resistor; and coupling a control network to the switching device; wherein the control network is configured to control switching of the switching device into conducting and non-conducting states.

40. The method of claim 39, wherein coupling the control network to the switching device comprises: coupling a control network resistor divider to a control terminal of the switching device; coupling a control network switching device to the control network resistor divider; and coupling an enable input to the s control network witching device for controlling the control network switching device into an on state or into an off state.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The drawings illustrate embodiments presently contemplated for carrying out embodiments of the present disclosure.

[0010] In the drawings:

[0011] FIG. 1 illustrates a schematic block diagram of a synchronous buck converter circuit.

[0012] FIG. 2 illustrates a schematic block diagram of a non-synchronous buck converter circuit according to an embodiment.

[0013] FIG. 3 illustrates a gate driver circuit according to another embodiment.

[0014] FIG. 4 illustrates waveforms of a control scheme according to an embodiment.

[0015] FIG. 5 illustrates a switching start-up circuit according to an embodiment.

[0016] FIG. 6 illustrates a switching start-up circuit according to another embodiment.

[0017] While the present disclosure is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure. Note that corresponding reference numerals indicate corresponding parts throughout the several views of the drawings.

DETAILED DESCRIPTION

[0018] Examples of the present disclosure will now be described more fully with reference to the accompanying drawings. The following description is merely exemplary in nature and is not intended to limit the present disclosure, application, or uses.

[0019] Example embodiments are provided so that this disclosure will be thorough and will fully convey the scope to those who are skilled in the art. Numerous specific details are set forth such as examples of specific components, devices, and methods, to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In some example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.

[0020] Although the disclosure hereof is detailed and exact to enable those skilled in the art to practice the invention, the physical embodiments herein disclosed merely exemplify the invention which may be embodied in other specific structures. While the preferred embodiment has been described, the details may be changed without departing from the invention, which is defined by the claims.

[0021] FIG. 2 illustrates a schematic block diagram of a non-synchronous buck converter circuit 200 according to an embodiment. Compared with the synchronous buck converter 100 when higher voltage rated components are used in response to higher input voltages that exceed a certain threshold (e.g., V.sub.bulk > 100 V), the use of higher voltage rated components in the non-synchronous buck converter circuit 200 provides an improvement in switching and reverse-recovery related losses.

[0022] As illustrated, the non-synchronous buck converter circuit 200 includes a high-side switch Q.sub.1, a buck inductor L.sub.1, and a buck diode D.sub.1, which replaces the controlled low-side switch Q.sub.2 of the synchronous buck converter 100 in FIG. 1 with a non-controlled switching device. The high-side switch Q.sub.1 is a controlled switch and has a gate terminal 202 and a source terminal 204. Control of the high-side switch Q.sub.1 into a conducting or on state and control of the switch Q.sub.1 into a non-conducting or off state is accomplished with a control circuitry block 206. By appropriately driving the high-side switch Q.sub.1 with the control circuitry block 206, a desired output voltage may be provided to a load 208 via a pair of output terminals 210, 212. The desired output voltage is less than the voltage input provided to the circuit 200 via a pair of input terminals 214, 216 in the buck converter arrangement illustrated in FIG. 2.

[0023] As switch Q.sub.1 is a high-side switch, the source terminal 204 is referenced to the switch-node voltage v.sub.sw, which is across the buck diode D.sub.1, and is not referenced to the signal ground 218. A bootstrap circuit, often used to control the high-side switch Q.sub.1, can fail or provide less-than-optimal control in scenarios including light load or low power operation and in battery/capacitor charging loads. At light loads, the bootstrap circuit can fail to adequately charge its capacitor (C.sub.b, not shown) when the average current flowing through buck diode D.sub.1 falls below the average bootstrap current. In the case where an output voltage is already present on the converter before start-up (e.g., a battery/capacitor charging load), the bootstrap diode (D.sub.b, not shown) is always reversed biased, and the bootstrap circuit cannot start up.

[0024] FIG. 3 illustrates an example of the non-synchronous buck converter circuit 200 of FIG. 2 incorporating a novel high-side gate-drive circuit 300 capable of driving the high-side switch Q.sub.1 of FIG. 2 according to an embodiment. Gate-drive circuit 300 includes a high-side gate driver integrated circuit (IC) 302 such as one commonly available in the marketplace. Gate driver IC 302 includes a VCC input 304 (“VCC”) configured to receive a supply voltage such as a Vcc voltage 306 from a voltage source (not shown) and includes a ground input 308 (“GND”) coupleable to a voltage source ground. An output stage supply input 310 (“VB”) is configured to receive an output stage supply voltage on a positive rail 312 of an auxiliary voltage bus 314 that, when provided by a high-side drive output 316 (“HO”), drives the high-side switch Q.sub.1. A high-side floating offset output 318 (“VS”) is coupled to a negative auxiliary voltage bus 320 of the auxiliary voltage bus 314 and is coupled to the source terminal 204 of the high-side switch Q.sub.1 to provide a reference for the v.sub.gs voltage across the gate and source terminals 202, 204. The gate driver IC 302 also includes a logic input 322 (“IN”) that drives the supply of the output stage supply voltage from the output stage supply input 310 to the high-side drive output 316. That is, in response to a logic high v.sub.pwm signal into the logic input 322, the output stage supply input 310 substantially passes through to the high-side drive output 316. In response to a logic low v.sub.pwm signal into the logic input 322, the high-side drive output 316 is substantially cut off from the output stage supply input 310. The HO output 316 is coupled to the gate terminal 202 of the high-side switch Q.sub.1 through a current-limiting resistor R.sub.g. The gate terminal 202 of the high-side switch Q.sub.1 is coupled to the source terminal 204 through a pull-down resistor 204, which guarantees that the gate terminal 202 is always pulled to ground when no PWM is applied.

[0025] Since the source terminal 204 is referenced to the switch-node voltage v.sub.sw rather than to the signal ground 218, successfully driving the high-side switch Q.sub.1 into its on and off states is based on the generation of the supply voltage provided to the output stage supply input 310 that is also referenced to the switch-node voltage v.sub.sw rather than to the signal ground 218. The gate-drive circuit 300 generates a supply voltage referenced to the switch-node voltage v.sub.sw via an auxiliary winding 324 coupled in parallel to a voltage summer 326 that is coupled across the output stage supply input 310 and the high-side floating offset output 318. Additionally, the voltage summer 326 is coupled in parallel with a capacitor C.sub.b.

[0026] The auxiliary winding 324 includes a center-tapped connection 328 that splits the auxiliary winding 324 into a first auxiliary winding 330 and a second auxiliary winding 332. The auxiliary winding 324 is inductively coupled to the buck inductor L, and each first and second auxiliary windings 330, 332 has a winding ratio of 1:n, where 1 is the number of turns of the buck inductor L and n is the number of turns of the respective first and second auxiliary winding 330, 332. For example, if the buck inductor L has 100 turns and each of the first and second auxiliary windings 330, 332 has 6 turns, then the ratio of each first and second auxiliary winding 330, 332 is 100:6:6. In one embodiment, a transformer houses the buck inductor L as a primary winding and the auxiliary winding 324 as a secondary winding.

[0027] The voltage summer 326 includes a first diode D.sub.r1 having its anode coupled to the first auxiliary winding 330 and having its cathode coupled to a first connection of a first capacitor C.sub.r1. A second diode D.sub.r2 has its anode coupled to the second auxiliary winding 332 and has its cathode coupled to a first connection of a second capacitor C.sub.r2. A current limiting resistor R.sub.r is shown coupled between the center-tapped connection 328 and the second connections of the first and second capacitors C.sub.r1, C.sub.r2. While shown in FIG. 3, current limiting resistor R.sub.r is optional and can be removed. In this case, the center-tapped connection 328 would be directly coupled to the second connections of the first and second capacitors C.sub.r1, C.sub.r2. As used herein, a voltage summer is a type of voltage multiplier where the total voltage across multiple separately charged capacitors yields a total voltage. In a common type of voltage multiplier, a same or similar charge voltage is used to charge each capacitor of the voltage multiplier, resulting in the multiplication of the charge voltage by the number of capacitors. As described herein, however, the capacitors C.sub.r1, C.sub.r2 of the voltage summer 326 are not charged through the operation of the non-synchronous buck converter circuit 200 by the same or similar voltage value. The combined output of the capacitors C.sub.r1, C.sub.r2 is summed to provide the voltage v.sub.b for use in the circuit 200 as described. Although the voltage summer 326 does not function in the non-synchronous buck converter circuit 200 as a voltage doubler due to the mismatched charge voltages experienced in the arrangement of the circuit 200, the voltage summer 326 would act as a voltage doubler if both capacitors C.sub.r1, C.sub.r2 were charged with the same charge voltages.

[0028] FIG. 4 illustrates waveforms of a control scheme 400 according to an embodiment. Referring to FIGS. 3 and 4, operation of the gate-drive circuit 300 as a high-side switch driver includes a PWM signal, v.sub.pwm, provided by one or more PWM generators or controllers (e.g., a microcontroller) such as PWM controller 334. In one embodiment, the PWM signal is a digital PWM (DPWM) signal where a voltage of V.sub.dd yields a logic high signal 402 and a voltage of 0 V yields a logic low signal 404. In other embodiments, the PWM signal may be an analog signal.

[0029] In the switching operation of the control scheme 400 where the high-side switch Q.sub.1 is transitioned into its on and off states, the logic high signal 402 from the v.sub.pwm signal yields an on state transition of the high-side switch Q.sub.1 that supplies the bulk voltage V.sub.bulk to the buck inductor L such that the voltage across the buck inductor L equals V.sub.bulk - v.sub.o. Consequently, the voltage induced in each of the first and second auxiliary windings 330, 332 is n(V.sub.bulk - v.sub.o). In the first auxiliary winding 330, the voltage n(V.sub.bulk - v.sub.o) causes the first diode D.sub.r1 into a conducting state, and the first capacitor C.sub.r1 is charged across its first and second connections toward a voltage approaching the voltage n(V.sub.bulk - v.sub.o). In the second auxiliary winding 332, the voltage n(V.sub.bulk - v.sub.o) causes the second diode D.sub.r2 into a non-conducting state; thus, the voltage n(V.sub.bulk - v.sub.o) is not used to charge the second capacitor C.sub.r2.

[0030] The logic low signal 404 from the v.sub.pwm signal yields an off state transition of the high-side switch Q.sub.1, causing the voltage across the buck inductor L to reverse and causing the voltage n(-v.sub.o) to be generated across the buck inductor L. The voltage n(-v.sub.o) in the first auxiliary winding 330 causes the first diode D.sub.r1 to enter a non-conducting state, and the first capacitor C.sub.r1 is not charged based on the voltage n(-v.sub.o). However, in the second auxiliary winding 332, the voltage n(-v.sub.o) causes the second diode D.sub.r2 to conduct and charge the second capacitor C.sub.r2 across its first and second connections toward a voltage approaching the voltage n(-v.sub.o).

[0031] In response to controlling the high-side switch Q.sub.1 into its on and off transition states, the first and second capacitors C.sub.r1, C.sub.r2 are thus respectively charged to the voltages n(V.sub.bulk - v.sub.o) and n(-v.sub.o). Due in part to at least the arrangements of the windings of the first and second auxiliary windings 330, 332 and the arrangements of the first and second diodes D.sub.r1, D.sub.r2, the negative voltage n(-v.sub.o) with respect to the first and second connections of the second capacitor C.sub.r2 and the positive voltage n(V.sub.bulk - v.sub.o) with respect to the first and second connections of the second capacitor C.sub.r2, the voltage v.sub.b across the capacitor C.sub.b is the sum of n(V.sub.bulk - v.sub.o) - n(-v.sub.o), which yields the voltage n(V.sub.bulk) (as illustrated in FIG. 4) across the capacitor C.sub.b and presented to the output stage supply input 310.

[0032] The switching operation described above takes advantage of the voltage generated across the auxiliary winding 324 to generate the voltage v.sub.b that provides the voltage/current from the high-side drive output 316 to drive the gate terminal 202 of the high-side switch Q.sub.1. Accordingly, generation of the voltage v.sub.b is based on the voltage generated across the auxiliary winding 324 while the voltage v.sub.b is used to transition the high-side switch Q.sub.1 between its on and off states to generate the voltage across the buck inductor L. Therefore, without the voltage v.sub.b, the high-side switch Q.sub.1 cannot be switched on and off, which in turn causes no voltage transitions across the buck inductor L to generate the voltage v.sub.b. Thus, one or other of the voltage v.sub.b and the voltage across the buck inductor L can be helped by an additional voltage source in order to provide the voltage to start the voltage generation cycle.

[0033] According to one embodiment, the gate-drive circuit 300 includes a switching start-up block 336 having a first output terminal 338 and a second output terminal 340 coupled in parallel with the capacitor C.sub.b that is used to provide an initial voltage to the output stage supply input 310 sufficient to begin controlling the high-side switch Q.sub.1 between its on and off states. Once the switch begins to transition between its on and off states, a voltage is generated across the auxiliary winding 324, which then supplies the output stage supply input 310.

[0034] FIG. 5 illustrates a switching start-up circuit 500 usable in the switching start-up block 336 according to an embodiment. A resistor R.sub.S has a first terminal coupled to receive the voltage V.sub.bulk received on the input terminal 214 of the non-synchronous buck converter circuit 200. A second terminal of the resistor R.sub.S is coupled to a node 502 coupling the cathode of a Zener diode D.sub.Z to the anode of a diode D.sub.S. The cathode of the diode D.sub.S is coupled to the first output terminal 338, which is connected to the positive rail 312 of the auxiliary voltage bus 314, and the anode of the Zener diode D.sub.Z is coupled to the second output terminal 340, which is coupled to the negative rail 320 of the auxiliary voltage bus 314. As stated above, embodiments described herein can be used in response to higher input voltages (e.g., V.sub.bulk) that exceed a certain threshold (e.g., V.sub.bulk > 100 V). Accordingly, the voltage drop across the resistor R.sub.S together with the voltage of the Zener diode D.sub.z less the voltage drop across the diode D.sub.S is provided to the positive rail 312 of the auxiliary voltage bus 314. While the components of the auxiliary winding 324 and the voltage summer 326 may be sized to provide a target current (e.g., 10 mA) to the gate driver IC 302 for gate control of the high-side switch Q.sub.1, they are subject to much lower voltages due to the turns ratio identified above. In contrast, the supply of the same level of current through the resistor R.sub.S together with the voltage across the resistor R.sub.S due to the voltage step-down from V.sub.bulk to v.sub.b is likely to damage the resistor R.sub.S. However, reducing the level of current through the resistor R.sub.S to a value such as 0.5 mA can be sufficient in the initial start-up of the gate-drive circuit 300 sufficient to start the switching that generates the voltage v.sub.b from the buck inductor L. After switching has started generating the voltage v.sub.b, the current provided by the switching start-up circuit 500 does not need to be relied on to maintain the voltage v.sub.b generation. However, while the switching start-up circuit 500 will continue to provide such current to the auxiliary voltage bus 314, the lower current is much less detrimental to the life and operation of the resistor R.sub.S.

[0035] One effect of adding the switching start-up circuit 500 to the gate-drive circuit 300 can include the input bulk voltage V.sub.bulk pulling the output voltage v.sub.o up through the resistor R.sub.S in the case where the converter 200 is disabled (e.g., v.sub.pwm is off). For example, the resistor R.sub.S may form a resistive potential divider circuit with a voltage sense network (not shown) across the output of the converter 200. In this case, an output voltage v.sub.o of 50% or more of the bulk voltage V.sub.bulk may exist even when the non-synchronous buck converter circuit 200 is off. FIG. 6 illustrates a switching start-up circuit 600 according to another embodiment that addresses the voltage pull-up effect.

[0036] The switching start-up circuit 600 includes an enable circuit 602 positioned between the resistor R.sub.S and the input bulk voltage V.sub.bulk. The enable circuit 602 has a switch Q.sub.s serially coupled between the resistor R.sub.S and the input bulk voltage V.sub.bulk. In one embodiment, the switch Q.sub.s is a p-type transistor. Controlling the on and off states of the switch Q.sub.s is a control network including serially connected resistors R.sub.1 and R.sub.2 coupled to a control terminal (e.g., base terminal) of the switch Q.sub.s. Resistor R.sub.1 is also connected to the input bulk voltage V.sub.bulk, while the resistor R.sub.2 is further connected to a second switch Q.sub.EN controlled by a resistor R.sub.3 coupled to an enable (“EN”) input, which receives an enable control signal indicating whether the switch Q.sub.S should be on or off. When the enable input indicates that the switch Q.sub.S should be on (e.g., a logic high signal), switch Q.sub.EN conducts, causing the voltage divider provided by the resistors R.sub.1 and R.sub.2 to turn on the switch Q.sub.S. In this manner, the switching start-up circuit 600 is operated to provide the initial voltage v.sub.b for start-up of the gate-drive circuit 300. When the enable input indicates that the switch Q.sub.S should be off (e.g., a logic low signal), switch Q.sub.EN stops conducting, causing the voltage divider provided by the resistors R.sub.1 and R.sub.2 to turn the switch Q.sub.S off. In this manner, the resistor R.sub.S is disconnected from the input bulk voltage V.sub.bulk and does not provide voltage or current to the auxiliary voltage bus 314.

[0037] Embodiments of the disclosure provide an auxiliary winding buck-converter high-side gate driver to create a floating supply, which powers the bias voltage of a high-side gate drive IC. The embodiments provide improved voltage conversion solutions for both battery-capacitor charging operations and low-power operations. For example, such embodiments offer a minimization of performance conditions at light-load operation, are suitable for battery charging applications, and do not pull up the output voltage when the converter is disabled.

[0038] While the invention has been described in detail in connection with only a limited number of embodiments, it should be readily understood that the invention is not limited to such disclosed embodiments. Rather, the invention can be modified to incorporate any number of variations, alterations, substitutions, or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the present disclosure. Additionally, while various embodiments of the present disclosure have been described, it is to be understood that aspects of the present disclosure may include only some of the described embodiments. Accordingly, the invention is not to be seen as limited by the foregoing description but is only limited by the scope of the appended claims.