Chip Resistor
20180158578 ยท 2018-06-07
Inventors
Cpc classification
H01C7/00
ELECTRICITY
H01C1/148
ELECTRICITY
H01C1/142
ELECTRICITY
H01C17/02
ELECTRICITY
H01C1/14
ELECTRICITY
International classification
Abstract
Provided is a chip resistor in which cracks, fracture, etc. can be surely prevented from occurring due to thermal stress in solder bonding portions. The chip resistor 1 includes: a ceramic substrate 2 that is shaped like a cuboid; a pair of front electrodes 3 that are provided on lengthwise opposite end portions of a front surface of the ceramic substrate 2; a resistor body 4 that is provided between and connected to the two front electrodes 3; a protective layer 5 that covers the resistor body 4; a pair of back electrodes 6 that are provided on lengthwise opposite end portions of a back surface of the ceramic substrate 2; end-surface electrodes 7 through which the front electrodes 3 and the back electrodes 6 are electrically conductively connected to each other respectively; external electrodes 8 that cover the end-surface electrodes 7; and a pair of insulating resin layers 9 that are provided to cover edge portions of the back electrodes 6; wherein: the pair of insulating resin layers 9 are opposed to each other with interposition of a predetermined interval therebetween on the back surface of the ceramic substrate 2; and at least opposed side end portions of the insulating resin layers 9 are exposed from the external electrodes 8.
Claims
1. A chip resistor comprising: a ceramic substrate that is shaped like a cuboid; a pair of front electrodes that are provided on lengthwise opposite end portions of a front surface of the ceramic substrate; a resistor body that is provided between and connected to the pair of front electrodes; a protective layer that covers the resistor body; a pair of back electrodes that are provided on lengthwise opposite end portions of a back surface of the ceramic substrate; end-surface electrodes through which the front electrodes and the back electrodes are electrically conductively connected to each other respectively; and external electrodes that cover the end-surface electrodes; wherein: a pair of insulating resin layers are formed on the back surface of the ceramic substrate with interposition of a predetermined interval therebetween so as to cover edge portions of the back electrodes; and at least opposed side end portions of the insulating resin layers are exposed from the external electrodes.
2. A chip resistor according to claim 1, wherein: the end-surface electrodes are formed on regions of the back electrodes except the edge portions thereof so as to be connected to the insulating resin layers.
3. resistor according to claim 2, wherein: the insulating resin layers are formed like belts to extend from one widthwise end portions of the back surface of the ceramic substrate to the other widthwise end portions of the back surface of the ceramic substrate.
Description
BRIEF DESCRIPTION OF DRAWINGS
[0016]
[0017]
[0018]
[0019]
[0020]
[0021]
DESCRIPTION OF EMBODIMENTS
[0022] Embodiments of the invention will be described below with reference to the drawings. As shown in
[0023] The ceramic substrate 2 is an insulating substrate containing alumina as a main component. A large-sized substrate which will be described later is divided along primary division grooves and secondary division grooves which extend lengthwise and widthwise. Thus, a large number of such ceramic substrates 2 are obtained.
[0024] The pair of front electrodes 3 are obtained by screen-printing, drying and sintering an Ag-based paste. The resistor body 4 is obtained by screen-printing, drying and sintering a resistor paste of ruthenium oxide etc. Lengthwise opposite end portions of the resistor body 4 overlap with the front electrodes 3 respectively. Although not shown, a trimming groove is formed in the resistor body 4 in order to adjust a resistance value thereof.
[0025] The protective layer 5 is formed into a two-layer structure consisting of an undercoat layer and an overcoat layer. Of the two-layer structure, the undercoat layer is obtained by screen-printing, drying and sintering a glass paste, and the overcoat layer is obtained by screen-printing and thermally curing an epoxy resin-based paste.
[0026] The pair of back electrodes 6 are obtained by screen-printing, drying and sintering the Ag-based paste. The pair of end-surface electrodes 7 are formed out of NiCr etc. sputtered on end surfaces of the ceramic substrate 2.
[0027] The pair of external electrodes 8 are formed out of Ni, Sn, or the like with which front surfaces of the end-surface electrodes 7 are electroplated. As will be described later, solder bonding is applied to the external electrodes 8 when the chip resistor 1 is mounted on a circuit board.
[0028] The pair of insulating resin layers 9 are obtained by screen-printing and thermally curing an epoxy resin paste. One end sides of the insulating resin layers 9 are opposed to each other with interposition of a predetermined interval therebetween on the back surface of the ceramic substrate 2. The other end sides of the insulating resin layers 9 overlap with the edge portions of the back electrodes 6.
[0029] As shown in
[0030] In addition, even when force acts in a direction to peel the back electrodes 6 from the back surface of the ceramic substrate 2 due to thermal stress during mounting of the chip resistor 1, the edge portions of the back electrodes 6 are covered with the insulating resin layers 9 to be prevented from being separated easily. Therefore, no cracks occur along boundaries between the back electrodes 6 and the ceramic substrate 2. Further, the insulating resin layers 9 overlap with the front surfaces of the edge portions of the back electrodes 6. Steps at portions extending from side surfaces of the insulating resin layers 9 to the front surfaces of the back electrodes 6 can be used to increase thicknesses of the solders 12. Therefore, it is possible to prevent cracks, fracture, etc. from occurring due to thermal stress.
[0031] Next, a manufacturing method for the chip resistor 1 configured as described above will be described with reference to
[0032] First, as shown in
[0033] That is, an Ag paste screen-printed on the back surface of the large-sized substrate 20A is dried. Thus, as shown in
[0034] Next, a resistor paste of ruthenium oxide or the like screen-printed on the front surface of the large-sized substrate 20A is dried and sintered. Thus, as shown in
[0035] Next, as a material for reducing damage on the resistor bodies 4 during formation of trimming grooves, a glass paste is screen-printed, dried and sintered. Thus, an undercoat layer covering the resistor bodies 4 is formed. Then, the trimming grooves are formed in the resistor bodies 4 from above the undercoat layer to thereby adjust resistance values of the resistor bodies 4. Thereafter, a resin paste such as an epoxy resin-based paste screen-printed on the undercoat layer is thermally cured so that an overcoat layer covering the undercoat layer can be formed. Thus, as shown in
[0036] Incidentally, the back electrodes 6 may be formed out of resin silver in place of the sintered silver. In this case, sintering temperature of the resistor paste is considerably higher than melting temperature of the resin silver. Therefore, the back electrodes 6 may be formed out of the resin silver after the resistor bodies 4 and the protective layers 5 are formed. In addition, when the chip resistor 1 in which the back electrodes 6 are formed out of the resin silver in this manner is mounted, outgas is generated also from the resin contained in the back electrodes 6 by heating during solder bonding. However, the outgas can escape not through solders but through insulating resin layers 9 covering edge portions of the back electrodes 6. Accordingly, it is possible to prevent solder burst from occurring or firm adhesion from deteriorating due to the outgas even when the back electrodes 6 are formed out of the resin silver.
[0037] Next, an epoxy resin paste screen-printed on the back surface of the large-sized substrate 20A is thermally cured. Thus, as shown in
[0038] The steps so far are processed in batch on the large-sized substrate 20A. Next, after the large-sized substrate 20A is broken (primarily divided) along the primary division grooves 21 into strip-shaped substrates 20B, NiCr is sputtered on divided surfaces of the strip-shaped substrates 20B. Thus, as shown in
[0039] Then, the strip-shaped substrates 20B are broken (secondarily divided) along the secondary division grooves 22. Thus, single chips (individual pieces) equal in size to the chip resistor 1 are obtained. Then, the single chips which have been divided separately and individually are electroplated with Ni, Sn, or the like. Thus, external electrodes 8 are formed to be deposited on the exposed front electrodes 3, the exposed end-surface electrodes 7, and front surfaces of the exposed back electrodes 6. As a result, chip resistors 1 shown in
[0040]
[0041] The chip resistor 30 according to the second embodiment is different from the chip resistor 1 according to the first embodiment at a point that each of insulating resin layers 9 is formed like a belt to extend from one widthwise end portion of aback surface of a ceramic substrate 2 to the other widthwise end portion of the back surface of the ceramic substrate 2 (from an upper side to a lower side in
[0042] That is, as shown in
[0043] Also in the chip resistor 30 configured thus, the edge portions of a pair of the back electrodes 6 are covered with the insulating resin layers 9 respectively in the same manner as in the chip resistor 1 according to the first embodiment. Accordingly, it is possible to prevent solder burst from occurring or firm adhesion from deteriorating due to outgas, and it is possible to prevent cracks from occurring along boundaries between the back electrodes 6 and the ceramic substrate 2. In addition, steps at portions extending from side surfaces of the insulating resin layers 9 to front surfaces of the back electrodes 6 can be used to increase thicknesses of solder bonding portions. Accordingly, it is possible to prevent cracks, fracture, etc. from occurring due to thermal stress.
[0044] Further, in the chip resistor 30 according to the second embodiment, the end-surface electrodes 7 are also formed on the regions of the back electrodes 6 except the edge portions thereof to be connected to the insulating resin layers 9. The boundary portions P between the back electrodes 6 and the insulating resin layers 9 are covered with the end-surface electrodes 7 entirely. Therefore, when the chip resistor 30 is used in a corruptive atmosphere in which a large amount of sulfide gas is present, silver (Ag) contained in the back electrodes 6 do not react with the sulfide gas to generate silver sulfide. Thus, it is possible to prevent the back electrodes 6 from being sulfurized. In addition, each of the insulating resin layers 9 is formed like a belt to extend one widthwise end portion of the back surface of the ceramic substrate 2 to the other widthwise end portion of the back surface of the ceramic substrate 2. When the end-surface electrodes 7 are formed by sputtering or coating, the insulating resin layers 9 function as stoppers so that the end-surface electrodes 7 excellent in linearity can be formed. Accordingly, linearity of the shape of each of the external electrodes 8 deposited on the end-surface electrodes 7 can be enhanced. As a result, as shown in
[0045] Incidentally, when a pair of insulating resin layers 9 isolated from each other with interposition of a predetermined interval therebetween are formed by screen-printing a resin paste in the case of a chip resistor small in external size, the two insulating resin layers 9 maybe connected to each other due to printing sagging. Even in such a case, functions and effects of the invention can be still obtained.
REFERENCE SIGNS LIST
[0046] 1, 30 chip resistor
[0047] 2 ceramic substrate
[0048] 3 front electrode
[0049] 4 resistor body
[0050] 5 protective layer
[0051] 6 back electrode
[0052] 7 end-surface electrode 7
[0053] 8 external electrode
[0054] 9 insulating resin layer
[0055] 10 circuit board
[0056] 11 land
[0057] 12 solder
[0058] 20A large-sized substrate
[0059] 20B strip-shaped substrate
[0060] 21 primary division groove
[0061] 22 secondary division groove