Abstract
The present invention discloses an offset-printing method for a three-dimensional 3D-oP (three-dimensional offset-printed memory)-based package. The mask-patterns for different 3D-op dice are merged onto a same data-mask. At different printing steps, a wafer is offset by different values with respect to the data-mask. Accordingly, data-patterns from a same data-mask are printed into different 3D-oP dice.
Claims
1. An offset-printing method for a three-dimensional 3D-oP (three-dimensional offset-printed memory)-based package, comprising the steps of: 1) forming a substrate circuit on a semiconductor wafer, wherein said wafer comprises at least first, second and fourth 3D-oP dice, with said second 3D-oP die adjacent to said first 3D-oP die along the y direction and said fourth 3D-oP die adjacent to said first 3D-oP die along the x direction; 2) a first printing step for transferring a first plurality of mask patterns of a data-mask to a first data-coding layer in said first, second and fourth 3D-oP dice, wherein an origin of said data-mask is initially aligned to an origin of said first die at said first printing step; 3) a second printing step for transferring a second plurality of mask patterns of said data-mask to a second data-coding layer in said first, second and fourth 3D-oP dice, wherein said origin of said data-mask is initially aligned to an origin of said second die at said second printing step; wherein said first and second plurality of mask patterns are from a same data-mask; and said first and fourth 3D-oP dice are vertically stacked in said 3-D package.
2. The method according to claim 1, wherein said data-mask comprises a plurality of mask regions whose patterns correspond to said first and second plurality of mask patterns.
3. The method according to claim 2, wherein said 3D-oP dice comprises at least first and second memory levels with said second memory level located above said first memory level, wherein said first data-coding layer is located in said first memory level and said second data-coding layer is located in said second memory level.
4. The method according to claim 3, wherein a mask pattern of a first mask-region is transferred to said first data-coding layer in said first die at said first printing step.
5. The method according to claim 3, wherein a mask pattern of a second mask-region is transferred to said first data-coding layer in said second die at said first printing step.
6. The method according to claim 3, wherein a mask pattern of a fourth mask-region is transferred to said first data-coding layer in said fourth die at said first printing step.
7. The method according to claim 3, wherein a mask pattern of a third mask-region is transferred to said second data-coding layer in said first die at said second printing step.
8. The method according to claim 4, wherein said mask pattern of said first mask-region is transferred to said second data-coding layer in said second die at said second printing step.
9. The method according to claim 3, wherein a mask pattern of a sixth mask-region is transferred to said second data-coding layer in said fourth die at said second printing step.
10. The method according to claim 2, wherein said 3D-oP dice comprises at least a memory level, wherein said first and second data-coding layers are located in said memory level.
11. The method according to claim 10, wherein a mask pattern of a first mask-region is transferred to said first data-coding layer in said first die at said first printing step.
12. The method according to claim 10, wherein a mask pattern of a second mask-region is transferred to said first data-coding layer in said second die at said first printing step.
13. The method according to claim 10, wherein a mask pattern of a fourth mask-region is transferred to said first data-coding layer in said fourth die at said first printing step.
14. The method according to claim 10, wherein a mask pattern of a third mask-region is transferred to said second data-coding layer in said first die at said second printing step.
15. The method according to claim 11, wherein the said mask pattern of said first mask-region is transferred to said second data-coding layer in said second die at said second printing step.
16. The method according to claim 10, wherein a mask pattern of a sixth mask-region is transferred to said second data-coding layer in said fourth die at said second printing step.
17. The method according to claim 1, wherein a displacement between said first and second 3D-oP dice is smaller than a stepping distance of said first printing step.
18. The method according to claim 1, wherein a displacement between said first and second 3D-oP dice is smaller than a stepping distance of said second printing step.
19. The method according to claim 1, wherein said first or second printing step is photo-lithography.
20. The method according to claim 1, wherein said first or second printing step is imprint-lithography.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) FIG. 1 is a cross-sectional view of a ?2?1 3D-MPROM along the cut-line AA of FIGS. 2A-2B;
(2) FIGS. 2A-2B disclose two data-masks for the ?2?1 3D-MPROM in prior arts;
(3) FIG. 3 is a cross-sectional view of a ?1?2 3D-MPROM along the cut-line BB of FIGS. 4A-4B;
(4) FIGS. 4A-4B disclose two data-masks for the ?1?2 3D-MPROM in prior arts;
(5) FIGS. 5A-5B illustrate the printing steps used in a preferred offset-printing means;
(6) FIG. 6 discloses an exemplary multi-region data-mask;
(7) FIGS. 7A-7B disclose the data-arrays m(1), m(2) represented by the two data-mask regions on the multi-region data-mask;
(8) FIGS. 8A-8B are the cross-sectional views of two 3D-oP dice 18a, 18b from a preferred ?2?1 3D-oP batch;
(9) FIGS. 9A-9B disclose two data-arrays p.sub.18a[1], p.sub.18a[2] for the two memory levels 16A, 16B of the 3D-oP die 18a;
(10) FIGS. 10A-10B are the cross-sectional views of two dice 18c, 18d from a preferred ?1?2 3D-oP batch;
(11) FIGS. 11A-11B disclose two data-arrays p.sub.18a[1,1], p.sub.18c[1,2] for Bit-1, Bit-2 of the die 18c;
(12) FIG. 12 is a circuit block diagram of a preferred 3D-oP;
(13) FIG. 13A is a circuit block diagram for the preferred ?2?1 3D-oP; FIG. 13B is a circuit block diagram for the preferred ?1?2 3D-oP;
(14) FIG. 14 is a cross-sectional view of a preferred ?2?2 3D-oP;
(15) FIG. 15 illustrates a multi-region data-mask for the preferred ?2?2 3D-oP and all dice in an exposure field;
(16) FIG. 16 is a table listing each data-array in each die after each printing step for the preferred ?2?2 3D-oP;
(17) FIG. 17 is a circuit block diagram of the preferred ?2?2 3D-oP;
(18) FIG. 18 is a cross-sectional view of a preferred ?3?3?1 3D.sup.2-oP;
(19) FIG. 19 is a circuit block diagram of the preferred 3D.sup.2-oP;
(20) FIG. 20 illustrates a multi-region data-mask for the preferred 3D.sup.2-oP and all dice in an exposure field;
(21) FIG. 21 is a table listing each data-array in each die after each printing step for the preferred 3D.sup.2-oP;
(22) FIG. 22 is a table listing three types of packages in a 3D.sup.2-oP batch.
(23) It should be noted that all the drawings are schematic and not drawn to scale. Relative dimensions and proportions of parts of the device structures in the figures have been shown exaggerated or reduced in size for the sake of clarity and convenience in the drawings. The same reference symbols are generally used to refer to corresponding or similar features in the different embodiments.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
(24) Those of ordinary skills in the art will realize that the following description of the present invention is illustrative only and is not intended to be in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons from an examination of the within disclosure.
(25) In order to reduce the total number of data-masks, the present invention discloses a three-dimensional offset-printed memory (3D-oP). It records data with an offset-printing means. Offset-printing is a printing means. Major printing means includes photo-lithography and imprint-lithography (referring to the U.S. Pat. App. 61/529,919, Three-Dimensional Printed Memory): photo-lithography uses data-masks to print data, whereas imprint-lithography uses data-templates (also referred to as master, stamp, or mold) to print data.
(26) Referring now to FIGS. 5A-5B, an overview of the offset-printing means is disclosed. It uses a multi-region data-mask 8. In this example, this multi-region data-mask 8 comprises the mask-patterns for two different memory levels 16A, 16B. They are located in the data-mask regions 8a, 8b, respectively.
(27) The preferred offset-printing means comprises two printing steps. At the 1.sup.st printing step (FIG. 5A, i.e. lithography A to code the first memory level 16A), the origin O.sub.18a of the die 18a is initially aligned to the origin O.sub.M of the data-mask region 8a. During exposure E.sub.1a, the data-mask regions 8a is printed to the data-coding layer 6A for the memory level 16A of the dice 18a, while the data-mask regions 8b is printed to the data-coding layer 6A for the memory level 16A of the dice 18b.
(28) At the 2.sup.nd printing step (FIG. 5B, i.e. lithography B to code the second memory level 16B), the alignment position of the wafer 9 is offset by a value of ?.sub.y from its alignment position at the 1.sup.st printing step. Let d.sub.y be the displacement between the dice 18a and 18b. If ?.sub.y=d.sub.y, the origin O.sub.18b of the die 18b is initially aligned to origin O.sub.M. During exposure E.sub.2a, the data-mask region 8a is printed to the data-coding layer 6B for the memory level 16B of the die 18b.
(29) During the next exposure E.sub.2b, as long as the stepping distance D.sub.y is twice the displacement d.sub.y between adjacent dice, the data-mask region 8b will be printed to the data-coding layer 6B for the memory level 16B of the die 18a. Finally, on the finished wafer 9, in the die 18a, the data-mask regions 8a, 8b are printed to the data-coding layers 6A, 6B for the memory levels 16A, 16B, respectively; while in the die 18b, they are printed to the data-coding layers 6B, 6A for the memory levels 16B, 16A, respectively.
(30) FIG. 6 discloses more details on an exemplary multi-region data-mask 8. Each of its data-mask regions 8a, 8b is comprised of an array of mask cells aa-bd. In the data-mask region 8a, the clear mask-patterns at the mask cells ca, bb, ab form mask-openings 8ca, 8xb. In the data-mask region 8b, the clear mask-patterns at the mask cells aa, da, bb form mask-openings 8aa, 8da, 8bb. If the following convention is used: the dark mask-pattern represents 0 and the clear mask-pattern represents 1, the digital values represented by each mask cell in the data-mask region 8a form a data-array m(1) (FIG. 7A), while the digital values represented by each mask cell in the data-mask region 8b form a data-array m(2) (FIG. 7B).
(31) Referring now to FIGS. 8A-8B, two dice 18a, 18b from a preferred ?2?1 3D-oP batch are disclosed. In a 3D-oP batch, all dice are manufactured with the same mask set, and all dice have the same 3-D frame. Here, a 3-D frame comprises all address lines in the 3-D stack, but no data-coding layer. In this example, the data for both dice 18a and 18b are printed from the same data-mask 8. FIG. 8A discloses the ?2?1 3-D stack 16a of the die 18a. The data-coding layer 6A of the memory level 16A is printed from the data-mask region 8a, while the data-coding layer 6B of the memory level 16B is printed from the data-mask region 8b. Here, the following convention is used: absence of a data-opening represents 0 and existence of a data-opening represents 1. Accordingly, in the 3D-oP die 18a, the digital values stored in all memory cells in the memory level 16A form a data-array p.sub.18a[1] of FIG. 9A; the digital values stored in all memory cells in the memory level 16B form a data-array p.sub.18a[2] of FIG. 9B. It can observed that the data-array p.sub.18a[1] is same as the mask data-array m(1) of FIG. 7A, i.e. p.sub.18a[1]=m(1); and, the data-array p.sub.18a[2] is same as the mask data-array m(2) of FIG. 7B, i.e. p.sub.18a[2]=m(2).
(32) On the other hand, FIG. 8B discloses the ?2?1 3-D stack 16b of the die 18b. The data-coding layer 6A of the memory level 16A is printed from the data-mask region 8b, while the data-coding layer 6B of the memory level 16B is printed from the data-mask region 8a. Similarly, for die 18b, p.sub.18b[1]=m(2), p.sub.18b[2]=m(1).
(33) In a 3D-oP batch, an ordered list (e.g. from the one closet to the substrate to the one farthest from the substrate) of all data-arrays (including the arrays for all memory levels and all bits-in-a-cell) in each 3D-oP die forms a data-array sequence S. A collection of these data-arrays forms a data-array set. By definition, the value of a set is only related to its elements, not the order of these elements. For the dice 18a, 18b of FIGS. 8A-8B, their data-array sequence can be expressed as:
{S.sub.18a}={p.sub.18a[1],p.sub.18a[2]}={m(1),m(2)};
{S.sub.18b}={p.sub.18b[1],p.sub.18b[2]}={m(2),m(1)};
with {S.sub.18a}={S.sub.18b}, but S.sub.18a?S.sub.18b.
It can be observed that, the data-array set of the die 18a is same as that of the die 18b, while the data-array sequence of the die 18a is a reverse of that of the die 18b. To access the same data, different memory level needs to be accessed in the die 18b than that in the die 18a.
(34) Referring now to FIGS. 10A-10B, offset-printing can also be applied to the 3D-MPROM with n bits-per-cell (bpc). Similarly, the mask-patterns for two different bits-in-a-cell are merged onto a multi-region data-mask. At different printing steps, the wafer is offset by different values with respect to the multi-region data-mask. Accordingly, various data-patterns from the same data-mask are printed into data-coding layers for different bits-in-a-cell. Two ?1?2 3D-oP dice 18c, 18d from a preferred 3D-oP batch are illustrated in FIG. 10A-10B.
(35) FIG. 10A discloses an ?1?2 3-D stack 16c of die 18c. Each memory cell (e.g. 5aa) in the memory level 16A stores two bits: Bit-1 and Bit-2. Bit-1 is represented by a first data-coding layer 6C, i.e. an extra-implanted layer 3i; Bit-2 is represented by a second data-coding layer 6D, i.e. a resistive layer 3r. The data-coding layer 6C of Bit-1 is printed from the data-mask region 8a, while the data-coding layer 6D of Bit-2 is printed from the data-mask region 8b. Here, the following convention is used: existence of an extra implant represents 0 and absence of an extra implant represents 1; existence of the resistive layer represents 0 and absence of the resistive layer represents 1. Accordingly, in the first memory level 16C of the 3D-oP die 18c, the digital values stored by Bit-1 form the data-array p.sub.18c[1,1] of FIG. 11A; the digital values stored by Bit-2 form the data-array p.sub.18c[1,2] of FIG. 11B. Here, p[i,j] means the data-array for j.sup.th-bit-in-a-cell on the i.sup.st memory level of the die 18c. It can be observed that, the data-array p.sub.18c[1,1] is opposite to the data-array m(1) of FIG. 7A, i.e. p.sub.18c[1,1]=?m(1); the data-array p.sub.18c[1,2] is equal to the data-array m(2) of FIG. 7B, i.e. p.sub.18c[1,2]=?m(2). Here, the symbol ? means 0, 1 are interchanged. Because the digital values in a data-array could change with definition, the polarity of the data-array has little meaning. In the present invention, two data-arrays are considered same if each bit in the first data-array and its corresponding bit in the second data-array have the same or opposite values.
(36) On the other hand, FIG. 10B discloses an ?1?2 3-D stack 16d of die 18d. In the first memory level 16C of the die 18d, the data-coding layer 6C for Bit-1 is printed from the data-mask region 8b, while the data-coding layer 6D for Bit-2 is printed from the data-mask region 8a. Accordingly, for the die 18d, p.sub.18d[1,1]=?m(2), p.sub.18d[1,2]=m(1).
(37) For the dice 18c and 18d of FIGS. 10A-10B, their data-array sequences can be expressed as:
S.sub.18c=(p.sub.18c[1,1],p.sub.18c[1,2])=(?m(1),m(2));
S.sub.18d=(p.sub.18d[1,1],p.sub.18d[1,2])=(?m(2),m(1));
with {S.sub.18c}={S.sub.18d}, but S.sub.18c?S.sub.18d.
It can be observed that, the data-array set of the die 18c is same as that of the die 18d, while the data-array sequence of the die 18c is a reverse of that of the die 18d. For the same input address, the bit-order of the output needs to be reversed.
(38) FIG. 12 is a circuit block diagram of a preferred 3D-oP 18. It comprises an ?M?n 3-D stack 16 and a configurable-I/O means 24. The 3-D stack 16 comprises M?n data-arrays. Here, the data-array for the j-th bit-in-a-cell in the i-th memory level is denoted by p[i,j] (1?i?j?n). The configurable-I/O means 24 comprises a sequence-memory 22, which stores the information related to the data-array sequence of this 3D-oP die. One example of the sequence-related information is chip ID. Chip ID is directly related to the location of the die on a wafer and can be used to extract the information related to its data-array sequence. The sequence-memory 22 is preferably an embedded non-volatile writable memory. For example, it may use direct-write memory, laser-programmable fuse and/or electrically-programmable memory. For the direct-write memory, the sequence-related information can be written during manufacturing. For the laser-programmable fuse, the sequence-related information can be written during or after manufacturing. For the electrically-programmable memory, the sequence-related information can be written after manufacturing.
(39) The configurable-I/O means 24, based on the sequence-related information, changes the input of the external I/O 28 and/or the output of the internal I/O 26 in such a way that the external I/O 26 shows no dependence on the data-array sequence. In other words, all 3D-oPs in the same batch, even though they might have different data-array sequence, appear to have the same external I/O 28 for users. More details on the 3D-oP circuit are disclosed in FIGS. 13A-13B.
(40) FIG. 13A is a circuit block diagram of the preferred ?2?1 3D-oP 18 from FIGS. 8A-8B. The input-address decoder 20I is shown in this figure. The 3-D stack 16 stores two data-arrays p[1], p[2] for the memory levels 16A, 16B, respectively. Here, the notation of data-arrays is simplified to p[i] (1?i?M) for the 1-bpc 3D-oP (i.e. each 3D-oP cell stores one bit). The input-address decoder 20I decodes the internal input address 26. For example, if the most significant bit of the internal input address 26 is 0, the data-array p[1] is accessed; otherwise p[2] is accessed. The configurable-I/O means 24 changes the value of the external input address 28 based on the sequence-related information: for the die 18a, the internal input address 26 is same as the external input address 28; for the die 18b, the most significant bit of the internal input address 26 is inverted from that of the external input address 28.
(41) FIG. 13B is a circuit block diagram of the preferred ?1?2 3D-oP 18 from FIGS. 10A-10B. The output buffer 20O is shown in this figure. The 3-D stack 16 stores two data-arrays p[1,1] and p[1,2] for Bit-1 and Bit-2. The output buffer 20O comprises a plurality of output-groups 21, 21 . . . . Each output-group stores outputs from all bits in a 3D-oP cell. For example, the output-group 21 comprises output-bits 21a, 21b, with the output-bit 21a storing Bit-1 and the output-bit 21b storing Bit-2, where Bit-1 and Bit-2 are from a same 3D-oP cell. The configurable-I/O means 24 changes the bit-order within each output-group 21 in the output buffer 20O based on the sequence-related information: for the die 18c, the external output 28 is same as the internal output 26; for the die 18d, the bit-order within each output-group (e.g. 21) is reversed.
(42) The technique of offset-printing to different memory levels (FIGS. 8A-8B) can be combined with the technique of offset-printing to different bits-in-a-cell (FIGS. 10A-10B). To be more specific, the mask-patterns for different memory levels and different bits-in-a-cell are merged onto a multi-region data-mask. At different printing steps, the wafer is offset by different values with respect to the multi-region data-mask. Accordingly, various data-patterns from the same data-mask are printed into data-coding layers for different memory levels and different bits-in-a-cell. FIG. 14 illustrates an example. This preferred ?2?2 3D-oP 18e comprises two memory levels 16A, 16B with 2-bpc: Bit-1, Bit-2. There are a total of four data-coding layers. Their data-arrays are: p[1,1] for Bit-1 in memory level 16A; p[1,2] for Bit-2 in memory level 16A; p[2,1] for Bit-1 in memory level 16B; and p[2,2] for Bit-2 in memory level 16B.
(43) The left side of FIG. 15 illustrates the multi-region data-mask 8 used for the preferred ?2?2 3D-oP 18. It comprises four data-mask regions whose mask data-arrays are m(1)-m(4). The origin of the multi-region data-mask is O.sub.M. The right side of FIG. 15 illustrates all dice D[1]-D[4] in an exposure field E on a 3D-oP wafer 9. Their origins are O.sub.1-O.sub.4, respectively. Because these dice D[1]-D[4] are offset-printed with the same data-mask 8, they belong to the same 3D-oP batch.
(44) FIG. 16 is a table listing the data-array for each data-coding layer of each die after each printing step for the preferred 2?2 3D-oP 18. Its third column lists the origin of the die to which O.sub.M is aligned at each printing step. Four printing steps are required for four data-coding layers. At the 1.sup.st printing step (i.e. for p[1,1]), O.sub.M is aligned to the origin O.sub.1 of the die D[1] and the data-arrays p[1,1] of dice D[1]-D[4] are equal to m(1)-m(4), respectively. At the 2.sup.nd printing step (i.e. for p[1,2]), O.sub.M is aligned to the origin O.sub.2 of the die D[2]. As long as the stepping distance D.sub.y along the y direction is twice as much as the die displacement d.sub.y between D[2] and D[1], i.e. D.sub.y=2d.sub.y, the data-arrays p[1,2] of dice D[1]-D[4] are equal to m(2), m(1), m(4), m(3), respectively. At the 3.sup.rd printing step (i.e. for p[2,1]), O.sub.M is aligned to the origin O.sub.3 of the die D[3]. As long as the stepping distance D.sub.x along the x direction is twice as much as the die displacement d.sub.x between D[3] and D[1], i.e. D.sub.x=2d.sub.x, the data-arrays p[2,1] of dice D[1]-D[4] are equal to m(3), m(4), m(1), m(2), respectively. At the 4.sup.th printing step (i.e. for p[2,2]), O.sub.M is aligned to the origin O.sub.4 of the die D[4]. As long as D.sub.y=2d.sub.y and D.sub.x=2d.sub.x, the data-arrays p[2,2] of dice D[1]-D[4] are equal to m(4), m(3), m(2), m(1), respectively.
(45) In sum, for the dice D[1]-D[4] of FIG. 15, their data-array sequences can be expressed as:
S.sub.D[1]=(p.sub.D[1][1,1],p.sub.D[1][1,2],p.sub.D[1][2,1],p.sub.D[1][2,2])=(m(1),m(2),m(3),m(4));
S.sub.D[2]=(p.sub.D[2][1,1],p.sub.D[2][1,2],p.sub.D[2][2,1],p.sub.D[2][2,2])=(m(2),m(1),m(4),m(3));
S.sub.D[3]=(p.sub.D[3][1,1],p.sub.D[3][1,2],p.sub.D[3][2,1],p.sub.D[3][2,2])=(m(3),m(4),m(1),m(2));
S.sub.D[4]=(p.sub.D[4][1,1],p.sub.D[4][1,2],p.sub.D[4][2,1],p.sub.D[4][2,2])=(m(4),m(3),m(2),m(1));
with {S.sub.D[1]}={S.sub.D[2]}={S.sub.D[3]}={S.sub.D[4]}, but S.sub.D[1]?S.sub.D[2]?S.sub.D[3]?S.sub.D[4].
From these expressions, it can be observed that all 3D-oP dice D[1]-D[4] have the same data-array set, but can have different data-array sequences.
(46) FIG. 17 is a circuit block diagram of the preferred ?2?2 3D-oP 18. The input-address decoder 20I and output buffer 20O are both shown in this figure. They have the same functions are those of FIGS. 13A-13B. The 3-D stack 16 stores four data-arrays p[1,1]-p[2,2]. The configurable-I/O means 24 changes the value of the external input address 28 and/or the internal output 26 based on the sequence-related information: for the die D[1], no change is made; for the die D[2], the bit-order within each output-group (e.g. 21) in the output buffer 20O is reversed; for the die D[3], the most significant bit of the internal input address 26 is inverted from that of the external input address 28; for the die D[4], the most significant bit of the internal input address 26 is inverted from that of the external input address 28, and the bit-order within each output-group (e.g. 21) in the output buffer 20O is reversed.
(47) The technique of offset-printing can not only be applied to the data-coding layers in a single die, but also be applied to the data-coding layers in a group of dice. Accordingly, the present invention discloses a three-dimensional 3D-oP-based memory package (3D.sup.2-oP). The 3D.sup.2-oP package is often released in the form of a memory card. Similarly, the mask-patterns for a plurality of memory levels/bits-in-a-cell of a plurality of dice are merged onto a multi-region data-mask. At different printing steps, the wafer is offset by different values with respect to the data-mask. Accordingly, various data-patterns from the same data-mask are printed into data-coding layers for different memory levels/bits-in-a-cell of different dice in the 3D.sup.2-oP package.
(48) FIG. 18 illustrates a preferred ?3?3?1 3D.sup.2-oP package 38. Here, ?K?M?n 3D.sup.2-oP package denotes a memory package comprising K vertically stacked ?M?n 3D-oP dice. In this example, it comprises three 3D-oP dice C.sub.1-C.sub.3. They are vertically stacked on an interposer substrate 30 and form a 3D-oP stack 36. Bond wires 32 connect dice C.sub.1-C.sub.3 to the substrate 30. To improve its data-security, the 3D.sup.2-oP package 38 is preferably filled with a molding compound 34.
(49) FIG. 19 is a circuit block diagram of the preferred 3D.sup.2-oP package 38. Its 3D-oP stack 36 stores nine data-arrays, i.e. three data-arrays p[1]-p[3] for each of the dice C.sub.1-C.sub.3. It also comprises a configurable-I/O means 24, which has a similar function as that of FIG. 17. The configurable-I/O means 24 could be located in the 3D-oP die and/or the controller die.
(50) The left side of FIG. 20 illustrates the multi-region data-mask 8 used for the preferred 3D.sup.2-oP package 38. It comprises nine data-mask regions whose data-arrays are m(1)-m(9). The origin of the multi-region data-mask 8 is O.sub.M. The right side of FIG. 20 illustrates all dice D[1]-D[9] in an exposure field E on a 3D-oP wafer 9. The origins for dice D[1]-D[3] are O.sub.1-O.sub.3, respectively.
(51) FIG. 21 is a table listing the data-array for each data-coding layer of each dice after each printing step for the preferred 3D.sup.2-oP package 38. Its third column lists the origin of the die to which O.sub.M is aligned at each printing step. Three printing steps are required for three data-coding layers. At the 1.sup.st printing step (i.e. for p[1]), O.sub.M is aligned to the origin O.sub.1 of the die D[1] and the data-arrays p[1] of dice D[1]-D[9] are equal to m(1)-m(9), respectively. At the 2.sup.nd printing step (i.e. for p[2]), O.sub.M is aligned to the origin O.sub.2 of the die D[2]. As long as D.sub.y=3d.sub.y13d.sub.y2, the data-arrays p[2] of dice D[1]-D[9] are equal to m(3), m(1), m(2), m(6), m(4), m(5), m(9), m(7), m(8), respectively. At the 3.sup.rd printing step (i.e. for p[3]), O.sub.M is aligned to the origin O.sub.3 of the die D[3]. As long as D.sub.y=3d.sub.y1=3d.sub.y2, the data-arrays p[3] of dice D[1]-D[9] are equal to m(2), m(3), m(1), m(5), m(6), m(4), m(8), m(9), m(7), respectively.
(52) FIG. 22 is a table listing three 3D.sup.2-oP packages M[1]-M[3] formed from nine dice D[1]-D[9] of FIG. 20: the 3D.sup.2-oP package M[1] comprises dice D[1], D[4], D[7]; the 3D.sup.2-oP package M[2] comprises dice D[2], D[5], D[8]; and the 3D.sup.2-oP package M[3] comprises dice D[3], D[6], D[9]. Because these packages M[1]-M[3] are offset-printed with the same data-mask 8, they belong to the same 3D.sup.2-oP batch.
(53) In sum, for the 3D.sup.2-oP packages M[1]-M[3] of FIG. 20, their data-array sequences can be expressed as:
S.sub.M[1]=(S.sub.D[1],S.sub.D[4],S.sub.D[7])=(m(1),m(3),m(2);m(4),m(6),m(5);m(7),m(9),m(8));
S.sub.M[2]=(S.sub.D[2],S.sub.D[5],S.sub.D[8])=(m(2),m(1),m(3);m(5),m(4),m(6);m(8),m(7),m(9));
S.sub.M[3]=(S.sub.D[3],S.sub.D[6],S.sub.D[9])=(m(3),m(1),m(1);m(6),m(5),m(4);m(9),m(8),m(7));
with {S.sub.M[1]}={S.sub.M[2]}={S.sub.M[3]}, but S.sub.M[1]?S.sub.M[2]?S.sub.M[3].
From these expressions, it can be observed that all 3D.sup.2-oP packages M[1]-M[3] have the same data-array set, but can have different data-array sequences.
(54) While illustrative embodiments have been shown and described, it would be apparent to those skilled in the art that many more modifications than that have been mentioned above are possible without departing from the inventive concepts set forth therein. For example, besides photo-lithography, offset-printing can be applied to imprint-lithography. The invention, therefore, is not to be limited except in the spirit of the appended claims.
