ARRANGEMENT WITH A MEMS DEVICE AND METHOD OF MANUFACTURING

Abstract

An arrangement and a production method for the arrangement with at least one MEMS device, which comprises a package that closely encloses the MEMS device and seals it from ambient influences. The package comprises as sealing a PFPE layer of a perfluoropolyether polymerized with the aid of functional groups.

Claims

1. An apparatus, comprising: a substrate; a micro-electro-mechanical system (MEMS) device having device structures on a bottom surface of the MEMS device, wherein the MEMS device is on supporting structures such that the bottom surface of the MEMS device is facing a top surface of the substrate, and wherein the device structures are in a gap between the bottom surface of the MEMS device and the top surface of the substrate; and a perfluoropolyether (PFPE) layer on a top surface of the MEMS device.

2. The apparatus of claim 1, wherein the PFPE layer spans from the top surface of the substrate to the top surface of the MEMS device such that the MEMS device is encapsulated in the gap.

3. The apparatus of claim 1, wherein the supporting structures comprise solder balls used to electrically couple the MEMS device to the substrate.

4. The apparatus of claim 1, further comprising a covering layer over the PFPE layer.

5. The apparatus of claim 4, wherein the cover layer is disposed across an entirety of a top surface of the PFPE layer.

6. The apparatus of claim 1, wherein the MEMS device is a micro-structured electromechanical device with a movable part, a sensor or a device operating with acoustic waves.

7. The apparatus of claim 1, wherein the MEMS device is a radio-frequency (RF) device.

8. A method for manufacturing a micro-electro-mechanical system (MEMS) device, comprising: forming a substrate; arranging the MEMS device on supporting structures such that a bottom surface of the MEMS device is facing a top surface of the substrate, the MEMS device having device structures on the bottom surface of the MEMS device, and wherein the device structures are in a gap between the bottom surface of the MEMS device and the top surface of the substrate; and depositing a perfluoropolyether (PFPE) layer on a top surface of the MEMS device.

9. The method of claim 8, wherein the PFPE layer spans from the top surface of the substrate to the top surface of the MEMS device such that the MEMS device is encapsulated in the gap.

10. The method of claim 8, wherein the supporting structures comprise solder balls used to electrically couple the MEMS device to the substrate.

11. The method of claim 8, further comprising forming a covering layer over the PFPE layer.

12. The method of claim 11, wherein the cover layer is formed across an entirety of a top surface of the PFPE layer.

13. The method of claim 8, wherein the MEMS device is a micro-structured electromechanical device with a movable part, a sensor or a device operating with acoustic waves.

14. The method of claim 8, wherein the MEMS device is a radio-frequency (RF) device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0040] FIGS. 1A to 1D show various arrangements with an MEMS device on a substrate and a PFPE layer,

[0041] FIGS. 2A to 2C show various arrangements of an MEMS device in which the covering sits directly on the MEMS device,

[0042] FIGS. 3A to 3E show various embodiments of an arrangement with a number of devices on a substrate and a covering comprising a PFPE layer, and

[0043] FIGS. 4A to 4C show an arrangement according to an aspect incorporating an SAW device.

DETAILED DESCRIPTION

[0044] FIG. 1A shows an embodiment of the arrangement according to an aspect of the present disclosure, in which an MEMS device MB is mounted in flip-chip arrangement on a substrate TR. The electrical and mechanical attachment takes place by way of bumps, for example solder or stud bumps. The bumps also act in this case as spacers, so that a gap remains between the substrate TR and the MEMS device MB, and the downwardly facing movable or vibrating device structures of the MEMS device can operate mechanically unimpeded.

[0045] For sealing the MEMS device MB from ambient influences, arranged on the upper side of the MEMS device MB is a PFPE layer PS formed as a covering layer AS. This overlaps the edges of the MEMS device MB and finishes with the substrate TR. The PFPE layer PS enters into an intimate, close and solid bond with conventional substrate materials, for example with ceramic, glass or metal, so that, with such a covering layer AS, a hermetically sealed cavity package having a cavity HR is created for the MEMS device. At the same time, the gap is sealed off laterally, so that a sealed cavity HR is formed under the PFPE layer PS between the substrate TR and the MEMS device MB.

[0046] FIG. 1B shows a further arrangement, in which the MEMS device MB is again mounted on a substrate. The MEMS device is covered by a covering cap AK and thereby forms a cavity HR, in which the MEMS device MB is arranged. For secure sealing of the cavity HR, a structured intermediate layer ZS, which comprises a PFPE layer PS or consists of a PFPE layer PS, is arranged between the covering cap AK and the substrate TR.

[0047] The covering cap AK may be composed of materials that are mechanically adequately strong and can be structured. The covering cap AK is preferably structured from a covering wafer, for example from a glass or ceramic plate of a semiconductor crystal or any other material that can be structured as a solid body. This has the advantage that in this way a multiplicity of covering caps can be structured from the covering wafer, for example by forming corresponding recesses in the underside of the covering wafer, which are then placed on a panel with a multiplicity of MEMS devices and are only separated into individual devices after complete processing. The PFPE layer PS, formed as an intermediate layer ZS, may be structured on the substrate TR or on the underside of the covering cap AK or be applied as an already structured layer to the substrate TR or the covering wafer.

[0048] FIG. 1C shows a further embodiment of an arrangement, in which the MEMS device MB is mounted on a substrate TR. A structured PFPE layer PS forms an intermediate layer ZS, which surrounds the MEMS device on the substrate TR and at the same time forms a spacing element, on which a covering formed as a covering wafer AW rests.

[0049] This embodiment has the advantage that the covering wafer does not have to be structured and can be placed on as a level and thin wafer. Only the intermediate layer ZS is structured, which once again can take place directly on the substrate TR, directly on the covering wafer AW or separately from the two parts by separate partial crosslinking of a PFPE layer and the subsequent arrangement thereof between the substrate and the covering wafer AW. Here, too, an adequate cavity HR is ensured if the height of the intermediate layer ZS is greater than the height of the MEMS device above the surface of the substrate TR.

[0050] FIG. 1D shows an MEMS device MB on a substrate that is covered by a PFPE layer PS formed as a covering cap AK. Such a covering cap AK may be formed by a number of partial layers of a PFPE layer, which are individually structured and in a final crosslinkage are bonded to one another to form a three-dimensional structure, indeed to form the covering cap.

[0051] In the embodiments that are shown in FIGS. 1B to 1D, it may remain open how exactly the MEMS device is mounted on the substrate TR. It may be adhesively attached, soldered on or bonded to the substrate in the flip-chip manner of construction. In the first two variants, the electrical connection to the substrate TR may take place by means of bonding wires. Mounting by the SMD technique is also possible.

[0052] FIGS. 2A to 2C show various embodiments of arrangements according to aspects of the present disclosure, in which the sealing of the device structures takes place directly on the MEMS device MB and can therefore take place already at MEMS wafer level, that is to say before the individual separation of the MEMS devices. In the figures, the MEMS devices MB are arranged on a substrate TR, but they may also represent complete arrangements according to the invention without a substrate.

[0053] FIG. 2A, a covering cap AK, which comprises a PFPE layer PS, is arranged on the MEMS device MB. The covering cap AK encloses underneath it a cavity HR, in which the device structures BES are arranged and thus can operate undisturbed.

[0054] The covering cap AK may be formed completely by the PFPE layer PS, or comprise such a layer as a partial layer. In particular, under the PFPE layer PS there may be arranged a further layer of a different material. It is possible for example that the PFPE layer represents the uppermost sealing layer of a thin-film package, which is also known as a zero level package. Various methods are already known for such packages that are produced in an integrated form and leave a cavity HR for the MEMS device structures.

[0055] In the case of wafer level packaging, a multiplicity of MEMS devices or MEMS device structures pre-structured on the MEMS wafer may be encapsulated together with a covering cap AK or with a PFPE layer PS provided with recesses. After the individual separation of the MEMS devices, each MEMS device has a covering cap AK of its own.

[0056] FIG. 2B shows a covering of the device structures BES by means of a PFPE layer sitting directly on the MEMS device MB and structured to form an intermediate layer ZS, which forms a frame around the device structures BES and on which a covering formed as a covering wafer AW rests. Here, too, the intermediate layer ZS acts as a spacer, so that a cavity HR for the device structures BES is formed between the MEMS device MB and the covering wafer AW.

[0057] FIG. 2C shows an arrangement with an MEMS device MB, in which the device structures BES are covered by a structured covering cap AK, which is for example formed from a rigid, preferably ceramic or crystalline material. A PFPE layer PS structured to form an intermediate layer ZS is arranged between the covering cap AK and the surface of the MEMS device MB and provides a sealed closure of the cavity HR under the cap.

[0058] FIGS. 3A to 3E show embodiments of the arrangement in which an MEMS device and at least one further device WB are arranged on a substrate TR.

[0059] According to FIG. 3A, the two devices are covered by a common covering layer AS, which comprises a PFPE layer as a single layer or as a partial layer of a laminar structure. The covering layer AS finishes in close contact with the substrate TR all around the devices and thus provides a sealed encapsulation of the devices on the substrate.

[0060] In the embodiment that is shown in FIG. 3B, only the MEMS device MB is covered by the covering layer AS.

[0061] FIG. 3C shows an arrangement in which the MEMS device MB and a further device WB are integrated in a package, which consists of an intermediate layer ZS and a covering, in particular a covering wafer AW. The intermediate layer ZS is structured from a PFPE layer PS, sits on the substrate TR and surrounds the devices in the form of a frame. At the same time, the intermediate layer ZS serves as a spacer and as a support for the preferably rigid covering AW, so that each frame formed in the intermediate layer encloses together with the covering a cavity HR for the respective device.

[0062] FIG. 3D shows an arrangement in which a structured PFPE layer PS is arranged as a sealing intermediate layer ZS between a covering, for example a structured covering wafer AW, and the substrate. Respectively enclosed under the covering AW is a cavity HR for the respective device MB, WB, which is substantially formed by a recess in the covering.

[0063] FIG. 3E shows an arrangement in which the structured covering AW with the recesses is formed completely by a PFPE layer, which sits directly on the substrate. It is possible here to dispense with the intermediate layer. The covering AW may be built up from a number of structured partial layers.

[0064] FIG. 4A shows an arrangement in which the structure and possible functions of the substrate TR are presented in more detail. The substrate TR is built up in a multilayered form from dielectric layers, between which structured metallization levels are arranged. Different metallization levels are connected to one another by way of plated-through holes. Provided on the upper side of the substrate TR are connection metallizations for the MEMS device MB and any other further devices there may be. Arranged on the underside of the substrate TR are the external contacts KA, with the aid of which the arrangement can be connected to surrounding circuitry, for example by soldering.

[0065] The MEMS device MB is mechanically and electrically connected to the electrical terminal areas of the substrate TR by way of bumps. The device structures BES face downwards and are arranged between the surface of the substrate TR and the MEMS device MB in a clear gap that remains there. Laterally, the gap between the MEMS device and the substrate TR is sealed by means of a covering layer AS, which sits over a large surface area on the upper side of the MEMS device and of the substrate and is formed by a PFPE layer PS. The covering layer AS may be applied with an approximately uniform layer thickness and conformal surface. The covering layer AS may, however, also be applied with a greater layer thickness, for example in a layer thickness reaching up to the upper edge of the MEMS device, so that the MEMS device is virtually buried under the covering layer AS.

[0066] The MEMS device is represented here as an SAW device, which comprises a piezoelectric substrate and metallic device structures and terminal pads on the underside of the substrate. The MEMS device may, however, also be a BAW device, in which a layer structure with BAW resonators is formed on the surface of a substrate, for example comprising crystalline silicon. The MEMS device may also be a GBAW device, in which SAW-like device structures are covered by additional layers.

[0067] FIG. 4B shows a further refinement in which a relatively thin covering layer AS, formed by a PFPE layer PS, is provided with a further covering layer WA, which has been applied here for example as an encapsulating compound, which completely covers the MEMS device and has a planarized surface. Such a further covering WA may be applied for example as an encapsulating compound and for example by injection molding.

[0068] FIG. 4C shows a further refinement of an arrangement with a further covering WA applied over the covering layer AS, in the form of a thin layer applied with a conformal surface. Such a thin layer is preferably applied by means of thin-film methods from the vapour phase, for example by means of CVD methods, plasma depositing methods or sputtering. It may for example comprise SiO.sub.2 or some other dielectric material.

[0069] It is also possible to apply the further covering layer WA as a metal layer and to deposit it for this purpose from a solution. It is also possible to apply a base metallization from the vapour phase and galvanically or electrolessly reinforce it in a solution. A metallic further covering layer WA may be used for electromagnetic shielding. A metal layer can also increase the stability of the package as a whole, and consequently of the arrangement.

[0070] The present disclosure is not restricted to the exemplary embodiments that are represented in the figures and described. However, all of these embodiments have in common that the hermetic sealing of the arrangement is performed by the package for the MEMS device by means of a PFPE layer. The PFPE layer may provide the only sealing and covering or, as described, may be formed as an intermediate or bonding layer. An arrangement disclosed herein may also comprise sub-combinations of the exemplary embodiments described or represented.