Bonding Electrode Structure of Flip-chip LED Chip and Fabrication Method

Abstract

A bonding electrode structure of a flip-chip LED chip includes: a substrate; a light-emitting epitaxial layer over the substrate; a bonding electrode over the light-emitting epitaxial layer, wherein the bonding electrode structure includes a metal laminated layer having a bottom layer and an upper surface layer from bottom up. The bottom layer structure is oxidable metal and the side wall forms an oxide layer. The upper surface layer is non-oxidable metal. The bonding electrode structure has a main contact portion, and a grid-shape portion surrounding the main contact portion in a horizontal direction. The problems during packaging and soldering of the flip-chip LED chip structure, such as short circuit or electric leakage, can thus be solved.

Claims

1. A bonding electrode structure of a flip-chip LED chip, comprising a metal laminated layer including, from bottom up in a vertical direction: a bottom layer; and an upper surface layer; wherein: the bottom layer structure is oxidable metal and side walls form an oxide layer, and the upper surface layer is non-oxidized metal; and the bonding electrode structure includes a main contact portion, and a grid-shape portion surrounding the main contact portion in a horizontal direction.

2. The bonding electrode structure of claim 1, wherein: the side wall of the bottom layer structure of the bonding electrode forms an oxide layer, which extends the solder paste downwards to the packaging electrode due to poor adhesiveness to the solder paste surface and high surface tension during packing of the flip-chip LED; so as to prevent the solder paste from extending to the LED chip end, thereby avoiding chip electric leakage and short circuit and improving reliability.

3. The bonding electrode structure of claim 1, wherein the upper surface layer of the main contact part is used for contact conduction and heat dissipation.

4. The bonding electrode structure of claim 1, wherein the side wall of the bottom layer in the grid-shape portion forms an oxide layer with barrier wall effect.

5. The bonding electrode structure of claim 1, wherein at least 4 electrodes are provided in the grid-shape portion.

6. The bonding electrode structure of claim 1, wherein the electrode pattern in the grid-shape portion can be rectangle, square, circular, oval, rectangle, polygon, cross or any of their combinations.

7. The bonding electrode structure of claim 1, wherein the grid-shape portion is distributed to surround a side or each side of the main contact portion;

8. The bonding electrode structure of claim 1, wherein the non-oxidable metal can be Al, Ag, Cu or any of their combinations;

9. The bonding electrode structure of claim 1, wherein the oxidable metal can be Cr, Pt, Au or any of their combinations.

10. A fabrication method for a bonding electrode structure of a flip-chip LED chip, the method comprising: 1) fabricating a metal laminated layer, comprising a bottom layer and an upper surface layer from bottom to up at vertical direction; wherein, the bottom layer structure is oxidable metal and the upper surface layer is non-oxidable metal; 2) dividing the bonding electrode structure into a main contact portion and a grid-shape portion surrounding the main contact portion at horizontal direction; and 3) performing O.sub.2 plasma pretreatment for the metal laminated layer, wherein, the upper surface layer is not prone to oxidation, and O.sub.2 plasma cleans the upper surface layer to improve surface activity, thus forming good contact; and the bottom layer is oxidable metal, and the side wall of the bottom layer forms an oxide layer after O.sub.2 plasma pretreatment.

11. The fabrication method of claim 10, wherein: the side wall of the bottom structure of the bonding electrode forms an oxide layer, which extends the solder paste downwards to the packaging electrode due to poor adhesiveness of the oxide layer to the solder paste surface and high surface tension during packing of the flip-chip LED; so as to prevent the solder paste from extending to the LED chip end, thus avoiding chip electric leakage and short circuit and improving reliability.

12. The fabrication method of claim 10, wherein the upper surface layer of the main contact part is used for contact conduction and heat dissipation.

13. The fabrication method of claim 10, wherein the side wall of the bottom structure in the grid-shape portion forms an oxide layer with barrier wall effect.

14. The fabrication method of claim 10, wherein at least 4 electrodes are provided in the grid-shape portion.

15. The fabrication method of claim 10, wherein the electrode pattern in the grid-shape portion can be rectangle, square, circular, oval, rectangle, polygon, cross or any of their combinations.

16. A flip-chip LED chip, comprising: a light-emitting epitaxial layer including a first semiconductor layer, a second semiconductor layer and a quantum well layer between these two layers; a P electrode over the second semiconductor layer; and an N electrode over the first semiconductor layer; wherein both the P electrode and the N electrode structure comprises a metal laminated layer, which further comprises from bottom to up at vertical direction: a bottom layer; and an upper surface layer; wherein: the bottom layer structure is oxidable metal and side walls form an oxide layer, and the upper surface layer is non-oxidized metal; and the bonding electrode structure is divided into a main contact portion and a grid-shape portion surrounding the main contact portion at horizontal direction.

17. The flip-chip LED chip of claim 12, wherein: the side wall of the bottom layer structure of the bonding electrode forms an oxide layer, which extends the solder paste downwards to the packaging electrode due to poor adhesiveness to the solder paste surface and high surface tension during packing of the flip-chip LED; so as to prevent the solder paste from extending to the LED chip end, thus avoiding chip electric leakage and short circuit and improving reliability.

18. The flip-chip LED chip of claim 12, wherein spacing between the P electrode and the N electrode is larger than the transverse distance of the P electrode or the N electrode.

19. The flip-chip LED chip of claim 12, wherein the upper surface layer of the main contact part is used for contact conduction and heat dissipation.

20. The flip-chip LED chip of claim 12, wherein the side wall of the bottom layer in the grid-shape portion forms an oxide layer with barrier wall effect.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings, which are included to provide a further understanding of the disclosure and constitute a part of this specification, together with the embodiments, are therefore to be considered in all respects as illustrative and not restrictive. In addition, the drawings are merely illustrative, which are not drawn to scale.

[0034] FIG. 1 illustrates a sectional views of a flip-chip LED chip structure according to some embodiments of the present disclosure.

[0035] FIG. 2 illustrates a sectional views of a flip-chip LED chip structure according to some embodiments of the present disclosure.

[0036] FIG. 3 illustrates a top view of the flip-chip LED chip structure in FIG. 2.

[0037] FIG. 4 illustrates a sectional view showing the application of the flip-chip LED chip structure according to some embodiments in the present disclosure for solder paste packaging.

[0038] FIG. 5 shows an exemplary horizontal top view of the electrode of the grid-shape portion.

[0039] In the drawings: 100: substrate; 101: light-emitting epitaxial layer; 102: P electrode; 103: N electrode; 1021A: bottom structure of the main contact portion of the N electrode; 1022A: upper surface layer of the main contact portion of the N electrode; 1021B: bottom structure of the grid-shape portion of the N electrode; 1022B: upper surface layer of the grid-shape portion of the N electrode; 103: P electrode; 104: oxide layer; 105: solder paste; 106: packaging electrode; 107: packaging substrate; W1: electrode spacing; W2: transverse distance.

DETAILED DESCRIPTION

[0040] Detailed steps and compositions will be described below for a better understanding of the present disclosure. In addition, it should be noted that well-known compositions or steps are not included to avoid unnecessary limitation to this present disclosure. Preferred embodiments of the present disclosure will be described in detail below. However, in addition to these details, the present disclosure can be widely applied to other embodiments. The scope of the present disclosure is not limited and is as defined by the appended claims.

[0041] The present disclosure provides a bonding electrode design suitable for the flip-chip LED chip, which solves known problems during packaging and soldering of flip-chip LED chip structures such as short circuit or electric leakage without changing the packaging substrate. Various embodiments of the bonding electrode structure and the flip-chip LED chip of the present disclosure will be described in detail with reference to the accompanying drawings.

[0042] Referring to FIGS. 1-3, a flip-chip LED chip includes a substrate 100; a light-emitting epitaxial layer 101 including an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer over the substrate 100; an N electrode 102 over the N-type semiconductor layer of the light-emitting epitaxial layer 101; and a P electrode 103 over the P-type semiconductor layer of the light-emitting epitaxial layer 101.

[0043] Specifically, the aforesaid substrate 100 can be sapphire, SiC, Si, GaN, AlN or ZnO substrate that is suitable for epitaxial growth. In this embodiment, sapphire is preferred. The light-emitting epitaxial layer 101 is GaN-series material or other materials. the P electrode 103 and the N electrode 102 serve as a bonding electrode structure, which has a metal laminated layer including a bottom layer and an upper surface layer from bottom up in a vertical direction, wherein, the bottom layer structure is easily oxidable metal and the side wall forms an oxide layer, and the upper surface layer is non-oxidable metal. The bonding electrode structure is divided into a main contact portion and a grid-shape portion surrounding the main contact portion at horizontal direction.

[0044] Referring to FIG. 4, the P and N electrodes can be of equivalent areas and symmetrical position. Taking the N-electrode as an example, the N-electrode is divided into a bottom layer (1021A, 1021B) and an upper surface layer (1022A, 1022B) at vertical direction, and is divided into a main contact portion (1021A, 1022A) and a grid-shape portion (1021B, 1022B). The oxidable metal of the bottom layer structure can be Al, Ag, Cu or any of their combinations; the thickness is 2,000 50,000 . The side wall of the oxidable metal forms an oxide layer 104. The non-oxidable metal of the upper surface layer can be Cr, Pt, Au or any of their combinations; the thickness is 50 -5,000 . The upper surface of the main contact portion is used for contact conduction and heat dissipation. The electrode pattern of the grid-shape portion is square, and at least 4 electrodes are provided. In this embodiment, 8 electrodes are preferred, which are distributed at both sides of the main contact layer. The side wall of bottom layer structure of the grid-shape portion forms an oxide layer 104, serving as a barrier wall of the solder paste 105 for packaging, which extends the solder paste downwards along the packaging electrode 106 (over the packaging substrate 107) due to poor adhesiveness to the surface of the solder paste 105 and high surface tension during packaging of the flip-chip LED; this prevents the solder paste 105 from extending to the LED chip end, thus avoiding chip electric leakage and short circuit and improving reliability.

[0045] In some embodiments, to further improve the wall barrier effect of the side-wall oxide layer of the bottom structure in the grid portion, the grid portion electrode pattern (such as 1022B) can be changed based on actual chip design, including rectangle, square, circular, oval, rectangle, polygon, cross or any of their combinations, as shown in FIG. 5. In addition, as shown in this embodiment, electrodes in the grid-shape portion are distributed to surround 2 side walls of the main contact portion. It should be noted that, however, electrodes in the grid-shape portion can be distributed to surround each side wall of the main contact portion as required, which is not limited to 2 or 4 side walls.

[0046] Referring to FIG. 3, in this embodiment, spacing W2 between the P electrode and the N electrode is larger than 100 m; the transverse distance W1 of the p electrode and the N electrode is less than 100 m; i.e., spacing between the P electrode and the N electrode is larger than the transverse distance of the P electrode or the N electrode. Small transverse distance of the electrode saves electrode material, causing the solder paste for packing of the flip-chip LED less likely to be squeezed out. At the meantime, large spacing decrease the chance for mutual diffusion and merging of solder pastes at both sides of the P electrode and the N electrode, and therefore is unlikely to cause short circuit or electric leakage.

[0047] The fabrication method for the aforesaid bonding electrode structure of the flip-chip LED chip according to the aforesaid embodiment includes steps below:

[0048] First, fabricate a metal laminated layer, and then evaporate or sputter easily oxidable metal Al and non-oxidable metals Cr, Pt and Au, wherein, oxidable metal in the bottom layer structure and non-oxidable metal in the upper surface layer. Divide the bonding electrode structure into a main contact portion and a grid-shape portion surrounding the main contact portion at horizontal direction through yellow light mask process;

[0049] Then, take O.sub.2 plasma pretreatment for the metal laminated layer, wherein, the upper surface layer is not prone to oxidation, and plasma can clean the surface to improve surface activity, thus forming good contact in the upper surface layer; and the side wall metal of the bottom layer is prone to form an Al.sub.2O.sub.3 oxide layer in the effect of O.sub.2 plasma.

[0050] Although specific embodiments have been described above in detail, the description is merely for purposes of illustration. It should be appreciated, therefore, that many aspects described above are not intended as required or essential elements unless explicitly stated otherwise. Various modifications of, and equivalent acts corresponding to, the disclosed aspects of the exemplary embodiments, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of the present disclosure, without departing from the spirit and scope of the disclosure defined in the following claims, the scope of which is to be accorded the broadest interpretation so as to encompass such modifications and equivalent structures.