DIFFERENTIAL AMPLIFIER CIRCUIT FOR A CAPACITIVE ACOUSTIC TRANSDUCER AND CORRESPONDING CAPACITIVE ACOUSTIC TRANSDUCER

20180139536 ยท 2018-05-17

    Inventors

    Cpc classification

    International classification

    Abstract

    An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.

    Claims

    1. A differential amplifier circuit, comprising: an acoustic transducer including a first input node and a second input node, the acoustic transducer configured to generate a sensing signal based upon an acoustic signal; a reference circuit having first and second input nodes, the first input node coupled to the first input node of the acoustic transducer and the reference circuit generating a value corresponding to a value of the sensing signal in the absence of the acoustic signal; a first amplifier coupled to the second input node of the acoustic transducer and having an output node defining a first differential output of the amplifier circuit; a second amplifier coupled to the second input node of the reference circuit and having an output node defining a second differential output of the amplifier circuit; and a feedback circuit coupled between the first and second differential output nodes and the first input node of the acoustic transducer, the feedback circuit configured to generate a feedback signal on the first input node.

    2. The differential amplifier circuit of claim 1, wherein the reference circuit comprises a dummy capacitor coupled between the first and second input nodes of the reference circuit.

    3. The differential amplifier circuit of claim 2, wherein the acoustic transducer comprises a sensing capacitor coupled in series with a sensing signal generator between the first and second input nodes of the acoustic transducer.

    4. The differential amplifier circuit of claim 3, wherein the sensing signal has an amplitude and a phase, and wherein the feedback signal has an amplitude based on the amplitude of the sensing signal.

    5. The differential amplifier circuit of claim 4, wherein the phase of the feedback signal is in phase opposition with the phase of the sensing signal.

    6. The differential amplifier circuit of claim 1, wherein each of the first and second amplifiers comprises a unity-gain voltage follower buffer amplifier.

    7. The differential amplifier circuit of claim 1, wherein the feedback circuit comprises a resistive divider circuit including a feedback node.

    8. The differential amplifier circuit of claim 7, wherein voltages on the first and second differential outputs have approximately equal amplitudes and are in phase opposition, and wherein a feedback voltage on the feedback node is equal to a common mode voltage of the voltages on the first and second differential outputs.

    9. The differential amplifier circuit of claim 8, further comprising: a first biasing circuit configured to provide a first biasing voltage to the first input node of the acoustic transducer; a second biasing circuit configured to provide a second biasing voltage to the second input node of the acoustic transducer; and a third biasing circuit configured to provide the second biasing voltage to the second input node of the reference circuit.

    10. The differential amplifier circuit of claim 9, wherein each of the first, second and third biasing circuits comprises a pair of back-to-back diodes.

    11. The differential amplifier circuit of claim 1, wherein the acoustic transducer comprises an electret condenser microphone.

    12. An electronic device, comprising: an acoustic transducer including a sensing structure having a sensing capacitor including a first input node and a second input node, the acoustic transducer configured to generate a sensing signal across the first and second input nodes as a function of variations in a capacitance value of the sensing capacitor responsive to an acoustic signal; an amplifier circuit including, a reference circuit having first and second input nodes, the first input node coupled to a first input node of the acoustic transducer and the reference circuit configured to generate a reference signal having a value corresponding to a value of the sensing signal in the absence of the acoustic signal; a first amplifier coupled to the second input node of the acoustic transducer and having an output node corresponding to a first differential output of the amplifier circuit; a second amplifier coupled to the second input node of the reference circuit and having an output node corresponding to a second differential output of the amplifier circuit; and a feedback circuit coupled between the first and second differential output nodes and the first input node of the acoustic transducer, the feedback circuit configured to generate a feedback signal on the first input node; and a processor coupled to the amplifier circuit.

    13. The electronic device of claim 12, wherein the amplifier circuit comprises a fully differential amplifier and wherein each of the first and second amplifiers comprises an operational amplifier.

    14. The electronic device of claim 13, wherein each operational amplifier is configured in a unity-gain voltage follower configuration.

    15. The electronic device according to claim 13, wherein the electronic device comprises one of a cellphone; a personal digital assistant; a portable computer; a digital audio player with voice-recording capacity; a photographic camera or video camera; and a control device for videogames.

    16. The electronic device according to claim 14, further comprising an input/output interface and a memory coupled to the processor.

    17. A method, comprising: sensing a value of a variable capacitance element between a first input node and a second input node, the value of the variable capacitance element being a function of an acoustic signal incident on the variable capacitance element; providing a reference capacitance value between the first input node and a third input node; generating first and second differential output signals in response to signals on the first and third input nodes, respectively, a difference between the first and second differential output signals being a function of the acoustic signal incident on the variable capacitance element; generating a feedback signal based upon the first and second differential output signals; and providing the feedback signal through a feedback capacitive element to the first input node.

    18. The method of claim 17, wherein the feedback signal comprises generating a feedback voltage having a value that is equal to a common mode voltage of the first and second differential output signals.

    19. The method of claim 18, wherein generating the first and second differential output signals comprises buffering the signals on the first and third input nodes.

    20. The method of claim 19 further comprising biasing the first and third input nodes at a first operating biasing voltage and biasing the second input node at a second biasing voltage.

    Description

    BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

    [0044] For a better understanding of the present disclosure, a preferred embodiment thereof is now described purely by way of non-limiting example and with reference to the attached drawings, wherein:

    [0045] FIG. 1 is a schematic cross-sectional view of a micromechanical structure of a known capacitive acoustic transducer, of a MEMS type;

    [0046] FIGS. 2A and 2B show circuit diagrams of a single-output amplifier circuit, of a known type, for the capacitive acoustic transducer;

    [0047] FIGS. 3A and 3B show circuit diagrams of pseudo-differential amplifier circuits of a known type for the capacitive acoustic transducer;

    [0048] FIG. 4 is a circuit diagram of a differential amplifier circuit of a known type for the capacitive acoustic transducer;

    [0049] FIG. 5 is a circuit diagram of a fully differential amplifier circuit for the capacitive acoustic transducer, according to one embodiment of the present solution; and

    [0050] FIG. 6 is a general block diagram of an electronic device incorporating the capacitive acoustic transducer, according to a further aspect of the present solution.

    DETAILED DESCRIPTION

    [0051] As illustrated in FIG. 5, one aspect of the present solution envisages providing an amplifier circuit 30 for a capacitive acoustic transducer (obtained as described previously) of a fully differential (or fully balanced) type.

    [0052] The amplifier circuit 30 once again comprises: the high-resistance insulating element 13, for example constituted by a pair of diodes arranged in back-to-back configuration, connected between a biasing line 31, which receives the biasing voltage V.sub.CP, for example from a charge-pump stage (here not illustrated) and, in this case, the first input terminal N1 designed to be coupled to the sensing capacitor 12a; and the dummy capacitor 19, which in this case has a first terminal N1 connected to the same first input terminal N1, and a second terminal N2.

    [0053] The amplifier circuit 30 further comprises a first amplifier 34 and a second amplifier 35, in buffer or voltage-follower single-ended configuration (i.e., with single output and with inverting input connected to the single output, these amplifiers being referred to in what follows as buffer amplifiers). For example, the first and second buffer amplifiers 34, 35 have unity gain and are in source-follower configuration.

    [0054] The output terminals of the buffer amplifiers 34, 35 define the first and second output terminals Out.sub.1, Out.sub.2 of the amplifier circuit 30, between which the output voltage V.sub.out is present, the value of which is a function of the sensing voltage V.sub.SIG generated by the sensing structure 11 of the capacitive acoustic transducer in response to acoustic stresses.

    [0055] In greater detail, the second input terminal N2, which is designed to be connected to the sensing capacitor 12a and on which the sensing voltage V.sub.SIG is present, is connected to the non-inverting input of the first buffer amplifier 34, and the second terminal N2 of the dummy capacitor 19 is connected to the non-inverting input of the second buffer amplifier 35.

    [0056] Furthermore, the non-inverting inputs of the first and second buffer amplifiers 34, 35 are connected to a respective biasing line 32, from which they receive the operating voltage V.sub.CM supplied by an appropriate reference-generator stage (here not illustrated) via interposition of a respective high-impedance insulating element 16, 16 constituted by a respective pair of diodes arranged in back-to-back configuration. As discussed previously, the operating voltage V.sub.CM is an appropriate DC biasing voltage, which sets the working point of the buffer amplifiers 34 and 35 (i.e., the reference voltage at input to the same buffer amplifiers 34, 35).

    [0057] The amplifier circuit 30 further comprises: a resistive divider 38, formed by a first division resistor 38a and by a second division resistor 38b, which are connected in series between the first and second output terminals Out.sub.1, Out.sub.2 and define between them a feedback node N.sub.R; a feedback amplifier 40, for example a high-gain OTA (Operational Transconductance Amplifier), which has its inverting input connected to the feedback node N.sub.R, its non-inverting input which also receives the operating voltage V.sub.CM, and a feedback resistor 42 connected between its inverting input and a corresponding output; and a feedback capacitor 44, which is connected between the output of the feedback amplifier 40 and the first input terminal N1, and has a capacitance C.sub.B much higher than the sum of the capacitances C.sub.MIC and C.sub.DUM of the sensing capacitor 12a and of the dummy capacitor 19:


    C.sub.B>>C.sub.MIC+C.sub.DUM.

    [0058] For example, capacitances C.sub.MIC and C.sub.DUM are in the region of 1 pF, whereas the capacitance C.sub.B is in the region of 10-20 pF.

    [0059] In particular, for the reasons that will be discussed hereinafter, the value of resistance R.sub.1 of the first division resistor 38a satisfies the following relation with the value of resistance R.sub.2 of the second division resistor 38b and with the value of resistance R.sub.B of the feedback resistor 42:


    R.sub.1=R.sub.2//R.sub.B

    [0060] The amplifier circuit 30 has a fully differential configuration, both at input and at output in so far as it has two outputs, at the output terminals Out.sub.1, Out.sub.2, which are in phase opposition, in particular with a phase shift of 180, with respect to one another, the difference of which define the output voltage V.sub.out; and two inputs, at the non-inverting inputs of the first and second buffer amplifiers 34, 35, which are also in phase opposition, in particular with a phase shift of 180, with respect to one another.

    [0061] During operation, the virtual short-circuit at input to the feedback amplifier 40 and the feedback action cause the voltage on the feedback node N.sub.R to be equal to the operating voltage V.sub.CM (superimposed on which is an oscillation of negligible value, since the gain of the feedback amplifier 40 is assumed as being very high).

    [0062] Therefore, the first and second output terminals Out.sub.1, Out.sub.2 are at voltages of equal amplitude and in phase opposition (given that the voltage on the feedback node N.sub.R is given by the half-sum of the same voltages). In other words, the voltage on the feedback node N.sub.R is the common-mode voltage between the output terminals Out.sub.1, Out.sub.2.

    [0063] In particular, the voltage on the first output terminal Out.sub.1 is equal to +V.sub.SIG/2, whereas the voltage on the second output terminal Out.sub.2 is equal to V.sub.SIG/2.

    [0064] Furthermore, it may be easily shown that the bottom plate of the feedback capacitor 44, connected to the output of the feedback amplifier 40, is set at a feedback voltage V.sub.R with a value of V.sub.SIG/2, and the sinusoidal variation of this voltage is fed back, substantially unchanged, onto the first input terminal N1, given the relation between the values of capacitance of the feedback capacitor 44, of the sensing capacitor 12a, and of the dummy capacitor 19.

    [0065] In other words, the voltage on the bottom plate of the feedback capacitor 44 varies, phase-shifted by 180, of a value equal to half of the sensing voltage V.sub.SIG, consequently shifting the voltages on the non-inverting input of each of the first and second buffer amplifiers 34, 35.

    [0066] Consequently, on the non-inverting node of the first buffer amplifier 34 a voltage equal to +V.sub.SIG/2 is present (given by the difference between the sensing voltage V.sub.SIG and the voltage fed back onto the first input terminal N1), whereas on the non-inverting node of the second buffer amplifier 35 a voltage equal to V.sub.SIG/2 is present.

    [0067] In other words, a purely, or truly, differential signal is present both between the inputs and between the outputs of the amplifier circuit 30.

    [0068] The expression referred to previously for the relation between the value of resistance R.sub.1 of the first division resistor 38a, the value of resistance R.sub.2 of the second division resistor 38b, and the value of resistance R.sub.B of the feedback resistor 42 is now discussed.

    [0069] For this purpose, the current coming out of the feedback node N.sub.R is designated by I.sub.S1, and the current that circulates in the feedback resistor 42 is designated by I.sub.S2. The following expressions apply:


    I.sub.S1=V.sub.SIG/2R.sub.1V.sub.SIG/2R.sub.2


    I.sub.S2=V.sub.SIG/2R.sub.B

    [0070] However, I.sub.S2=I.sub.S1, then:


    V.sub.SIG/2R.sub.1V.sub.SIG/2R.sub.1=V.sub.SIG/2R.sub.B


    and consequently


    1/R.sub.11/R.sub.2=1/R.sub.B


    1/R.sub.1=1/R.sub.2+1/R.sub.B


    i.e.,


    R.sub.1=R.sub.2//R.sub.B.

    [0071] The advantages of the solution proposed are clear from the foregoing description.

    [0072] In any case, it is emphasized once again that the amplifier circuit 30 for the capacitive acoustic transducer provides a fully differential solution, with input and output signals in phase opposition.

    [0073] The above solution thus enables the disadvantages of known solutions to be overcome thanks to the following. The principle of a virtual short-circuit at the inputs of the amplifiers, in particular the buffer amplifiers 34, 35, is respected. Differential signals are present also at the inputs of the amplifier circuit 30, not only at the outputs. Use of a complex circuit structure (for example, of the type described with reference to FIG. 4, having two differential input stages) is not required, thus preventing the associated harmonic distortions, the trade-off required with noise, and signal attenuation.

    [0074] The solution proposed does not require any modification to the manufacturing method or to the technology used for manufacturing the acoustic transducer, for example of a MEMS type, as compared to traditional solutions.

    [0075] The above features thus make the use of the acoustic transducer advantageous in an electronic device 50, in particular of a portable type, as illustrated schematically in FIG. 6.

    [0076] In FIG. 6, designated by 51 is the capacitive acoustic transducer, for example of a MEMS type, which may include, within a same package 52, the sensing structure 11, comprising, for example, an appropriate micromechanical structure, and the reading interface circuit including the amplifier circuit 30, supplying the output voltage V.sub.out; the reading interface circuit may be obtained in the same die as that in which the micromechanical structure is provided, or in a different die, which may in any case be housed in the same package 52.

    [0077] The electronic device 50 is, for example, a portable mobile communication device, such as a cellphone, a PDA (personal digital assistant), a portable computer, but also a digital audio player with voice-recording capacity, a photographic or video camera, a controller for videogames, etc. The electronic device 50 is generally able to process, store, and/or transmit and receive signals and information.

    [0078] The electronic device 50 further comprises a microprocessor 54, which receives the signals detected by the acoustic transducer 51 (the output voltage V.sub.out, possibly being further processed), and an input/output (I/O) interface 55, for example provided with a keypad and a display, connected to the microprocessor 54.

    [0079] Furthermore, the electronic device 50 may comprise a speaker 57, for generating sounds on an audio output (not shown), and a non-volatile internal memory 58.

    [0080] Finally, it is clear that modifications and variations may be made to what has been described and illustrated herein, without thereby departing from the scope of the present disclosure.

    [0081] In particular, the solution described may find advantageous application both for analog acoustic transducers and for digital acoustic transducers.

    [0082] Furthermore, as previously highlighted, the solution described may apply also to different types of acoustic transducers, for example to ECMs (Electret Condenser Microphones), comprising, in a known way, a deformable conductive membrane capacitively coupled to a fixed electrode or plate.

    [0083] The various embodiments described above can be combined to provide further embodiments. All of the U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications referred to in this specification and/or listed in the Application Data Sheet are incorporated herein by reference, in their entirety. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.

    [0084] These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.