Package structure and method of manufacturing the same

Abstract

A method of manufacturing a package structure is provided, including forming a first wiring layer on a carrier board, forming up plurality of first conductors on the first wiring layer, forming a first insulating layer that encapsulates the first wiring layer and the first conductors, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, forming a second insulating layer that encapsulates the second wiring layer and the second conductors, and forming at least an opening on the second insulating layer for at least one electronic component to be disposed therein. Since the first and second insulating layers are formed before the opening, there is no need of stacking or laminating a substrate that already has an opening, and the electronic component will not be laminated and make a displacement. Therefore, the package structure thus manufactured has a high yield rate. The present invention further provides the package structure.

Claims

1. A package structure, comprising: a first insulating layer with a molding material having a first surface and a second surface opposing the first surface; a first wiring layer coupled to the first surface of the first insulating layer; a plurality of copper pillars disposed in the first insulating layer and electrically connected with the first wiring layer; a second wiring layer formed on the second surface of the first insulating layer and electrically connected with the first wiring layer via the copper pillars; a plurality of second conductors disposed on the second wiring layer; a second insulating layer with a molding material formed on the second surface of the first insulating layer, encapsulating the second wiring layer and the second conductors, and having at least one opening for a portion of a surface of the second wiring layer to be exposed therefrom, wherein the opening has a step-like structure therein; and a plurality of electronic components disposed in the opening, wherein at least one of the electronic components is bonded on a bottom of the opening and electrically connected with the second wiring layer, and another of the electronic components is bonded on a step surface of the step-like structure and electrically connected with the second wiring layer.

2. The package structure of claim 1, wherein the first wiring layer is embedded in the first surface of the first insulating layer.

3. The package structure of claim 1, wherein the copper pillars are conductive pillars.

4. The package structure of claim 1, wherein the second conductors are conductive pillars.

5. The package structure of claim 1, wherein the surface of the second wiring layer is higher than or flush with a bottom surface of the opening.

6. The package structure of claim 1, wherein the surface of the second wiring layer is lower than or flush with a bottom surface of the opening.

7. The package structure of claim 1, wherein the second wiring layer comprises a plurality of electrical contact pads and a plurality of conductive traces, and the electrical contact pads are coupled to and electrically connected with the electronic component.

8. The package structure of claim 7, wherein the electrical contact pads are connected with the copper pillars.

9. The package structure of claim 7, wherein the electrical contact pads are not connected with the copper pillars, and the conductive traces are connected with the copper pillars.

10. The package structure of claim 1, wherein the electronic component is an active component, a passive component, or a combination thereof.

11. The package structure of claim 1, further comprising a plurality of conductive elements disposed on the second insulating layer and electrically connected with the second conductors.

12. The package structure of claim 1, further comprising another electronic component disposed on the first surface of the first insulating layer and electrically connected to the first wiring layer.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) The present invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:

(2) FIGS. 1A to 1D are cross-sectional views showing a method of manufacturing a conventional package structure; FIGS. 1A to 1D are cross-sectional views showing another method of manufacturing a conventional package structure;

(3) FIGS. 2A to 2G are cross-sectional views showing a method of manufacturing a package structure according to the present invention; wherein FIGS. 2F and 2F are different embodiments of FIG. 2F, and FIGS. 2G and 2G are different embodiments of FIG. 2G;

(4) FIG. 3 is a cross-sectional view of a package structure of an embodiment according to the present invention; and

(5) FIG. 4 is a cross-sectional view illustrating a subsequent process of FIG. 2G.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(6) The present invention is described in the following with specific embodiments, so that one skilled in the pertinent art can easily understand other advantages and effects of the present invention from the disclosure of the present invention.

(7) It should be noted that all the drawings are not intended to limit the present invention. Various modification and variations can be made without departing from the spirit of the present invention. Further, terms, such as upper, lower, first, second and one etc., are merely for illustrative purpose and should not be construed to limit the scope of the present invention.

(8) FIGS. 2A to 2F are cross-sectional view showing a method of manufacturing a package structure 2 according to the present invention.

(9) As shown in FIG. 2A, a first wiring layer 21a is formed on a carrier board 20 by a patterning process, and a plurality of first conductors 22 are subsequently disposed on the first wiring layer 21.

(10) In an embodiment, the carrier board 20 is a substrate, such as a copper foil substrate or other types of boards, without any particular limitations.

(11) The first wiring layer 21 comprises a plurality of electrical connection pads 210 and a plurality of conductive traces 211. In an embodiment, the first conductors 22 are conductive pillars such as copper pillars.

(12) As shown in FIG. 2B, a first insulating layer 23 having a first surface 23a and a second surface 23b opposing the first surface 23a is formed on the carrier board 20. The first insulating layer 23 encapsulates the first wiring layer 21 and the first conductors 22.

(13) The first insulating layer 23 is attached onto the carrier board 20 via the first surface 23a of the insulating layer 23.

(14) In an embodiment, an end surface 22a of the first conductors 22 is exposed from the second surface 23b of the first insulating layer 23.

(15) A surface 21 a of the first wiring layer 21 is flush with the first surface 23a of the first insulating layer 23.

(16) In an embodiment, the first insulating layer 23 is formed by a lamination or molding process.

(17) As shown in FIG. 2C, a second wiring layer 24 is formed on the second surface 23b of the first insulating layer 23. The second wiring layer 24 is electrically connected with the first wiring layer 21 via the first conductors 22. Subsequently, a plurality of second conductors 25 is disposed on the second wiring layer 24, and a second insulating layer 26 is formed on the second surface 23b of the first insulating layer 23. The second insulating layer 26 encapsulates the second wiring layer 24 and the second conductors 25.

(18) In an embodiment, the second wiring layer 24 comprises a plurality of electrical contact pads 240 and a plurality of conductive traces 241, and the electrical contact pads 240 and the conductive traces 241 are directly connected with the first conductors 22

(19) In an embodiment, the second conductors 25 are conductive pillars such as copper pillars, and an end surface of the second conductor 25 is exposed from the second insulating layer 26.

(20) In an embodiment, the second insulating layer 26 is formed by a lamination or molding process.

(21) As shown in FIG. 2D, a resist layer 27 such as a photoresist layer is formed on the second insulating layer 26, and has at least one opening area 270, for a portion of the surface of the second insulating layer 26 to be exposed therefrom. Subsequently, at least one opening 260 is formed on the second insulating layer 26 of the opening area 270, for a portion of the surface of the second wiring layer 24 (i.e., electrical contact pads 240) to be exposed therefrom.

(22) In an embodiment, the opening 260 is formed by a grinding process such as pumice, or a laser process, without using a conventional cutting process. Therefore, the opening 260 can be reduced in size at a corner position (such as bottom surface, opening position).

(23) In an embodiment, the surface 24a of the second wiring layer 24 is flush with the bottom surface 260a of the opening 260.

(24) Since the electrical contact pads 240 are not recessed due to damages by laser, cutter, or a drill, the surface integrity is well maintained.

(25) As shown in FIG. 2E, the resist layer 27 is removed. In an embodiment, an end surface of the second conductors 25 is exposed from the second insulating layer 26. As a result, it is not necessary to make contact pads on the second conductors 25, such that the space among the second conductors 25 is utilized efficiently to form the opening 260.

(26) As shown in FIG. 2F, the carrier board 20 is removed for exposing the first wiring layer 21 and the first insulating layer 23, and at least one electronic component 28 is accommodated in the opening 260 electrically connected with the second wiring layer 24, without being encapsulated within the first insulating layer 23 or the second insulating layer 26. The method according to the present invention does not use a conventional cutting method, and a distance between the electronic component 28 and a wall of the opening 260 can be reduced.

(27) In an embodiment, the electronic component 28 can be an active component, a passive component, or a combination thereof. The active component can be a semiconductor element (such as a chip), and the passive component can be a resistor, a capacitor or an inductor. As shown in FIG. 2F, the electronic component 28 is a passive component such as a multi-layer ceramic capacitor (MLCC), which is formed by the current soldering process, without using copper electrodes of higher cost, so as to reduce the overall cost.

(28) In an embodiment, the electronic component 28 is attached securely and electrically connected with the electrical contact pads 240 via the conductive material 280 (such as soldering material or conductive adhesive). Through limiting the size and shape of each of the electrical contact pads 240, the adhesive can be prevented from spreading to the adjacent electrical contact pads 240.

(29) In another embodiment, as shown in FIG. 2F, the electronic component 28 is an active component, and a wiring can be additionally disposed among electrical contact pads 240 corresponding to the electronic component 28.

(30) As shown in FIG. 2F, a plurality of electronic components 28a and 28b are formed on an uneven surface i.e., a step-like structure formed in the opening 260, so as to increase the 3D space. In an embodiment, the electronic component 28a is a passive component, and the electronic component 28b is an active component.

(31) As shown in FIG. 2G, a plurality of conductive elements 29 such as solder balls are formed on the second insulating layer 26, and the conductive elements 29 are electrically connected with the second conductors 25. Other electronic devices (not shown) can be stacked or disposed on the electronic elements 29.

(32) In an embodiment, more space is available through the installation of the conductive elements, and the electronic component 28 is prevented from making contact with other electronic devices. In an embodiment, according to the depth of the opening the surface 24a of the second wiring layer 24 is higher than the bottom surface 260a of the opening 260, as shown in FIG. 2G; alternatively, the surface 24a of the second wiring layer 24 is lower than the bottom surface 260a of the opening 260, as shown in the embedded wiring of FIG. 2G.

(33) In an embodiment, as shown in FIG. 3, the electrical contact pads 340 of the second wiring layer 34 are indirectly electrically connected with the first conductors 22 via the conductive traces 341. In other words, the electrical contact pads 340 are not directly connected with the first conductors 22.

(34) In a subsequent process, as shown in FIG. 4, another electronic component 40 is disposed on the first surface 23a of the first insulating layer 23 and electrically connected to the first wiring layer 21 through a plurality of conductive elements 41 such as solder balls.

(35) In an embodiment, the another electronic component 40 is an active component, a passive components, or a combination thereof. The active component can be a semiconductor element (such as a chip), and the passive component can be a resistor, a capacitor or an inductor. The another electronic component 40 shown in FIG. 4 is an active component.

(36) In an embodiment, an opening 260 can be formed among the second conductors 25, such that the 3D space can be fully utilized. This not only reduces the overall size (e.g., a thickness), but also increases the distribution area of the second wiring layer 24. Therefore, the electrical performance is increased with more stabilized signals.

(37) Compared to conventional use of glassfiber as the dielectric material to form the embedded structure, the present invention does not use a core board, and the substrate can has its size reduced. As a result, the wiring layout area is increased in such a limited space.

(38) In addition, the substrate with the opening does not required to be stacked or laminated, and the electronic component 28 can be prevent from being pressed and making displacement. Therefore, the electronic component can be more precisely secured in position, and the yield rate is increased.

(39) Moreover, multiple dielectric material layers are required to be laminated to form the embedded electronic components in the method of manufacturing a conventional circuit board such as printed circuit board and ball grid array (BGA), hence it is easy that a mismatch will be resulted between the height of the embedded component and the thickness of the dielectric layer. Another way of forming the embedded electronic component is through forming a cavity, by mechanical molding machine or cutting method to form an opening for each cavity on the dielectric material layer, which is time consuming and expensive. The present invention has the advantage that it only requires a general surface mount technology (SMT) process, followed by a molding method, without the need of multiple processes for forming the openings. If the opening (such as opening 260) is formed on the outer later, only one time process is needed, such as using pumice, therefore the overall production time and cost can be greatly reduced, which is not possible in a conventional circuit board such as printed circuit board, or BGA.

(40) The present invention further provides a package structure 2, 3, 4, which comprises a first insulating layer 23, a first wiring layer 21, a plurality of first conductors 22, a second wiring layer 24, 34, a plurality of second conductors 25, a second insulating layer 26, and at least one electronic component 28.

(41) The first insulating layer 23 has a first surface 23a and second surface 23b opposing the first surface 23a.

(42) The first wiring layer 21 is attached to the first surface 23a of the first insulating layer 23. In an embodiment, the first wiring layer 21 is embedded in the first surface 23 of the first insulating layer 23 and is flush with the first surface 23a.

(43) In an embodiment, the first conductors 22 are conductive pillars, disposed in the first insulating layer 23, connected with the second surface 23b, and electrically connected with the first wiring layer 21.

(44) The second wiring layer 24, 34 is formed on the second surface 23b of the first insulating layer 23, and electrically connected with the first wiring layer 21 via the first conductors 22.

(45) The second conductors 25 are conductive pillars, and disposed on the second wiring layer 24.

(46) The second insulating layer 26 is formed on the second surface 23b of the first insulating layer 23, encapsulates the second wiring layer 24 and the second conductors 25, and has at least one opening 260 formed thereon, for a portion of the surface of the second wiring layer 24 to be exposed therefrom.

(47) The electronic component 28 is disposed in the opening 260 and electrically connected with the second wiring layer 24. In an embodiment, the electronic component 28, 28, 28a, 28b is an active components, a passive components, or a combination thereof.

(48) In an embodiment, the surface 24a, 24a of the second wiring layer 24, 24 is higher than or flush with the bottom surface 260a of the opening 260.

(49) In an embodiment, the surface 24a of the second wiring layer 24 is lower than the bottom surface 260a of the opening 260.

(50) In an embodiment, the second wiring layer 24, 34 comprises a plurality of electrical contact pads 340, 340 and a plurality of conductive traces 341, 341 that are electrically connected with the electrical contact pads 240, 340. The electrical contact pads 240, 340 are attached and electrically connected to the electronic component 28. The electrical contact pads 24 are connected or are not connected with the first conductors 22, and the conductive traces 341 are connected to the first conductors 22

(51) In an embodiment, the opening 260 has a step-like structure therein. In an embodiment, the package structure 2 further comprises a plurality of conductive elements 29 disposed on the second insulating layer 26 and electrically connected with the second conductors 25.

(52) In an embodiment, the package structure 4 further comprises another electronic component 40 disposed on the first surface 23a of the first insulating layer 23 and electrically connected to the first wiring layer 21.

(53) The present invention has been described using exemplary preferred embodiments. However, it is to be understood that the scope of the present invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.