Method for concurrent transmission of information symbols in wireless communication systems

Abstract

The present invention relates to methods for concurrent transmission and reception of information symbols over time-frequency resource elements in a wireless communication system. According to the present invention coded bits interleaving is combined with symbol spreading using LDS signatures. Thereby, the performance of coded LDS transmissions can be substantially improved in wireless communication systems. Furthermore, the invention also relates to corresponding transmit device, receiver device, computer program, and computer program product.

Claims

1. A method, comprising: receiving, by a receiver, information bits for transmission; grouping the information bits into blocks of bits; encoding each block of bits using an error correction code to obtain a corresponding code word; interleaving the code word by permuting the information bits of the code word using a Low-Density Spreading (LDS) bit interleaver; dividing the permuted information bits into a plurality of segments of bits; mapping each segment of bits onto n number of modulation symbols; multiplying the n number of modulation symbols with LDS signatures, each signature having m number of chips, so as to obtain n number of spread modulation symbols; mapping the m number of chips onto time-frequency resource elements; and transmitting, by a transmitter, the n spread modulation symbols over m time-frequency resource elements in a wireless communication system.

2. The method according to claim 1, wherein the LDS bit interleaver is a Maximum Distance Separable (MDS) bit interleaver.

3. The method according to claim 2, wherein the MDS bit interleaver is a matrix of size N.sub.LDSnM, M being the number of bits transmitted in each modulation symbol, N.sub.LDS being a number of transmission intervals, and wherein a whole of a code word of N.sub.CWB=M*n*N.sub.LDS bits is written column-wise into the matrix and complete rows of the matrix are successively read out for each successive transmission interval.

4. The method according to claim 1, wherein the interleaving using the LDS bit interleaver is preceded by: interleaving using a channel bit interleaver, wherein the LDS bit interleaver complements the channel bit interleaver.

5. The method according to claim 1, wherein the interleaving is preceded by: adjusting a size of the code word based on available time-frequency resources for transmission.

6. A method, comprising: receiving the n spread modulation symbols that are transmitted according to the method of claim 1; demodulating the n spread modulation symbols using a Belief Propagation Multi User Demodulator (BP-MUD); deinterleaving the demodulated n spread modulation symbols using one or more deinterleavers in a group comprising: LDS symbol deinterleaver, LDS bit deinterleaver, and a channel bit deinterleaver; and decoding the deinterleaved n spread modulation symbols using an error correction decoder.

7. The method according to claim 1, wherein the wireless communication system is a Code-Division Multiple-Access (CDMA) system, an Orthogonal Frequency-Division Multiplexing (OFDM) system, Low-Density Spreading OFDM (LDS-OFDM), or a Multi-Carrier CDMA (MC-CDMA) system.

8. The method according to claim 1, wherein the n number of modulation symbols with LDS signatures exceeds the m number of chips.

9. A method, comprising: receiving, by a receiver, information bits for transmission; grouping the information bits into blocks of bits; encoding each block of bits using an error correction code so as to obtain a corresponding code word; dividing the bits of the code word into a plurality of segments of bits; mapping each segment of bits onto n number of modulation symbols; interleaving the n modulation symbols by permuting the n modulation symbols using a Low-Density Spreading (LDS) symbol interleaver; multiplying the n number of modulation symbols with LDS signatures, each signature having m number of chips, so as to obtain n number of spread modulation symbols; mapping the m chips onto time-frequency resource elements; and transmitting, by a transmitter, the n number of spread modulation symbols over m time-frequency resource elements.

10. The method according to claim 9, wherein the LDS symbol interleaver is a Maximum Distance Separable (MDS) symbol interleaver.

11. The method according to claim 10, wherein the MDS symbol interleaver is a matrix of size N.sub.LDSn, n being a number of symbols transmitted in each of N .sub.LDS number of transmission intervals, and wherein a whole of a code word of N.sub.CWS=N.sub.LDS.Math.n symbols is written column-wise into the matrix and complete rows of the matrix are successively read out for each successive transmission interval.

12. The method according to claim 9, wherein the dividing is preceded by: adjusting a size of the code word based on available time-frequency resources for transmission.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The appended drawings are intended to clarify and explain different embodiments of the present invention in which:

(2) FIG. 1 illustrates the concept of LDS-OFDM transmission;

(3) FIG. 2 is a block diagram of a transmitter in a conventional digital communication system;

(4) FIG. 3 is a block diagram of a receiver of a conventional digital communication system;

(5) FIG. 4 is a block diagram of a transmitter in the state-of-the-art LDS communication system;

(6) FIG. 5 is a block diagram of the state-of-the-art receiver in a LDS communication system;

(7) FIG. 6 is a block diagram of a transmitter in a BI-LDS communication system;

(8) FIG. 7 is a block diagram of a receiver in a BI-LDS communication system;

(9) FIG. 8 is a block diagram of the transmitter in a BI-LDS communication system using a LDS bit interleaver;

(10) FIG. 9 is a block diagram of a MDS type of LDS bit interleaver;

(11) FIG. 10 is a block diagram of a transmitter in the BI-LDS communication system with a channel bit interleaver;

(12) FIG. 11 is a block diagram of a LDS bit interleaver preserving the properties of an existing channel bit interleaver;

(13) FIG. 12 is a block diagram of a transmitter in the BI-LDS communication system using a LDS symbol interleaver;

(14) FIG. 13 is a block diagram of MDS type of LDS symbol interleaver;

(15) FIG. 14 shows performances of BI-LDS with different LDS interleavers;

(16) FIG. 15 shows a system overview;

(17) FIG. 16 shows a flowchart of a method in a transmitter according to an embodiment; and

(18) FIG. 17 shows a flowchart of a method in a receiver according to an embodiment.

DETAILED DESCRIPTION OF THE INVENTION

(19) In order to evenly distribute symbol errors generated by the LDS BP-MUD in one LDS reception interval, and create a uniform distribution of errors on soft-bit values that are fed to the error correction decoder, additional functions are introduced in the LDS transmitter and receiver according to the present invention. The functions are called LDS interleaver and LDS deinterleaver in this disclosure. Such transmission scheme is called Bit-Interleaved LDS (BI-LDS), and the corresponding basic transmitter and receiver chains are shown in FIGS. 6 and 7, respectively. A general idea is to combine coded bits interleaving with symbol spreading using LDS signatures. Thereby, the performance of coded LDS transmissions can be substantially improved. The present invention shows even better performance in an overloaded LDS transmission scheme, where the number of concurrently transmitted symbols (n) exceeds the number of resource elements or chips (m) used for the transmission. Hence, overloaded LDS transmission is a preferred embodiment.

(20) The present LDS interleaver performs permutation of coded bits and/or corresponding modulation symbols so that the information bits transmitted in each of the previously mentioned segments of the code word are selected from as far as possible positions in the original code word. After the corresponding LDS deinterleaving in the receiver the bursts of erroneously estimated soft-values of information bits are uniformly distributed over the whole code word, and hence transmission performance is improved.

(21) According to an embodiment, the LDS interleaver can be implemented as a specially designed LDS bit interleaver, followed by a modulator as shown in FIG. 8. The LDS interleaver is located before the LDS transmitter in the transmitter chain. According to this embodiment for each transmission interval, embodiments comprise the steps of: receiving information bits for transmission; grouping the information bits into blocks of bits; encoding each block of bits using an error correction code so as to obtain a corresponding code word; interleaving the code word by permuting the bits of the code word using a LDS bit interleaver; dividing the permuted bits into a number of segments of bits, wherein the number of segments depends on the code word length; mapping each segment of bits onto n number of modulation symbols; multiplying the n number of modulation symbols with LDS signatures, each signature having m number of chips, so as to obtain n spread modulation symbols; mapping the m chips onto time-frequency resource elements; and transmitting the n spread modulation symbols over m time-frequency resource elements.

(22) It is noted that a rate matching unit is located before the LDS interleaver in the transmitter chain in the embodiment in FIG. 8. The rate matcher adjusts the size of the code word based on available time-frequency resources for transmission.

(23) The LDS bit interleaver that maximises the minimum distance between any two coded bits transmitted in any of the LDS transmission intervals corresponding to different segments of a single error correction code word is denoted as a Maximum Distance Separable (MDS) bit interleaver which is used according to another embodiment of the present invention. The MDS bit interleaver maps any two neighbouring bits in the original code word into two new positions in the interleaved code word so that the minimum distance between such two new positions cannot be larger for given error correction code word length, and given number of columns in the LDS signature matrix.

(24) FIG. 16 shows a flow chart of an embodiment of a transmission method. In this embodiment, a rate matching unit is part of the method. Regarding the interleaver, preferably a MDS interleaver is used as a LDS interleaver in this example.

(25) The MDS bit interleaver can be implemented as a matrix shown in FIG. 9 according to yet another embodiment. The MDS type of LDS interleaver can be described as a matrix of size N.sub.LDSnM, wherein M being the number of bits transmitted in each modulation symbol, and where the whole code word of N.sub.CWB=M.Math.N.sub.CWS bits is written column-wise into the matrix, and where the complete rows are successively read into the LDS transmitter at successive transmission intervals.

(26) According to another embodiment, a channel bit interleaver that already may be incorporated in the transmission chain (e.g. to support communication over fading channels) can be used in the LDS interleaver as shown in FIG. 10. According to this embodiment, the LDS bit interleaver complements the channel bit interleaver. The LDS bit interleaver in this embodiment performs two functions: a) possibly permutes the bits received after the channel bit interleaver, acting in that way as a complementary bit interleaver that complements the performances of the channel bit interleaver with respect to the LDS transmission; b) reformats the permuted bits of a code word into LDS segments, which are then after modulator successively fed into the LDS transmission block.

(27) The function of a) described above can be shortcut (not active) if one wants to preserve the permutation of channel bit interleaver. In that case the LDS bit interleaver can be implemented as a matrix of size N.sub.LDSnM, where interleaved code word of N.sub.CWB=M.Math.N.sub.CWS bits from the output of channel bit interleaver is written row-wise into the matrix, and then where the complete rows are successively read into the LDS transmitter at successive transmission intervals. This is illustrated in FIG. 11. For example, if the function of LDS transmission is added to the existing LTE downlink transmission, the existing LTE channel bit interleaver can be used to support the LDS bit interleaver.

(28) According to yet another embodiment, the LDS interleaver is implemented as a symbol interleaver, inserted after the symbol modulator which means that the LDS interleaver and the modulator are located in reverse order in the transmitter chain compared to the embodiments shown in FIGS. 8 and 10. This embodiment is illustrated in FIG. 12. This embodiment comprises the steps of: receiving information bits for transmission; grouping the information bits into blocks of bits; encoding each block of bits using an error correction code so as to obtain a corresponding code word; dividing the bits of the code word into a number of segments of bits; mapping each segment of bits onto n number of modulation symbols; interleaving the n modulation symbols by permuting the n modulation symbols using a LDS symbol interleaver; multiplying the n number of modulation symbols with LDS signatures, each signature having m number of chips, so as to obtain n spread modulation symbols; mapping the m chips onto time-frequency resource elements; and transmitting the n spread modulation symbols over m time-frequency resource elements.

(29) Furthermore, the MDS-type of LDS symbol interleaver in the LDS interleaver block is shown in FIG. 13. Hence, the MDS-type of LDS symbol interleaver can be represented as a matrix of size N .sub.LDSn, where n is the number of symbols transmitted in each of N.sub.LDS number of transmission intervals, and wherein the whole of the code word of N.sub.CWS=N.sub.LDS.Math.n symbols is written column-wise into the matrix and the complete rows of the matrix are successively read out for each successive transmission interval.

(30) The corresponding MDS symbol deinterleaver can be implemented as a special bit deinterleaver which produces the bit LLR values ordered according to the bit positions in the original code word.

(31) Also in this embodiment, the modulator can be preceded by a rate matching unit such that the size of the code word is adjusted based on the available time-frequency resources for transmission.

(32) Embodiments further relates to a corresponding method for receiving information symbols on time-frequency resource elements in a wireless communication system. The method comprises the steps of: receiving n modulation symbols according to any of the methods described; demodulating the n modulation symbols using a BP-MUD; deinterleaving the demodulated n modulation symbols using one or more deinterleavers in the group comprising: LDS symbol deinterleaver, LDS bit deinterleaver, and/or a channel bit deinterleaver; and decoding the deinterleaved n modulation symbols using an error correction decoder.

(33) One or more further processing steps may also be part of the method depending on the application, e.g. processing data for software applications, controlling hardware functions in the receiver, etc.

(34) FIG. 17 shows a flow chart of an embodiment of a method in a receiver. It is noted that a BP-MUD is used in this example. Further, the selection of deinterleaver depends on how the modulation symbols were interleaved at the transmitter which means that the corresponding deinterleaver should be used.

(35) FIG. 14 illustrates the performance advantage of the present BI-LDS over state-of-the-art LDS. The spectral efficiency of coded BI-LDS transmissions using several different LDS interleavers is evaluated on AWGN channel by using the tail-biting LTE convolutional code with constraint length 7, generators [133, 171, 165] (octal) assuming rate 1/3, code word length of 480 bits, QPSK modulation, 1224 signature matrix and complete available 200% load of LDS.

(36) It can be seen in FIG. 14 that at the spectral efficiency of 1 bits/sec/Hz, the BI-LDS with MDS types of LDS bit interleaver have about 3 dB SNR gain over the LDS without an LDS interleaver. It can be further seen in FIG. 14 that the LTE DL channel bit interleaver used as the basis of the LDS interleaver performs even slightly better than the MDS types of LDS bit interleaver. A possible explanation is the following: although the MDS-type of LDS interleavers ensures the maximum separation of the bits or symbols transmitted in any of the LDS transmission intervals corresponding to different segments of a single error correction code word, and thus breaks the correlation of errors introduced by BP-MUD, there might be some correlation of errors even between the LDS transmission intervals. Thus, the MDS property of LDS interleaver might not be enough to achieve the maximum possible performances. For the moment it not clear which additional criteria an LDS interleaver has to satisfy to achieve the best possible performances of LDS transmission.

(37) It should furthermore be noted that embodiments can be implemented in a CDMA system, an OFDM system, a LDS-OFDM, or a MC-CDMA system. The system may e.g. be a cellular system in which downlink and uplink transmissions are performed. FIG. 15 illustrates such a system in which a base station transmits downlink signals to a mobile station. The system could e.g. be a system according to the 3GPP. However, the present invention is a general method for transmissions and is not limited to one particular system.

(38) Furthermore, as understood by the person skilled in the art, any method according to the present invention may also be implemented in a computer program, having code means, which when run by processing means causes the processing means to execute the steps of the method. The computer program is included in a computer readable medium of a computer program product. The computer readable medium may comprises of essentially any memory, such as a ROM (Read-Only Memory), a PROM (Programmable Read-Only Memory), an EPROM (Erasable PROM), a Flash memory, an EEPROM (Electrically Erasable PROM), or a hard disk drive.

(39) Moreover, embodiments also relate to corresponding transmitter and receiver devices. The devices are arranged to execute any method according to the present invention which means that the devices can be modified, mutatis mutandis, according to any method of the present invention. In this respect the devices comprise the necessary means, elements, units, functions, etc. Examples of such means, units, and functions are: receivers, transmitters, processors, encoders, decoders, mapping units, multipliers, interleavers, deinterleavers, modulators, demodulators, inputs, outputs, antennas, amplifiers, DSPs.

(40) Especially, the processors of the transmitter and receiver devices may comprise, e.g., one or more instances of a Central Processing Unit (CPU), a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC), a microprocessor, or other processing logic that may interpret and execute instructions. The expression processor may thus represent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones mentioned above. The processing circuitry may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions, such as call processing control, user interface control, or the like.

(41) Finally, it should be understood that the present invention is not limited to the embodiments described above, but also relates to and incorporates all embodiments within the scope of the appended independent claims.