SEMICONDUCTOR LASER DIODE HAVING MULTI-QUANTUM WELL STRUCTURE
20180123320 ยท 2018-05-03
Assignee
Inventors
Cpc classification
H01S5/026
ELECTRICITY
H01S5/34313
ELECTRICITY
H01S5/0206
ELECTRICITY
H01S5/305
ELECTRICITY
H01S5/34306
ELECTRICITY
International classification
H01S5/343
ELECTRICITY
H01S5/026
ELECTRICITY
Abstract
A semiconductor laser diode (LD) having an optical grating is disclosed. The LD includes a lower cladding layer that buries the optical grating, an active layer, and an upper cladding layer. The active layer has the multi-quantum well (MQW) structure of barrier layers and well layers alternately arranged to each other. The MQW structure further includes intermediate layers between the barrier layers and the well layers, and have lattice constant between that of the barrier layer and that of the well layer. The inter mediate layer has a thickness thinner than 1 nm.
Claims
1. A semiconductor laser diode, comprising: a semiconductor substrate made of indium phosphide (InP); an optical grating provided on the semiconductor substrate; an n-type layer that buries the optical grating; and an active layer that has an arrangement of multi-quantum well (MQW) structure including a plurality of barrier layers and a plurality of well layers alternately stacked to each other, the barrier layers having tensile stress and the well layer having compressive stress, the MQW structure further providing a plurality of intermediate layers each sandwiched between the barrier layers and the well layers, wherein the intermediate layers each have stress between the barrier layers and the well layers, and a thickness thinner than 1 nm.
2. The semiconductor laser diode of claim 1, wherein the n-type layer is made of InP.
3. The semiconductor laser diode of claim 1, wherein the barrier layers are made of semiconductor material with a lattice constant shorter than a lattice constant of the InP and the well layers are made of semiconductor material with a lattice constant longer than a lattice constant of the InP, and wherein the intermediate layers are made of semiconductor material with a lattice constant between the lattice constant of the barrier layers and the lattice constant of the well layers.
4. The semiconductor laser diode of claim 3, wherein the intermediate layers have the lattice constant substantially equal to the lattice constant of the InP.
5. The semiconductor laser diode of claim 1, wherein the intermediate layers have energy bandgap greater than energy bandgap of the barrier layers and energy bandgap of the well layers.
6. The semiconductor laser diode of claim 5, wherein the intermediate layers have the lattice constant substantially equal to the lattice constant of the InP.
7. The semiconductor laser diode of claim 1, wherein the intermediate layers have energy bandgap smaller than energy bandgap of the barrier layers and energy bandgap of the well layers.
8. The semiconductor laser diode of claim 7, wherein the intermediate layers have the lattice constant substantially equal to the lattice constant of the InP.
9. The semiconductor laser diode of claim 1, wherein the barrier layers, the well layers, and the intermediate layers are each made of InAlGaAs with compositions different from each other.
10. The semiconductor laser diode of claim 9, wherein the barrier layers are made of In.sub.0.44Al.sub.0.28Ga.sub.0.28As and the well layers are made of In.sub.0.79Al.sub.0.16Ga.sub.0.05As.
11. The semiconductor laser diode of claim 10, wherein the intermediate layers are made of InAlAs.
12. The semiconductor laser diode of claim 10, wherein the intermediate layers are made of InGaAs.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0006] The foregoing and other purposes, aspects and advantages will be better understood from the following detailed description of a preferred embodiment of the invention with reference to the drawings, in which:
[0007]
[0008]
[0009]
[0010]
[0011]
[0012]
[0013]
[0014]
[0015]
DESCRIPTION OF EMBODIMENT
[0016] Next, embodiment according to the present invention will be described as referring to drawings. In the description of the drawings, numerals or symbols same with or similar to each other will refer to elements same with or similar to each other without duplicating explanations.
First Embodiment
[0017]
[0018] The n-type InP lower cladding layer 3, the active layer 4, and the p-type upper cladding layer 5 are stacked on the n-type InP substrate 2 in this order. Those layers of the n-type lower cladding layer 3, the active layer 4, and the p-type upper cladding layer 5 form a mesa with a height of, for instance, 2.0 m.
[0019] The n-type InP substrate 2 is doped with silicon (Si) by density of 1.010.sup.18 cm.sup.3. The n-type InP lower cladding layer 3 is also doped with Si by density of 1.010.sup.18 cm.sup.3 and has a thickness of 0.5 m. The active layer 4 has the MQW structure including InAlGaAs. Details of the active layer 4, or the MQW structure will be described later. The p-type InP upper cladding layer 5 may be doped with zinc (Zn) by density of 1.010.sup.18 cm.sup.3 and has a thickness of 0.2 m.
[0020] The n-type InP lower cladding layer 3 includes the optical grating 14 having corrugations periodically arranged by a preset pitch along the optical axis of the LD 1. The optical grating 14 includes InGaAsP with refractive index different from that of the n-type InP cladding layer. The corrugations have a height of, for instance, about 0.1 m.
[0021] The p-type InP blocking layer and the n-type InP blocking layer are provided on the n-type InP substrate 2 so as to bury the mesa in respective sides thereof. The p-type InP blocking layer 6 is doped with Zn by density of 4.010.sup.17 cm.sup.3 and has a thickness of 3.0 m. The n-type InP blocking layer 7 may be doped with Si by density of 1.010.sup.19 cm.sup.3 and has a thickness of 0.4 m.
[0022] The p-type InP layer 8 and the p-type contact layer 9 covers the p-type upper cladding layer 5 and the n-type InP blocking layer 7, and grown thereon in this order. The p-type InP layer 8 is doped with Zn by density of 1.210.sup.18 cm.sup.3 and has a thickness of 2.0 m. The contact layer 9 may be made of InGaAs doped with Zn by density of 1.210.sup.19 cm.sup.3 and has a thickness of 0.5 m. The contact layer has bandgap energy smaller than that of the p-type InP layer 8. The p-type InP layer 8 may be operable as a part of the p-type upper cladding layer 5.
[0023] The passivation film 10 covers the contact layer 9 with an opening that over laps with the mesa. That is, the InGaAs contact layer 9 in a portion overlapping with the mesa exposes from the opening in the passivation film 10. The passivation film 10, which may be made of electrically insulating material, typically silicon oxide (SiO.sub.2). The p-type electrode 11 covers the passivation film 11 and the InGaAs contact layer 9 exposing from the opening in the passivation film 11. The p-type electrode 11 may be an alloy of titanium (Ti), platinum (Pt), and gold (Au). The n-type electrode 12, which is provided in a back surface of the n-type InP substrate 2, may be made of eutectic metal of gold (Au), germanium (Ge), and nickel (Ni).
[0024]
[0025]
[0026] The present embodiment provides the intermediate layers 43 between the barrier layers 41 and the well layer 42, where the intermediate layers 43 have stresses between that of the barrier layer 41 and that of the well layers 42. For instance, assuming that the barrier layers 41, the well layers, and the intermediate layers 43 are made of InxAlyGa.sub.1-x-yAs, and denoting the In composition of the barrier layers 41 as x.sub.b, that of the well layers 42 as x.sub.w, and that of the intermediate layers x.sub.m, a relation of x.sub.b<x.sub.m<x.sub.w makes a difference in a lattice constant between the barrier layers 41 and the intermediate layers 43, and that between the intermediate layers 43 and the well layer 43 smaller than a difference in a lattice constant between the barrier layers 41 and the well layers 42 without interposing the intermediate layers 43. For instance, when the barrier layers 41 has the lattice constant smaller that 0.6% with respect to the InP substrate 2, or the InP cladding layer 3, which causes a tensile stress in the barrier layers 41, and the well layers 42 has the lattice constant greater than +1.7% also against the InP substrate 2 or the InP cladding layer 3, which causes a compressive stress in the well layers 42, the intermediate layers 43 preferably has the lattice constant greater than 0.6% but smaller than +1.7% against the InP substrate 2 or the InP cladding layer 3.
[0027] The inter mediate layers 43 having the lattice constant between that of the barrier layers 41 and that of the well layers 42 may alleviate stresses caused in the barrier layers 41 and the well layers 42. However, a thicker intermediate layer 43 excessively alleviates the stresses and suppresses advantages derived from the stresses such as emission efficiency, emission stability, and the like. Accordingly, the intermediate layers 43 are preferably thinner, for instance, thinner than 1 nm.
[0028] Also, a thicker intermediate layer 43 with bandgap energy close to that of the barrier layers 41, the intermediate layer 43 substantially operate as a barrier layer; while, a thicker intermediate layer 43 with bandgap energy close to that of the well layers 42, the intermediate layers 43 may cause recombination of carriers, which possibly widens a spectrum width of laser light.
[0029] As to the bandgap energy of the layers, denoting those of the barrier layers 41, the well layers 42, and the intermediate layers 43 as Eb, Ew, and Em, respectively; a relation of Ew<Eb<Em or Em<Ew<Eb is preferable.
[0030] In the former case, Ew<Eb<Em, for the band diagram, the compositions of the intermediate layers 43 may be closer to both of those of the barrier layers 41 and those of the well layers 42. Because the latter condition possibly increases the carrier recombination in the intermediate layers 43, the former case, that is, the compositions of the intermediate layers 43 are closer to those of the barrier layers 41. On the other hand, in the latter case, namely Em<Ew<Eb, the compositions of the intermediate layers 43 may be closer to the barrier layers 41. For instance, denoting Al composition of the barrier layers 41 as y.sub.b, those of the well layers 42 as y.sub.w, and those of the intermediate layers 43 as y.sub.m, and further setting the compositions of the barrier layers 41 to be x.sub.b=0.44 and y.sub.b=0.28, which means the barrier layers 41 are In.sub.0.44Al.sub.0.28Ga.sub.0.28As, and those of the well layers 42 to be x.sub.w=0.79 and y.sub.w=0.16, which means the well layers 42 are In.sub.0.79Al.sub.0.16Ga.sub.0.05As; then the intermediate layers 42 preferably have the compositions of x.sub.m=0.52 and y.sub.m=0.48, namely In.sub.0.52Al.sub.0.48As, for the condition of Ew<Eb<Em, or compositions of x.sub.m=0.53 and y.sub.m=0, namely In.sub.0.53Ga.sub.0.47As, for the condition of Em<Ew<Eb.
Second Embodiment
[0031] Next, a process of forming the LD will be described. First, a grating layer 30 is epitaxially grown on a semiconductor wafer 16 as shown in
[0032] Then, the corrugations 14 are buried with the lower n-type cladding layer 3. The n-type lower cladding layer 3 may be doped with Si by density of 1.010.sup.18 cm.sup.3 and a thickness of, for instance, about 0.5 m. Thereafter, the process epitaxially grows the active layer 4 on the n-type lower cladding layer 3. The active layer 4 is grown by the metal organic chemical vapor phase deposition (MOCVD) technique using tri-methyl-indium (TMI), tri-methyl-gallium (TMG), tri-methyl-aluminum (TMA), arsine (AsH.sub.3), and phosphine (PH.sub.3) for sources of indium (In), gallium (Ga), aluminum (Al), arsenic (As), and phosphorous (P), respectively. A growth pressure is, for instance, 10000 Pa and a growth temperature is 660700 C. Flow rates of source gases are TMA=0.6 ccm (cc per minutes), TMG=0.5 ccm, and TMI=0.6 ccm for the barrier layers 41, TMA=0.3 ccm, TMG=0.1 ccm, and TMI=1.3 ccm for the well layers 42. For the intermediate layers 43 in the condition of Ew<Eb<Ew, the flow rates of the source gases are TMA=0.6 ccm and TMI=0.6 ccm; while, those for the other condition of Em<Ew<Eb are TMG=0.6 ccm and TMI=0.6 ccm. The flow rate of arsine (AsH.sub.3) is 40 ccm for the every layers and conditions. Under such conditions, the intermediate layers 43 show growth rate of 0.2 nm/sec, that of the barrier layers 41 is 0.3 nm/sec, and that of the well layers 42 is 0.2 nm/sec; and growth times are 30 seconds, 15 seconds and 5 seconds for the barrier layers 41, the well layers 42, and the intermediate layers 43, respectively. A growth period shorter than 10 seconds may form the intermediate layers 43 thinner than 1 nm.
[0033]
[0034] Referring back to
[0035] Then, as
[0036] Thereafter, the p-type cladding layer 5, the active layer 4, the n-type cladding layer 3, and a portion of the substrate 2 exposed from the mask 17 are sequentially etched using chlorine containing reactive gas, which forms a mesa on the semiconductor substrate 2. Thus, the mesa with a width and a height of about 2.0 m and 1.5 m, respectively, is formed.
[0037] Then, as shown in
[0038] Removing the patterned mask 17, the process grows the p-type InP layer 8 on the mesa and the n-type burying layer 7. The grown p-type InP layer 8 may operate as a part of the p-type upper cladding layer 5. The p-type InP layer 8 may be doped with Zn by density of 1.210.sup.18 cm.sup.3 and has a thickness of 2.0 m.
[0039] Thereafter, the process grows the contact layer 9 on the p-type InP layer 8. The contact layer 9 may be made of p-type InGaAs doped with Zn and has a thickness of 0.5 m. Covering the contact layer 9 with an insulating film 10 so as to expose a portion of the contact layer 9 above the mesa, and depositing a p-type electrode 11 so as to be in contact with the contact layer 9 exposed within an opening in the insulating film 10 and an n-type electrode 12 in a whole back surface of the semiconductor substrate 2. The insulating layer 10 may be made of, for instance, silicon oxide (SiO2). The p-type electrode 11 may be formed by allowing stacked metals of titanium (Ti), platinum (Pt), and gold (Au), while, the n-type electrode 12 may be made of eutectic meal of gold (Au), germanium (Ge), and nickel (Ni). Thus, the LD 1 of the present invention may be completed as shown in
[0040] While particular embodiments of the present invention have been described herein for purposes of illustration, many modifications and changes will become apparent to those skilled in the art. Accordingly, the appended claims are intended to encompass all such modifications and changes as fall within the true spirit and scope of this invention.
[0041] The present application claims the benefit of priority of Japanese Patent Application No. 2016-213567, filed on Oct. 31, 2016, which is incorporated herein by reference.